76 lines
2.5 KiB
C
76 lines
2.5 KiB
C
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/*
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* QEMU M48T59 and M48T08 NVRAM emulation (common header)
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*
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* Copyright (c) 2003-2005, 2007 Jocelyn Mayer
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* Copyright (c) 2013 Hervé Poussineau
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef HW_M48T59_INTERNAL_H
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#define HW_M48T59_INTERNAL_H
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/*
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* The M48T02, M48T08 and M48T59 chips are very similar. The newer '59 has
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* alarm and a watchdog timer and related control registers. In the
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* PPC platform there is also a nvram lock function.
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*/
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typedef struct M48txxInfo {
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const char *bus_name;
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uint32_t model; /* 2 = m48t02, 8 = m48t08, 59 = m48t59 */
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uint32_t size;
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} M48txxInfo;
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typedef struct M48t59State {
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/* Hardware parameters */
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qemu_irq IRQ;
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MemoryRegion iomem;
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uint32_t size;
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int32_t base_year;
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/* RTC management */
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time_t time_offset;
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time_t stop_time;
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/* Alarm & watchdog */
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struct tm alarm;
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QEMUTimer *alrm_timer;
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QEMUTimer *wd_timer;
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/* NVRAM storage */
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uint8_t *buffer;
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/* Model parameters */
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uint32_t model; /* 2 = m48t02, 8 = m48t08, 59 = m48t59 */
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/* NVRAM storage */
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uint16_t addr;
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uint8_t lock;
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} M48t59State;
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uint32_t m48t59_read(M48t59State *NVRAM, uint32_t addr);
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void m48t59_write(M48t59State *NVRAM, uint32_t addr, uint32_t val);
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void m48t59_reset_common(M48t59State *NVRAM);
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void m48t59_realize_common(M48t59State *s, Error **errp);
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static inline void m48t59_toggle_lock(M48t59State *NVRAM, int lock)
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{
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NVRAM->lock ^= 1 << lock;
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}
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extern const MemoryRegionOps m48t59_io_ops;
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#endif /* HW_M48T59_INTERNAL_H */
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