398 lines
8.5 KiB
C
398 lines
8.5 KiB
C
/*
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* derived from mol/mol.c,
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* Copyright (C) 2003, 2004 Samuel Rydh (samuel@ibrium.se)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2
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*
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*/
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#include "config.h"
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#include "arch/common/nvram.h"
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#include "packages/nvram.h"
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#include "libopenbios/bindings.h"
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#include "libc/byteorder.h"
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#include "libc/vsprintf.h"
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#include "drivers/drivers.h"
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#include "macio.h"
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#include "cuda.h"
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#include "pmu.h"
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#include "escc.h"
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#include "drivers/pci.h"
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#define OW_IO_NVRAM_SIZE 0x00020000
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#define OW_IO_NVRAM_OFFSET 0x00060000
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#define OW_IO_NVRAM_SHIFT 4
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#define NW_IO_NVRAM_SIZE 0x00004000
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#define NW_IO_NVRAM_OFFSET 0xfff04000
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#define IO_OPENPIC_SIZE 0x00040000
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#define IO_OPENPIC_OFFSET 0x00040000
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static char *nvram;
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static int macio_nvram_shift(void)
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{
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int nvram_flat;
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if (is_oldworld())
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return OW_IO_NVRAM_SHIFT;
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nvram_flat = fw_cfg_read_i32(FW_CFG_PPC_NVRAM_FLAT);
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return nvram_flat ? 0 : 1;
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}
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int
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macio_get_nvram_size(void)
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{
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int shift = macio_nvram_shift();
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if (is_oldworld())
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return OW_IO_NVRAM_SIZE >> shift;
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else
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return NW_IO_NVRAM_SIZE >> shift;
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}
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static unsigned long macio_nvram_offset(void)
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{
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unsigned long r;
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/* Hypervisor tells us where NVRAM lies */
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r = fw_cfg_read_i32(FW_CFG_PPC_NVRAM_ADDR);
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if (r)
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return r;
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/* Fall back to hardcoded addresses */
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if (is_oldworld())
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return OW_IO_NVRAM_OFFSET;
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return NW_IO_NVRAM_OFFSET;
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}
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static unsigned long macio_nvram_size(void)
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{
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if (is_oldworld())
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return OW_IO_NVRAM_SIZE;
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else
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return NW_IO_NVRAM_SIZE;
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}
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void macio_nvram_init(const char *path, phys_addr_t addr)
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{
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phandle_t chosen, aliases;
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phandle_t dnode;
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int props[2];
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char buf[64];
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unsigned long nvram_size, nvram_offset;
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nvram_offset = macio_nvram_offset();
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nvram_size = macio_nvram_size();
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nvram = (char*)addr + nvram_offset;
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nvconf_init();
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snprintf(buf, sizeof(buf), "%s", path);
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dnode = nvram_init(buf);
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set_int_property(dnode, "#bytes", arch_nvram_size() );
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props[0] = __cpu_to_be32(nvram_offset);
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props[1] = __cpu_to_be32(nvram_size);
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set_property(dnode, "reg", (char *)&props, sizeof(props));
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set_property(dnode, "device_type", "nvram", 6);
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NEWWORLD(set_property(dnode, "compatible", "nvram,flash", 12));
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chosen = find_dev("/chosen");
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snprintf(buf, sizeof(buf), "%s", get_path_from_ph(dnode));
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push_str(buf);
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fword("open-dev");
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set_int_property(chosen, "nvram", POP());
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aliases = find_dev("/aliases");
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set_property(aliases, "nvram", buf, strlen(buf) + 1);
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}
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#ifdef DUMP_NVRAM
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static void
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dump_nvram(void)
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{
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int i, j;
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for (i = 0; i < 10; i++)
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{
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for (j = 0; j < 16; j++)
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printk ("%02x ", nvram[(i*16+j)<<4]);
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printk (" ");
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for (j = 0; j < 16; j++)
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if (isprint(nvram[(i*16+j)<<4]))
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printk("%c", nvram[(i*16+j)<<4]);
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else
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printk(".");
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printk ("\n");
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}
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}
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#endif
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void
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macio_nvram_put(char *buf)
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{
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int i;
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unsigned int it_shift = macio_nvram_shift();
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for (i=0; i < arch_nvram_size(); i++)
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nvram[i << it_shift] = buf[i];
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#ifdef DUMP_NVRAM
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printk("new nvram:\n");
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dump_nvram();
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#endif
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}
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void
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macio_nvram_get(char *buf)
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{
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int i;
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unsigned int it_shift = macio_nvram_shift();
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for (i=0; i< arch_nvram_size(); i++)
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buf[i] = nvram[i << it_shift];
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#ifdef DUMP_NVRAM
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printk("current nvram:\n");
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dump_nvram();
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#endif
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}
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static void
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openpic_init(const char *path, phys_addr_t addr)
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{
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phandle_t dnode;
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int props[2];
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char buf[128];
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fword("new-device");
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push_str("interrupt-controller");
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fword("device-name");
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snprintf(buf, sizeof(buf), "%s/interrupt-controller", path);
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dnode = find_dev(buf);
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set_property(dnode, "device_type", "open-pic", 9);
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set_property(dnode, "compatible", "chrp,open-pic", 14);
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set_property(dnode, "built-in", "", 0);
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props[0] = __cpu_to_be32(IO_OPENPIC_OFFSET);
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props[1] = __cpu_to_be32(IO_OPENPIC_SIZE);
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set_property(dnode, "reg", (char *)&props, sizeof(props));
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set_int_property(dnode, "#interrupt-cells", 2);
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set_int_property(dnode, "#address-cells", 0);
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set_property(dnode, "interrupt-controller", "", 0);
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set_int_property(dnode, "clock-frequency", 4166666);
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fword("finish-device");
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}
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DECLARE_UNNAMED_NODE(ob_macio, 0, sizeof(int));
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/* ( str len -- addr ) */
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static void
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ob_macio_decode_unit(void *private)
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{
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ucell addr;
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const char *arg = pop_fstr_copy();
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addr = strtol(arg, NULL, 16);
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free((char*)arg);
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PUSH(addr);
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}
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/* ( addr -- str len ) */
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static void
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ob_macio_encode_unit(void *private)
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{
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char buf[8];
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ucell addr = POP();
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snprintf(buf, sizeof(buf), "%x", addr);
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push_str(buf);
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}
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static void
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ob_macio_dma_alloc(int *idx)
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{
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call_parent_method("dma-alloc");
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}
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static void
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ob_macio_dma_free(int *idx)
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{
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call_parent_method("dma-free");
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}
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static void
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ob_macio_dma_map_in(int *idx)
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{
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call_parent_method("dma-map-in");
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}
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static void
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ob_macio_dma_map_out(int *idx)
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{
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call_parent_method("dma-map-out");
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}
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static void
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ob_macio_dma_sync(int *idx)
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{
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call_parent_method("dma-sync");
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}
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NODE_METHODS(ob_macio) = {
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{ "decode-unit", ob_macio_decode_unit },
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{ "encode-unit", ob_macio_encode_unit },
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{ "dma-alloc", ob_macio_dma_alloc },
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{ "dma-free", ob_macio_dma_free },
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{ "dma-map-in", ob_macio_dma_map_in },
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{ "dma-map-out", ob_macio_dma_map_out },
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{ "dma-sync", ob_macio_dma_sync },
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};
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void
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ob_unin_init(void)
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{
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phandle_t dnode;
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int props[2];
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fword("new-device");
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push_str("uni-n");
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fword("device-name");
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dnode = find_dev("/uni-n");
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set_property(dnode, "device_type", "memory-controller", 18);
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set_property(dnode, "compatible", "uni-north", 10);
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set_int_property(dnode, "device-rev", 7);
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props[0] = __cpu_to_be32(0xf8000000);
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props[1] = __cpu_to_be32(0x1000000);
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set_property(dnode, "reg", (char *)&props, sizeof(props));
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fword("finish-device");
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}
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static void macio_gpio_init(const char *path)
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{
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fword("new-device");
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push_str("gpio");
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fword("device-name");
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push_str("gpio");
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fword("device-type");
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PUSH(1);
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fword("encode-int");
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push_str("#address-cells");
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fword("property");
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PUSH(0);
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fword("encode-int");
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push_str("#size-cells");
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fword("property");
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push_str("mac-io-gpio");
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fword("encode-string");
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push_str("compatible");
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fword("property");
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PUSH(0x50);
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fword("encode-int");
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PUSH(0x30);
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fword("encode-int");
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fword("encode+");
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push_str("reg");
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fword("property");
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/* Build the extint-gpio1 for the PMU */
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fword("new-device");
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push_str("extint-gpio1");
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fword("device-name");
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PUSH(0x2f);
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fword("encode-int");
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PUSH(0x1);
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fword("encode-int");
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fword("encode+");
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push_str("interrupts");
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fword("property");
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PUSH(0x9);
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fword("encode-int");
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push_str("reg");
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fword("property");
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push_str("keywest-gpio1");
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fword("encode-string");
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push_str("gpio");
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fword("encode-string");
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fword("encode+");
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push_str("compatible");
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fword("property");
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fword("finish-device");
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/* Build the programmer-switch */
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fword("new-device");
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push_str("programmer-switch");
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fword("device-name");
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push_str("programmer-switch");
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fword("encode-string");
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push_str("device_type");
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fword("property");
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PUSH(0x37);
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fword("encode-int");
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PUSH(0x0);
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fword("encode-int");
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fword("encode+");
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push_str("interrupts");
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fword("property");
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fword("finish-device");
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fword("finish-device");
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}
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void
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ob_macio_heathrow_init(const char *path, phys_addr_t addr)
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{
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phandle_t aliases;
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BIND_NODE_METHODS(get_cur_dev(), ob_macio);
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cuda_init(path, addr);
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macio_nvram_init(path, addr);
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escc_init(path, addr);
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macio_ide_init(path, addr, 2);
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aliases = find_dev("/aliases");
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set_property(aliases, "mac-io", path, strlen(path) + 1);
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}
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void
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ob_macio_keylargo_init(const char *path, phys_addr_t addr)
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{
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phandle_t aliases;
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BIND_NODE_METHODS(get_cur_dev(), ob_macio);
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if (has_pmu()) {
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macio_gpio_init(path);
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pmu_init(path, addr);
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} else {
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cuda_init(path, addr);
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}
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escc_init(path, addr);
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macio_ide_init(path, addr, 2);
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openpic_init(path, addr);
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aliases = find_dev("/aliases");
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set_property(aliases, "mac-io", path, strlen(path) + 1);
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}
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