76 lines
3.0 KiB
ReStructuredText
76 lines
3.0 KiB
ReStructuredText
Nest (NX) Accelerator Coprocessor
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=================================
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The NX coprocessor is present in P7+ or later processors. Each NX node
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represents a unique NX coprocessor. The nodes are located under an
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xscom node, as: ::
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/xscom@<xscom_addr>/nx@<nx_addr>
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With unique xscom and nx addresses. Their compatible node contains
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"ibm,power-nx".
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NX Compression Coprocessor
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--------------------------
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This is the memory compression coprocessor. which uses the IBM proprietary
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842 compression algorithm and format. Each NX node contains an 842 engine. ::
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ibm,842-coprocessor-type : CT value common to all 842 coprocessors
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ibm,842-coprocessor-instance : CI value unique to all 842 coprocessors
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Access to the coprocessor requires using the ICSWX instruction, which uses
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a specific format including a Coprocessor Type (CT) and Coprocessor Instance
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(CI) value to address each request to the right coprocessor. The driver should
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use the CT and CI values for a particular node to communicate with it. For
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all 842 coprocessors in the system, the CT value will (should) be the same,
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while each will have a different CI value. The driver can use CI 0 to allow
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the hardware to automatically select which coprocessor instance to use.
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On P9, this compression coprocessor also supports standard GZIP/ZLIB
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compression algorithm and format. Virtual Accelerator Swirchboard (VAS) is used
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to access this coprocessor. VAS writes each request to receive FIFOs (RXFIFO)
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which are either high or normal priority and these FIFOs are bound to
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coprocessor types (842 and gzip).
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VAS distinguishes NX requests for the target engines based on logical
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partition ID (lpid), process ID (pid) and Thread ID (tid). So (lpid, pid, tid)
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combination has to be unique in the system. Each NX node contains high and
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normal FIFOs for each 842 and GZIP engines. ::
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/ibm,842-high-fifo : High priority 842 RxFIFO
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/ibm,842-normal-fifo : Normal priority 842 RxFIFO
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/ibm,gzip-high-fifo : High priority gzip RxFIFO
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/ibm,gzip-normal-fifo : Normal priority gzip RxFIFO
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Each RxFIFO node contains: ::
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compatible : ibm,p9-nx-842 or ibm,p9-nx-gzip
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priority : High or Normal
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rx-fifo-address : RxFIFO buffer address
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rx-fifo-size : RxFIFO size
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lpid : 0xfff (1's for 12 bits in UMAC notify match
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register)
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pid : Coprocessor type (either 842 or gzip)
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tid : counter in each coprocessor type
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During initialization, the driver invokes VAS interface for each coprocessor
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type (842 and gzip) to configure the RxFIFO with rx_fifo_address, lpid, pid
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and tid for high and nornmal priority FIFOs.
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NX RNG Coprocessor
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------------------
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This is the Random Number Generator (RNG) coprocessor, which is a part
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of each NX coprocessor. Each node represents a unique RNG coprocessor.
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Its nodes are not under the main nx node, they are located at: ::
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/hwrng@<addr> : RNG at address <addr>
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ibm,chip-id : chip id where the RNG is
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reg : address of the register to read from
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Each read from the RNG register will provide a new random number.
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