119 lines
3.1 KiB
C
119 lines
3.1 KiB
C
/*
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* Boot image parsing and loading.
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*
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* Copyright 2020 Google LLC
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <stdint.h>
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#define SPI0CS0 0x80000000
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#define GCR 0xf0800000
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#define CLK 0xf0801000
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#define FIU0 0xfb000000
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#define CLK_CLKDIV3 0x58
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#define FIU_DRD_CFG 0x00
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#define FIU_CFG 0x78
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#define BOOT_MAGIC0 0x000
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#define BOOT_MAGIC1 0x004
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#define BOOT_FIU_DRD_CFG 0x108
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#define BOOT_FIU_CLK_DIV 0x10c
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#define BOOT_DEST_ADDR 0x140
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#define BOOT_CODE_SIZE 0x144
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#define BOOT_VERSION 0x148
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#define BOOT_CODE_OFFSET 0x200
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#define BOOT_MAGIC0_VALUE 0xaa550750
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#define BOOT_MAGIC1_VALUE 0x424f4f54
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/*
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* This structure must reside at offset 0x100 in SRAM.
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*
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* See the Check_ROMCode_Status function in the Nuvoton bootblock:
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* https://github.com/Nuvoton-Israel/bootblock/blob/master/Src/bootblock_main.c#L795
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*/
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struct rom_status {
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uint8_t reserved[12];
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uint8_t start_tag[8];
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uint32_t status;
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} rom_status __attribute__((section(".data.rom_status"))) = {
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.status = 0x21, /* SPI0 CS0 offset 0 */
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};
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extern void panic(const char *);
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static void reg_write(uintptr_t base, uintptr_t offset, uint32_t value)
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{
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asm volatile("str %0, [%1, %2]"
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:
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: "r"(value), "r"(base), "i"(offset)
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: "memory");
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}
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static uint32_t image_read_u8(uintptr_t base, uintptr_t offset)
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{
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return *(uint8_t *)(base + offset);
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}
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static uint32_t image_read_u32(uintptr_t base, uintptr_t offset)
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{
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return *(uint32_t *)(base + offset);
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}
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void copy_boot_image(uintptr_t dest_addr, uintptr_t src_addr, int32_t len)
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{
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uint32_t *dst = (uint32_t *)dest_addr;
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uint32_t *src = (uint32_t *)src_addr;
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while (len > 0) {
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*dst++ = *src++;
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len -= sizeof(*dst);
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}
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}
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uintptr_t load_boot_image(void)
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{
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uintptr_t dest_addr;
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uint32_t drd_cfg;
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uint8_t clk_div;
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reg_write(FIU0, FIU_CFG, 0x0000000b);
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if (image_read_u32(SPI0CS0, BOOT_MAGIC0) != BOOT_MAGIC0_VALUE) {
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panic("Bad image magic0 value");
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}
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if (image_read_u32(SPI0CS0, BOOT_MAGIC1) != BOOT_MAGIC1_VALUE) {
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panic("Bad image magic1 value");
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}
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clk_div = image_read_u8(SPI0CS0, BOOT_FIU_CLK_DIV);
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if (clk_div != 0) {
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reg_write(FIU0, FIU_DRD_CFG, image_read_u32(SPI0CS0, BOOT_FIU_DRD_CFG));
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reg_write(CLK, CLK_CLKDIV3, clk_div << 6);
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}
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dest_addr = image_read_u32(SPI0CS0, BOOT_DEST_ADDR);
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if (dest_addr == 0) {
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return SPI0CS0 + 0x200;
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}
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copy_boot_image(dest_addr, SPI0CS0,
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image_read_u32(SPI0CS0, BOOT_CODE_SIZE) + 0x200);
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return dest_addr + 0x200;
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}
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