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zhan-min 2020-10-26 21:55:53 +08:00
parent 55e6ffaf7a
commit 49327030d9
8 changed files with 3815 additions and 1899 deletions
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97
Project/DebugConfig/USART_STM32F103VE.dbgconf Normal file
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@ -0,0 +1,97 @@
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug MCU Configuration
// <o0.0> DBG_SLEEP
// <i> Debug Sleep Mode
// <i> 0: (FCLK=On, HCLK=Off) FCLK is clocked by the system clock as previously configured by the software while HCLK is disabled
// <i> 1: (FCLK=On, HCLK=On) HCLK is fed by the same clock that is provided to FCLK
// <o0.1> DBG_STOP
// <i> Debug Stop Mode
// <i> 0: (FCLK=Off, HCLK=Off) Clock controller disables all clocks
// <i> 1: (FCLK=On, HCLK=On) FCLK and HCLK are provided by the internal RC oscillator which remains active
// <o0.2> DBG_STANDBY
// <i> Debug Standby Mode
// <i> 0: (FCLK=Off, HCLK=Off) The whole digital part is unpowered.
// <i> 1: (FCLK=On, HCLK=On) Digital part is powered and FCLK and HCLK are provided by the internal RC oscillator which remains active
// <o0.8> DBG_IWDG_STOP
// <i> Debug independent watchdog stopped when core is halted
// <i> 0: The watchdog counter clock continues even if the core is halted
// <i> 1: The watchdog counter clock is stopped when the core is halted
// <o0.9> DBG_WWDG_STOP
// <i> Debug window watchdog stopped when core is halted
// <i> 0: The window watchdog counter clock continues even if the core is halted
// <i> 1: The window watchdog counter clock is stopped when the core is halted
// <o0.10> DBG_TIM1_STOP
// <i> Timer 1 counter stopped when core is halted
// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
// <o0.11> DBG_TIM2_STOP
// <i> Timer 2 counter stopped when core is halted
// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
// <o0.12> DBG_TIM3_STOP
// <i> Timer 3 counter stopped when core is halted
// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
// <o0.13> DBG_TIM4_STOP
// <i> Timer 4 counter stopped when core is halted
// <i> 0: The clock of the involved Timer Counter is fed even if the core is halted
// <i> 1: The clock of the involved Timer counter is stopped when the core is halted
// <o0.14> DBG_CAN1_STOP
// <i> Debug CAN1 stopped when Core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: CAN1 receive registers are frozen
// <o0.15> DBG_I2C1_SMBUS_TIMEOUT
// <i> I2C1 SMBUS timeout mode stopped when Core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: The SMBUS timeout is frozen
// <o0.16> DBG_I2C2_SMBUS_TIMEOUT
// <i> I2C2 SMBUS timeout mode stopped when Core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: The SMBUS timeout is frozen
// <o0.17> DBG_TIM8_STOP
// <i> Timer 8 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.18> DBG_TIM5_STOP
// <i> Timer 5 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.19> DBG_TIM6_STOP
// <i> Timer 6 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.20> DBG_TIM7_STOP
// <i> Timer 7 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.21> DBG_CAN2_STOP
// <i> Debug CAN2 stopped when Core is halted
// <i> 0: Same behavior as in normal mode
// <i> 1: CAN2 receive registers are frozen
// <o0.25> DBG_TIM12_STOP
// <i> Timer 12 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.26> DBG_TIM13_STOP
// <i> Timer 13 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.27> DBG_TIM14_STOP
// <i> Timer 14 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.28> DBG_TIM9_STOP
// <i> Timer 9 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.29> DBG_TIM10_STOP
// <i> Timer 10 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// <o0.30> DBG_TIM11_STOP
// <i> Timer 11 counter stopped when core is halted
// <i> 0: The clock of the involved timer counter is fed even if the core is halted, and the outputs behave normally.
// <i> 1: The clock of the involved timer counter is stopped when the core is halted, and the outputs are disabled (as if there were an emergency stop in response to a break event).
// </h>
DbgMCU_CR = 0x00000007;
// <<< end of configuration section >>>

3487
Project/stm32-f10x-template.hex
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1901
Project/stm32-f10x-template.uvguix.C401 Normal file
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7
Project/stm32-f10x-template.uvoptx
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@ -198,6 +198,13 @@
<pszMrulep></pszMrulep>
<pSingCmdsp></pSingCmdsp>
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>1</Enable>
<EnableFlashSeq>1</EnableFlashSeq>
<EnableLog>0</EnableLog>
<Protocol>2</Protocol>
<DbgClock>10000000</DbgClock>
</DebugDescription>
</TargetOption>
</Target>

2
Project/stm32-f10x-template.uvprojx
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@ -16,7 +16,7 @@
<TargetCommonOption>
<Device>STM32F103VE</Device>
<Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32F1xx_DFP.2.0.0</PackID>
<PackID>Keil.STM32F1xx_DFP.2.1.0</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x10000) IROM(0x08000000,0x80000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>

65
User/OSC/OSC.c
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@ -1,5 +1,3 @@
#include "rtthread.h"
#include "OSC.h"
#include "stm32f10x.h"
#include "bsp_ili9341_lcd.h"
@ -15,6 +13,12 @@
* 变量
******************************************************************
*/
//操作系统变量
//进入设置状态标志
rt_mq_t setting_data_queue = RT_NULL;
uint16_t TimePerDiv_Group[] = {2, 5, 10, 20, 50, 100, 200, 500};
uint8_t TimePerDiv_Nbr = sizeof(TimePerDiv_Group)/sizeof(TimePerDiv_Group[0]);
@ -23,14 +27,13 @@ uint8_t TimePerDiv_Oder = 0;
//要显示的信息
FlagStatus Setting=RESET;
volatile uint16_t TimePerDiv = 1;//显示间隔时间长度
uint8_t TriggerMode = 1;//触发模式
uint32_t TriggerValue = 1;//触发电平
__IO uint16_t ADC_ConvertedValue[ADC_SampleNbr] = {0};//ADC采集数据
/* 定义线程控制块 */
static rt_thread_t Setting_thread = RT_NULL;
static rt_thread_t GetWave_thread = RT_NULL;
static rt_thread_t PlotWave_thread = RT_NULL;
@ -65,20 +68,68 @@ void PlotWave(void* parameter)
}
}
void Setting(void* parameter)
{
rt_err_t recv_statu = RT_EOK;
uint8_t setting_data;
while(1)
{
recv_statu = rt_mq_recv(setting_data_queue,
&setting_data,
sizeof(setting_data),
RT_WAITING_FOREVER);
if(recv_statu == RT_EOK && setting_data == 0)
{
while(setting_data != 1)
{
recv_statu = rt_mq_recv(setting_data_queue,
&setting_data,
sizeof(setting_data),
500);//五秒钟无操作则退出设置
if(recv_statu == RT_EOK)
{
switch(setting_data)
{
case 2:
{
break;
}
}
}
}
}
}
}
void Run(void)
{
setting_data_queue = rt_mq_create("setting_data_queue",
1,
10,
RT_IPC_FLAG_FIFO);
Setting_thread =
rt_thread_create("Setting",
Setting,
RT_NULL,
512,
1,
20);
if (Setting_thread != RT_NULL)
rt_thread_startup(Setting_thread);
GetWave_thread = /* 线程控制块指针 */
rt_thread_create( "GetWave", /* 线程名字 */
ADCx_GetWaveData, /* 线程入口函数 */
RT_NULL, /* 线程入口函数参数 */
512, /* 线程栈大小 */
1, /* 线程的优先级 */
2, /* 线程的优先级 */
20); /* 线程时间片 */
/* 启动线程，开启调度 */
if (GetWave_thread != RT_NULL)
if (GetWave_thread != RT_NULL)
rt_thread_startup(GetWave_thread);
PlotWave_thread = /* 线程控制块指针 */
@ -86,7 +137,7 @@ void Run(void)
PlotWave, /* 线程入口函数 */
RT_NULL, /* 线程入口函数参数 */
512, /* 线程栈大小 */
2, /* 线程的优先级 */
3, /* 线程的优先级 */
20); /* 线程时间片 */
/* 启动线程，开启调度 */

3
User/OSC/OSC.h
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@ -1,8 +1,10 @@
#ifndef __OSC_H
#define __OSC_H
#include "rtthread.h"
#include "stm32f10x_it.h"
extern rt_mq_t setting_data_queue;
extern uint16_t TimePerDiv_Group[];
extern uint8_t TimePerDiv_Nbr;
@ -13,7 +15,6 @@ extern uint8_t TriggerMode;//
extern uint32_t TriggerValue;//触发电平
extern __IO uint16_t ADC_ConvertedValue[];
extern FlagStatus Setting;
void PlotWave(void* parameter);

152
User/stm32f10x_it.c
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@ -12,136 +12,11 @@
#include <stdio.h>
uint16_t ADC_SampleCount=0;
volatile uint32_t Time_us = 0; // us 计时变量
char dispBuff[100];
/** @addtogroup STM32F10x_StdPeriph_Template
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/******************************************************************************/
/* Cortex-M3 Processor Exceptions Handlers */
/******************************************************************************/
/**
* @brief This function handles NMI exception.
* @param None
* @retval None
*/
void NMI_Handler(void)
{
}
///**
// * @brief This function handles Hard Fault exception.
// * @param None
// * @retval None
// */
//void HardFault_Handler(void)
//{
// /* Go to infinite loop when Hard Fault exception occurs */
// while (1)
// {
// }
//}
/**
* @brief This function handles Memory Manage exception.
* @param None
* @retval None
*/
void MemManage_Handler(void)
{
/* Go to infinite loop when Memory Manage exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Bus Fault exception.
* @param None
* @retval None
*/
void BusFault_Handler(void)
{
/* Go to infinite loop when Bus Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Usage Fault exception.
* @param None
* @retval None
*/
void UsageFault_Handler(void)
{
/* Go to infinite loop when Usage Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles SVCall exception.
* @param None
* @retval None
*/
void SVC_Handler(void)
{
}
/**
* @brief This function handles Debug Monitor exception.
* @param None
* @retval None
*/
void DebugMon_Handler(void)
{
}
///**
// * @brief This function handles PendSVC exception.
// * @param None
// * @retval None
// */
//void PendSV_Handler(void)
//{
//}
///**
// * @brief This function handles SysTick Handler.
// * @param None
// * @retval None
// */
//void SysTick_Handler(void)
//{
//}
/******************************************************************************/
/* STM32F10x Peripherals Interrupt Handlers */
/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
/* available peripheral interrupt handler's name please refer to the startup */
/* file (startup_stm32f10x_xx.s). */
/******************************************************************************/
uint16_t ADC_SampleCount=0;
uint8_t setting_data_set = 0;
/**
@ -160,7 +35,7 @@ void BASIC_TIM_IRQHandler (void)
/**
* @brief This function handles SW interrupt request.
* @brief SW的中断处理函数，按SW进入设置状态。
* @param None
* @retval None
*/
@ -168,7 +43,11 @@ void EXTI2_IRQnHandler(void)
{
if(EXTI_GetFlagStatus(EXTI_Line2) != RESET)
{
Setting = SET;
rt_interrupt_enter();
rt_mq_send(setting_data_queue,
&setting_data_set,
sizeof(setting_data_set));
rt_interrupt_leave();
}
EXTI_ClearITPendingBit(EXTI_Line2);
}
@ -224,19 +103,4 @@ void EXTI15_10_IRQHandler(void)
}
/**
* @brief This function handles PPP interrupt request.
* @param None
* @retval None
*/
/*void PPP_IRQHandler(void)
{
}*/
/**
* @}
*/
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/