Fix ARM compile
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@ -33,9 +33,8 @@ simdjson_really_inline uint64_t prefix_xor(uint64_t bitmask) {
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return bitmask;
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}
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} // unnamed namespace
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} // namespace arm64
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} // namespace simdjson
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} // namespace simdjson
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SIMDJSON_UNTARGET_IMPLEMENTATION
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#endif
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@ -256,6 +256,9 @@ simdjson_really_inline int8x16_t make_int8x16_t(int8_t x1, int8_t x2, int8_t x
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// sensible, but the AVX ISA makes this kind of approach difficult.
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template<typename L>
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simdjson_really_inline void compress(uint16_t mask, L * output) const {
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using internal::thintable_epi8;
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using internal::BitsSetTable256mul2;
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using internal::pshufb_combine_table;
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// this particular implementation was inspired by work done by @animetosho
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// we do it in two steps, first 8 bytes and then second 8 bytes
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uint8_t mask1 = uint8_t(mask); // least significant 8 bits
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@ -41,11 +41,11 @@
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// has it as a macro.
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#ifndef _blsr_u64
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// we roll our own
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SIMDJSON_TARGET_IMPLEMENTATION
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SIMDJSON_TARGET_HASWELL
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static simdjson_really_inline uint64_t _blsr_u64(uint64_t n) {
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return (n - 1) & n;
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}
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SIMDJSON_UNTARGET_IMPLEMENTATION
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SIMDJSON_UNTARGET_REGION
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#endif // _blsr_u64
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#endif // SIMDJSON_CLANG_VISUAL_STUDIO
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