===================================================================

Gbp-Pq: Name riscv64.patch
This commit is contained in:
Ubuntu Developers 2022-05-14 01:55:17 +08:00 committed by openKylinBot
parent 3361aaf292
commit b4f3c2989a
5 changed files with 15 additions and 1 deletions

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@ -733,6 +733,9 @@ def split_triplet(triplet, allow_unknown=False):
elif cpu == 'sh4': elif cpu == 'sh4':
canonical_cpu = 'sh4' canonical_cpu = 'sh4'
endianness = 'little' endianness = 'little'
elif cpu == 'riscv64':
canonical_cpu = 'riscv64'
endianness = 'little'
elif allow_unknown: elif allow_unknown:
canonical_cpu = cpu canonical_cpu = cpu
endianness = 'unknown' endianness = 'unknown'

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@ -391,7 +391,8 @@ inline bool AtomicOperations::isLockfreeJS(int32_t size) {
#elif defined(__ppc__) || defined(__PPC__) || defined(__sparc__) || \ #elif defined(__ppc__) || defined(__PPC__) || defined(__sparc__) || \
defined(__ppc64__) || defined(__PPC64__) || defined(__ppc64le__) || \ defined(__ppc64__) || defined(__PPC64__) || defined(__ppc64le__) || \
defined(__PPC64LE__) || defined(__alpha__) || defined(__hppa__) || \ defined(__PPC64LE__) || defined(__alpha__) || defined(__hppa__) || \
defined(__sh__) || defined(__s390__) || defined(__s390x__) defined(__sh__) || defined(__s390__) || defined(__s390x__) || \
defined(__riscv)
# include "jit/shared/AtomicOperations-feeling-lucky.h" # include "jit/shared/AtomicOperations-feeling-lucky.h"
#else #else
# error "No AtomicOperations support provided for this platform" # error "No AtomicOperations support provided for this platform"

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@ -70,6 +70,11 @@
# endif # endif
#endif #endif
#if defined(__riscv) && __riscv_xlen == 64
# define HAS_64BIT_ATOMICS
# define HAS_64BIT_LOCKFREE
#endif
#ifdef JS_CODEGEN_NONE #ifdef JS_CODEGEN_NONE
# ifdef JS_64BIT # ifdef JS_64BIT
# define HAS_64BIT_ATOMICS # define HAS_64BIT_ATOMICS

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@ -169,6 +169,9 @@ static const ia64_instr _return_instr = {
# define RETURN_INSTR _return_instr # define RETURN_INSTR _return_instr
# define RETURN_INSTR_TYPE ia64_instr # define RETURN_INSTR_TYPE ia64_instr
#elif defined(__riscv)
#define RETURN_INSTR 0x80828082 /* ret; ret */
#else #else
# error "Need return instruction for this architecture" # error "Need return instruction for this architecture"
#endif #endif

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@ -50,6 +50,7 @@ CPU_bitness = {
'mips64': 64, 'mips64': 64,
'ppc': 32, 'ppc': 32,
'ppc64': 64, 'ppc64': 64,
'riscv64': 64,
's390': 32, 's390': 32,
's390x': 64, 's390x': 64,
'sh4': 32, 'sh4': 32,
@ -89,6 +90,7 @@ CPU_preprocessor_checks = OrderedDict((
('mips64', '__mips64'), ('mips64', '__mips64'),
('mips32', '__mips__'), ('mips32', '__mips__'),
('sh4', '__sh__'), ('sh4', '__sh__'),
('riscv64', '__riscv && __riscv_xlen == 64'),
)) ))
assert sorted(CPU_preprocessor_checks.keys()) == sorted(CPU.POSSIBLE_VALUES) assert sorted(CPU_preprocessor_checks.keys()) == sorted(CPU.POSSIBLE_VALUES)