commit
81cdf0c6c3
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@ -36,10 +36,6 @@
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#define CPSR_MODE_USR 0x10
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#define CPSR_MODE_MASK 0x1f
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#define DSB __asm__ volatile("dsb" ::: "memory")
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#define ISB __asm__ volatile("isb" ::: "memory")
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#define DMB __asm__ volatile("dmb" ::: "memory")
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STATIC INLINE UINT32 OsArmReadSctlr(VOID)
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{
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UINT32 val;
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@ -45,7 +45,6 @@ extern VOID HalClockIrqClear(VOID);
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extern VOID HalClockInit(VOID);
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extern UINT64 HalClockGetCycles(VOID);
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extern VOID HalDelayUs(UINT32 usecs);
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extern UINT64 hi_sched_clock(VOID);
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extern UINT32 HalClockGetTickTimerCycles(VOID);
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extern VOID HalClockTickTimerReload(UINT64 cycles);
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@ -51,6 +51,7 @@ extern "C" {
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#define DSB __asm__ volatile("dsb" ::: "memory")
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#define DMB __asm__ volatile("dmb" ::: "memory")
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#define ISB __asm__ volatile("isb" ::: "memory")
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#define WFI __asm__ volatile("wfi" ::: "memory")
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#define BARRIER __asm__ volatile("":::"memory")
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#define ARM_SYSREG_READ(REG) \
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@ -162,7 +162,7 @@ VOID HalDelayUs(UINT32 usecs)
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}
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}
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UINT64 hi_sched_clock(VOID)
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DEPRECATED UINT64 hi_sched_clock(VOID)
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{
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return LOS_CurrNanosec();
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}
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@ -143,32 +143,17 @@ LITE_OS_SEC_TEXT_INIT VOID OsUserTaskStackInit(TaskContext *context, TSK_ENTRY_F
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context->PC = (UINTPTR)taskEntry;
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}
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VOID Sev(VOID)
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{
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__asm__ __volatile__ ("sev" : : : "memory");
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}
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VOID Wfe(VOID)
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{
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__asm__ __volatile__ ("wfe" : : : "memory");
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}
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VOID Wfi(VOID)
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{
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__asm__ __volatile__ ("wfi" : : : "memory");
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}
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VOID Dmb(VOID)
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DEPRECATED VOID Dmb(VOID)
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{
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__asm__ __volatile__ ("dmb" : : : "memory");
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}
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VOID Dsb(VOID)
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DEPRECATED VOID Dsb(VOID)
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{
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__asm__ __volatile__("dsb" : : : "memory");
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}
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VOID Isb(VOID)
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DEPRECATED VOID Isb(VOID)
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{
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__asm__ __volatile__("isb" : : : "memory");
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}
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@ -183,7 +183,7 @@ extern UINT32 LOS_ExcRegHook(EXC_PROC_FUNC excHook);
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* los_exc.h: the header file that contains the API declaration.
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* @see None.
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*/
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VOID LOS_Panic(const CHAR *fmt, ...) __attribute__ ((noreturn));
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VOID LOS_Panic(const CHAR *fmt, ...) NORETURN;
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/**
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* @ingroup los_exc
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@ -77,134 +77,6 @@ extern UINT64 g_cpuMap[];
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#define CPU_MAP_GET(cpuid) g_cpuMap[(cpuid)]
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#define CPU_MAP_SET(cpuid, hwid) g_cpuMap[(cpuid)] = (hwid)
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/**
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* @ingroup los_hw
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* @brief Set Event.
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*
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* @par Description:
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* <ul>
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* <li>This API is used to send an event to all cores within a muti-processor system.</li>
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* </ul>
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* @attention
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* <ul>
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* <li>This API is not implemented.</li>
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* </ul>
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*
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* @param None.
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*
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* @retval #None.
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*
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* @par Dependency:
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* los_hw.h: the header file that contains the API declaration.
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* @see wfe.
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*/
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extern VOID Sev(VOID);
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/**
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* @ingroup los_hw
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* @brief Wait for event.
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*
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* @par Description:
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* <ul>
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* <li>This API is used to suspend execution until events occurs if the event register is not set.</li>
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* </ul>
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* @attention
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* <ul>
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* <li>This API is not implemented.</li>
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* </ul>
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*
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* @param None.
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*
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* @retval #None.
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*
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* @par Dependency:
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* los_hw.h: the header file that contains the API declaration.
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* @see sev.
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*/
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extern VOID Wfe(VOID);
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/**
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* @ingroup los_hw
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* @brief Wait for interrupt.
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*
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* @par Description:
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* <ul>
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* <li>This API is used to suspend execution until interrupt or a debug request occurs.</li>
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* </ul>
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* @attention None.
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*
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* @param None.
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*
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* @retval #None.
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*
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* @par Dependency:
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* los_hw.h: the header file that contains the API declaration.
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* @see None.
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*/
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extern VOID Wfi(VOID);
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/**
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* @ingroup los_hw
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* @brief Data Memory Barrier.
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*
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* @par Description:
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* <ul>
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* <li>This API is used as a memory barrier</li>
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* </ul>
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* @attention None.
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*
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* @param None.
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*
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* @retval #None.
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*
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* @par Dependency:
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* los_hw.h: the header file that contains the API declaration.
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* @see None.
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*/
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extern VOID Dmb(VOID);
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/**
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* @ingroup los_hw
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* @brief Data Synchronization Barrier.
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*
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* @par Description:
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* <ul>
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* <li>This API is used as a special kind of memory barrier</li>
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* </ul>
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* @attention None.
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*
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* @param None.
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*
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* @retval #None.
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*
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* @par Dependency:
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* los_hw.h: the header file that contains the API declaration.
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* @see None.
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*/
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extern VOID Dsb(VOID);
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/**
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* @ingroup los_hw
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* @brief Instruction Synchronization Barrier.
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*
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* @par Description:
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* <ul>
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* <li>This API is used to flush the pipeline in the processor,
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* so that all instructions following the ISB are fetched from cache or memory,
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* after the instruction has been completed.</li>
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* </ul>
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* @attention None.
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*
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* @param None.
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*
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* @retval #None.
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*
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* @par Dependency:
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* los_hw.h: the header file that contains the API declaration.
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* @see None.
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*/
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extern VOID Isb(VOID);
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/**
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* @ingroup los_hw
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* @brief Invalidate instruction cache.
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@ -280,7 +280,7 @@ STATIC VOID OsGetHwTime(struct timespec64 *hwTime)
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{
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UINT64 nowNsec;
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nowNsec = hi_sched_clock();
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nowNsec = LOS_CurrNanosec();
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hwTime->tv_sec = nowNsec / OS_SYS_NS_PER_SECOND;
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hwTime->tv_nsec = nowNsec - hwTime->tv_sec * OS_SYS_NS_PER_SECOND;
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}
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@ -865,8 +865,8 @@ clock_t clock(VOID)
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clock_t clockMsec;
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UINT64 nowNsec;
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nowNsec = hi_sched_clock();
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clockMsec = (clock_t)(nowNsec / OS_SYS_NS_PER_MS);
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nowNsec = LOS_CurrNanosec();
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clockMsec = (clock_t)(nowNsec / (OS_SYS_NS_PER_SECOND / CLOCKS_PER_SEC));
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return clockMsec;
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}
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@ -58,7 +58,7 @@ static unsigned long g_seed = 1;
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int RanOpen(struct file *filep)
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{
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g_seed = (unsigned long)(hi_sched_clock() & 0xffffffff);
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g_seed = (unsigned long)(LOS_CurrNanosec() & 0xffffffff);
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return 0;
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}
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@ -117,7 +117,7 @@ VOID OsSetMainTask()
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LITE_OS_SEC_TEXT WEAK VOID OsIdleTask(VOID)
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{
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while (1) {
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Wfi();
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WFI;
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}
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}
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@ -46,11 +46,6 @@ enum DmaMemType {
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DMA_NOCACHE
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};
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#define IS_PERIPH_ADDR(addr) \
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(((addr) >= U32_C(PERIPH_PMM_BASE)) && ((addr) <= U32_C(PERIPH_PMM_BASE) + U32_C(PERIPH_PMM_SIZE)))
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#define IS_MEMORY_ADDR(addr) \
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(((addr) >= U32_C(DDR_MEM_ADDR)) && ((addr) <= U32_C(DDR_MEM_ADDR) + U32_C(DDR_MEM_SIZE)))
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/* thread safety */
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VOID *LOS_DmaMemAlloc(DMA_ADDR_T *dmaAddr, size_t size, size_t align, enum DmaMemType type);
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VOID LOS_DmaMemFree(VOID *vaddr);
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@ -43,114 +43,6 @@ extern "C" {
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#endif /* __cplusplus */
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#endif /* __cplusplus */
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VOID *ioremap(PADDR_T paddr, unsigned long size)
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{
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if (IS_PERIPH_ADDR(paddr) && IS_PERIPH_ADDR(paddr + size)) {
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return (VOID *)(UINTPTR)IO_DEVICE_ADDR(paddr);
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}
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VM_ERR("ioremap failed invalid addr or size %p %d", paddr, size);
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return (VOID *)(UINTPTR)paddr;
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}
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VOID iounmap(VOID *vaddr) {}
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VOID *ioremap_nocache(PADDR_T paddr, unsigned long size)
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{
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if (IS_PERIPH_ADDR(paddr) && IS_PERIPH_ADDR(paddr + size)) {
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return (VOID *)(UINTPTR)IO_UNCACHED_ADDR(paddr);
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}
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if (IS_MEMORY_ADDR(paddr) && IS_MEMORY_ADDR(paddr + size)) {
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return (VOID *)(UINTPTR)MEM_UNCACHED_ADDR(paddr);
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}
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VM_ERR("ioremap_nocache failed invalid addr or size %p %d", paddr, size);
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return (VOID *)(UINTPTR)paddr;
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}
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VOID *ioremap_cached(PADDR_T paddr, unsigned long size)
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{
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if (IS_PERIPH_ADDR(paddr) && IS_PERIPH_ADDR(paddr + size)) {
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return (VOID *)(UINTPTR)IO_CACHED_ADDR(paddr);
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}
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if (IS_MEMORY_ADDR(paddr) && IS_MEMORY_ADDR(paddr + size)) {
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return (VOID *)(UINTPTR)MEM_CACHED_ADDR(paddr);
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}
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VM_ERR("ioremap_cached failed invalid addr or size %p %d", paddr, size);
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return (VOID *)(UINTPTR)paddr;
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}
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#ifdef LOSCFG_KERNEL_VM
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int remap_pfn_range(VADDR_T vaddr, unsigned long pfn, unsigned long size, unsigned long prot)
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{
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STATUS_T status = LOS_OK;
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int ret;
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LosVmMapRegion *region = NULL;
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unsigned long vpos;
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unsigned long end;
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unsigned long paddr = pfn << PAGE_SHIFT;
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LosVmSpace *space = LOS_SpaceGet(vaddr);
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if (size == 0) {
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VM_ERR("invalid map size %u", size);
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return LOS_ERRNO_VM_INVALID_ARGS;
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}
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size = ROUNDUP(size, PAGE_SIZE);
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if (!IS_PAGE_ALIGNED(vaddr) || pfn == 0) {
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VM_ERR("invalid map map vaddr %x or pfn %x", vaddr, pfn);
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return LOS_ERRNO_VM_INVALID_ARGS;
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}
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if (space == NULL) {
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VM_ERR("aspace not exists");
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return LOS_ERRNO_VM_NOT_FOUND;
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}
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(VOID)LOS_MuxAcquire(&space->regionMux);
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region = LOS_RegionFind(space, vaddr);
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if (region == NULL) {
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VM_ERR("region not exists");
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status = LOS_ERRNO_VM_NOT_FOUND;
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goto OUT;
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}
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end = vaddr + size;
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if (region->range.base + region->range.size < end) {
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VM_ERR("out of range:base=%x size=%d vaddr=%x len=%u",
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region->range.base, region->range.size, vaddr, size);
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status = LOS_ERRNO_VM_INVALID_ARGS;
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goto OUT;
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}
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/* check */
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for (vpos = vaddr; vpos < end; vpos += PAGE_SIZE) {
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status = LOS_ArchMmuQuery(&space->archMmu, (VADDR_T)vpos, NULL, NULL);
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if (status == LOS_OK) {
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VM_ERR("remap_pfn_range, address mapping already exist");
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status = LOS_ERRNO_VM_INVALID_ARGS;
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goto OUT;
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}
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}
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/* map all */
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ret = LOS_ArchMmuMap(&space->archMmu, vaddr, paddr, size >> PAGE_SHIFT, prot);
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if (ret <= 0) {
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VM_ERR("ioremap LOS_ArchMmuMap failed err = %d", ret);
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goto OUT;
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||||
}
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status = LOS_OK;
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OUT:
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(VOID)LOS_MuxRelease(&space->regionMux);
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return status;
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}
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||||
#endif
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||||
|
||||
VOID *LOS_DmaMemAlloc(DMA_ADDR_T *dmaAddr, size_t size, size_t align, enum DmaMemType type)
|
||||
{
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VOID *kVaddr = NULL;
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||||
|
|
|
@ -108,12 +108,12 @@ LOCK_RELEASE:
|
|||
STATIC VOID OsLockVdso(VdsoDataPage *vdsoDataPage)
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||||
{
|
||||
vdsoDataPage->lockCount = 1;
|
||||
Dmb();
|
||||
DMB;
|
||||
}
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||||
|
||||
STATIC VOID OsUnlockVdso(VdsoDataPage *vdsoDataPage)
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||||
{
|
||||
Dmb();
|
||||
DMB;
|
||||
vdsoDataPage->lockCount = 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -93,73 +93,73 @@ extern VOID PrintExcInfo(const CHAR *fmt, ...);
|
|||
* @ingroup los_base
|
||||
* Read a UINT8 value from addr and stroed in value.
|
||||
*/
|
||||
#define READ_UINT8(value, addr) ({ (value) = *((volatile UINT8 *)((UINTPTR)(addr))); Dsb(); })
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||||
#define READ_UINT8(value, addr) ({ (value) = *((volatile UINT8 *)((UINTPTR)(addr))); DSB; })
|
||||
|
||||
/**
|
||||
* @ingroup los_base
|
||||
* Read a UINT16 value from addr and stroed in addr.
|
||||
*/
|
||||
#define READ_UINT16(value, addr) ({ (value) = *((volatile UINT16 *)((UINTPTR)(addr))); Dsb(); })
|
||||
#define READ_UINT16(value, addr) ({ (value) = *((volatile UINT16 *)((UINTPTR)(addr))); DSB; })
|
||||
|
||||
/**
|
||||
* @ingroup los_base
|
||||
* Read a UINT32 value from addr and stroed in value.
|
||||
*/
|
||||
#define READ_UINT32(value, addr) ({ (value) = *((volatile UINT32 *)((UINTPTR)(addr))); Dsb(); })
|
||||
#define READ_UINT32(value, addr) ({ (value) = *((volatile UINT32 *)((UINTPTR)(addr))); DSB; })
|
||||
|
||||
/**
|
||||
* @ingroup los_base
|
||||
* Read a UINT64 value from addr and stroed in value.
|
||||
*/
|
||||
#define READ_UINT64(value, addr) ({ (value) = *((volatile UINT64 *)((UINTPTR)(addr))); Dsb(); })
|
||||
#define READ_UINT64(value, addr) ({ (value) = *((volatile UINT64 *)((UINTPTR)(addr))); DSB; })
|
||||
|
||||
/**
|
||||
* @ingroup los_base
|
||||
* Write a UINT8 value to addr.
|
||||
*/
|
||||
#define WRITE_UINT8(value, addr) ({ Dsb(); *((volatile UINT8 *)((UINTPTR)(addr))) = (value); })
|
||||
#define WRITE_UINT8(value, addr) ({ DSB; *((volatile UINT8 *)((UINTPTR)(addr))) = (value); })
|
||||
|
||||
/**
|
||||
* @ingroup los_base
|
||||
* Write a UINT16 value to addr.
|
||||
*/
|
||||
#define WRITE_UINT16(value, addr) ({ Dsb(); *((volatile UINT16 *)((UINTPTR)(addr))) = (value); })
|
||||
#define WRITE_UINT16(value, addr) ({ DSB; *((volatile UINT16 *)((UINTPTR)(addr))) = (value); })
|
||||
|
||||
/**
|
||||
* @ingroup los_base
|
||||
* Write a UINT32 value to addr.
|
||||
*/
|
||||
#define WRITE_UINT32(value, addr) ({ Dsb(); *((volatile UINT32 *)((UINTPTR)(addr))) = (value); })
|
||||
#define WRITE_UINT32(value, addr) ({ DSB; *((volatile UINT32 *)((UINTPTR)(addr))) = (value); })
|
||||
|
||||
/**
|
||||
* @ingroup los_base
|
||||
* Write a UINT64 addr to addr.
|
||||
*/
|
||||
#define WRITE_UINT64(value, addr) ({ Dsb(); *((volatile UINT64 *)((UINTPTR)(addr))) = (value); })
|
||||
#define WRITE_UINT64(value, addr) ({ DSB; *((volatile UINT64 *)((UINTPTR)(addr))) = (value); })
|
||||
|
||||
/**
|
||||
* @ingroup los_base
|
||||
* Get a UINT8 value from addr.
|
||||
*/
|
||||
#define GET_UINT8(addr) ({ UINT8 r = *((volatile UINT8 *)((UINTPTR)(addr))); Dsb(); r; })
|
||||
#define GET_UINT8(addr) ({ UINT8 r = *((volatile UINT8 *)((UINTPTR)(addr))); DSB; r; })
|
||||
|
||||
/**
|
||||
* @ingroup los_base
|
||||
* Get a UINT16 value from addr.
|
||||
*/
|
||||
#define GET_UINT16(addr) ({ UINT16 r = *((volatile UINT16 *)((UINTPTR)(addr))); Dsb(); r; })
|
||||
#define GET_UINT16(addr) ({ UINT16 r = *((volatile UINT16 *)((UINTPTR)(addr))); DSB; r; })
|
||||
|
||||
/**
|
||||
* @ingroup los_base
|
||||
* Get a UINT32 value from addr.
|
||||
*/
|
||||
#define GET_UINT32(addr) ({ UINT32 r = *((volatile UINT32 *)((UINTPTR)(addr))); Dsb(); r; })
|
||||
#define GET_UINT32(addr) ({ UINT32 r = *((volatile UINT32 *)((UINTPTR)(addr))); DSB; r; })
|
||||
|
||||
/**
|
||||
* @ingroup los_base
|
||||
* Get a UINT64 value from addr.
|
||||
*/
|
||||
#define GET_UINT64(addr) ({ UINT64 r = *((volatile UINT64 *)((UINTPTR)(addr))); Dsb(); r; })
|
||||
#define GET_UINT64(addr) ({ UINT64 r = *((volatile UINT64 *)((UINTPTR)(addr))); l; r; })
|
||||
|
||||
#ifdef LOSCFG_DEBUG_VERSION
|
||||
#define LOS_ASSERT(judge) do { \
|
||||
|
|
|
@ -73,6 +73,14 @@ extern "C" {
|
|||
#define CLZ(value) (__clz(value))
|
||||
#endif
|
||||
|
||||
#ifndef NORETURN
|
||||
#define NORETURN __declspec(noreturn)
|
||||
#endif
|
||||
|
||||
#ifndef DEPRECATED
|
||||
#define DEPRECATED __attribute__((deprecated))
|
||||
#endif
|
||||
|
||||
/* for IAR Compiler */
|
||||
#elif defined ( __ICCARM__ )
|
||||
|
||||
|
@ -104,6 +112,14 @@ extern "C" {
|
|||
#define CTZ(value) (__UNDEFINED(value))
|
||||
#endif
|
||||
|
||||
#ifndef NORETURN
|
||||
#define NORETURN __attribute__ ((__noreturn__))
|
||||
#endif
|
||||
|
||||
#ifndef DEPRECATED
|
||||
#define DEPRECATED __attribute__((deprecated))
|
||||
#endif
|
||||
|
||||
/* for GNU Compiler */
|
||||
#elif defined ( __GNUC__ )
|
||||
|
||||
|
@ -135,6 +151,14 @@ extern "C" {
|
|||
#define CTZ(value) (__builtin_ctz(value))
|
||||
#endif
|
||||
|
||||
#ifndef NORETURN
|
||||
#define NORETURN __attribute__ ((__noreturn__))
|
||||
#endif
|
||||
|
||||
#ifndef DEPRECATED
|
||||
#define DEPRECATED __attribute__((deprecated))
|
||||
#endif
|
||||
|
||||
#else
|
||||
#error Unknown compiler.
|
||||
#endif
|
||||
|
|
Loading…
Reference in New Issue