410 lines
11 KiB
C
410 lines
11 KiB
C
/*
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* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
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* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this list of
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* conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice, this list
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* of conditions and the following disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific prior written
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* permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "los_timer_pri.h"
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#include "los_tick_pri.h"
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#include "los_sched_pri.h"
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#include "los_sys_pri.h"
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#include "los_hwi.h"
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#include "los_swtmr.h"
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#ifdef __cplusplus
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#if __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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#endif /* __cplusplus */
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STATIC_ASSERT(LOSCFG_KERNEL_SMP != YES, "hisoc timer does not suppot on SMP mode!");
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STATIC_ASSERT(LOSCFG_BASE_CORE_TICK_HW_TIME == YES, "hisoc timer needs to turn on hw time!");
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#define TIMER_ENABLE_BIT 7
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#define TIMER_COUNTING_MODE_BIT 6
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#define TIMER_INTERRUPT_ENABLE_BIT 5
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#define TIMER_FREQUENCY_DIV_BIT 3
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#define TIMER_SIZE_SELECT_BIT 1
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#define TIMER_ONESHOT_BIT 0
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#define READ_TIMER (*(volatile UINT32 *)(TIMER_TICK_REG_BASE + TIMER_VALUE))
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#define US_PER_MS 1000
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#define MS_PER_S 1000
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STATIC UINT32 g_timeStamp __attribute__((section(".data.init")));
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STATIC UINT32 g_lastDec __attribute__((section(".data.init")));
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STATIC volatile UINT64 g_schedClockNanosec = 0;
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STATIC volatile UINT64 g_schedClockCycle = 0;
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STATIC volatile UINT32 g_timeClkLast = 0;
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STATIC UINT16 g_swtmrID;
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VOID HalClockTickTimerReload(UINT64 period)
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{
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UINT32 cycle = (UINT32)period;
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WRITE_UINT32(cycle, TIMER_TICK_REG_BASE + TIMER_LOAD);
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WRITE_UINT32(cycle, TIMER_TICK_REG_BASE + TIMER_BGLOAD);
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HalClockIrqClear();
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HalIrqClear(NUM_HAL_INTERRUPT_TIMER);
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}
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VOID ResetTimerMasked(VOID)
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{
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g_lastDec = READ_TIMER;
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g_timeStamp = 0;
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}
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UINT32 GetTimerMasked(VOID)
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{
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UINT32 now = READ_TIMER;
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if (g_lastDec >= now) {
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/* not roll back */
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g_timeStamp += g_lastDec - now;
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} else {
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/* rollback */
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g_timeStamp += g_lastDec + (g_sysClock / LOSCFG_BASE_CORE_TICK_PER_SECOND) - now;
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}
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g_lastDec = now;
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return g_timeStamp;
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}
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UINT32 TimeClockRead(VOID)
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{
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UINT32 value;
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READ_UINT32(value, TIMER_TIME_REG_BASE + TIMER_VALUE);
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value = TIMER_MAXLOAD - value;
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return value;
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}
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UINT32 ArchTimerRollback(VOID)
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{
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UINT32 flag;
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READ_UINT32(flag, TIMER_TICK_REG_BASE + TIMER_RIS);
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return flag;
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}
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/* this func is start timer2 for start time */
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VOID HalClockInitStart(VOID)
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{
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UINT32 temp;
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/*
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* enable timer2 here,
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* but only time0 is used for system clock.
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*/
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READ_UINT32(temp, SYS_CTRL_REG_BASE + REG_SC_CTRL);
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temp |= TIMER2_ENABLE;
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WRITE_UINT32(temp, SYS_CTRL_REG_BASE + REG_SC_CTRL);
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/* init the timestamp and lastdec value */
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ResetTimerMasked();
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/* disable timer2 */
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WRITE_UINT32(0x0, TIMER2_REG_BASE + TIMER_CONTROL);
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/* set init value as period */
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WRITE_UINT32(TIMER_MAXLOAD, TIMER2_REG_BASE + TIMER_LOAD);
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/*
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* Timing mode: 32bits [bit 1 set as 1]
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* ticking with 1/256 clock frequency [bit 3 set as 1, bit 2 set as 0]
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* timing circulary [bit 6 set as 1]
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* timer enabled [bit 7 set as 1]
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*/
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temp = (1U << TIMER_ENABLE_BIT) | (1U << TIMER_COUNTING_MODE_BIT) |
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(1U << TIMER_FREQUENCY_DIV_BIT) | (1U << TIMER_SIZE_SELECT_BIT);
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WRITE_UINT32(temp, TIMER2_REG_BASE + TIMER_CONTROL);
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}
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UINT32 GetTimer2Value(VOID)
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{
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UINT32 temp;
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READ_UINT32(temp, TIMER2_REG_BASE + TIMER_VALUE);
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return temp;
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}
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UINT32 HalClockGetTickTimerCycles(VOID)
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{
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UINT32 temp;
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READ_UINT32(temp, TIMER_TICK_REG_BASE + TIMER_VALUE);
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return temp;
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}
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/* get the system ms clock since the system start */
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UINT32 HiGetMsClock(VOID)
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{
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const UINT32 t32 = TIMER_MAXLOAD - GetTimer2Value();
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UINT64 t64 = (UINT64)t32 << 0x8; /* Timer2 is divided by 256, left shift 8 to recover sys clock */
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UINT64 temp = OS_TIME_TIMER_CLOCK / MS_PER_S;
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return (UINT32)(t64 / temp);
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}
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VOID HalClockInit(VOID)
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{
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UINT32 temp;
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UINT32 period = g_sysClock / LOSCFG_BASE_CORE_TICK_PER_SECOND;
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/*
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* enable time0, timer1 here,
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* but only time0 is used for system clock.
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*/
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READ_UINT32(temp, SYS_CTRL_REG_BASE + REG_SC_CTRL);
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temp |= TIMER_TICK_ENABLE | TIMER_TIME_ENABLE;
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WRITE_UINT32(temp, SYS_CTRL_REG_BASE + REG_SC_CTRL);
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/* disable first */
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WRITE_UINT32(0x0, TIMER_TICK_REG_BASE + TIMER_CONTROL);
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/* set init value as period */
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WRITE_UINT32(period, TIMER_TICK_REG_BASE + TIMER_LOAD);
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/*
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* Timing mode: 32bits [bit 1 set as 1]
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* ticking with 1/1 clock frequency [bit 3 set as 0, bit 2 set as 0]
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* interrupt enabled [bit 5 set as 1]
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* timing circulary [bit 6 set as 1]
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*/
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temp = (1U << 6) | (1U << 5) | (1U << 1);
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WRITE_UINT32(temp, TIMER_TICK_REG_BASE + TIMER_CONTROL);
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/* init the timestamp and lastdec value */
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ResetTimerMasked();
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/* disable timer1 */
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WRITE_UINT32(0x0, TIMER_TIME_REG_BASE + TIMER_CONTROL);
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/* set init value as period */
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WRITE_UINT32(0xffffffff, TIMER_TIME_REG_BASE + TIMER_LOAD);
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/*
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* Timing mode: 32bits [bit 1 set as 1]
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* ticking with 1/1 clock frequency [bit 3 set as 0, bit 2 set as 0]
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* timing circulary [bit 6 set as 1]
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* timer enabled [bit 7 set as 1]
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*/
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temp = (1U << 7) | (1U << 6) | (1U << 1);
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WRITE_UINT32(temp, TIMER_TIME_REG_BASE + TIMER_CONTROL);
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(void)LOS_HwiCreate(NUM_HAL_INTERRUPT_TIMER, 0xa0, 0, OsTickHandler, 0);
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}
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VOID HalClockIrqClear(VOID)
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{
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WRITE_UINT32(1, TIMER_TICK_REG_BASE + TIMER_INT_CLR);
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}
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VOID HalClockEnable(VOID)
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{
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UINT32 val;
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val = GET_UINT32(TIMER_TICK_REG_BASE + TIMER_CONTROL);
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/* timer enabled [bit 7 set as 1] */
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val |= 1U << TIMER_ENABLE_BIT;
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WRITE_UINT32(val, TIMER_TICK_REG_BASE + TIMER_CONTROL);
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}
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/* Delay for some number of micro-seconds */
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UINT32 GetTimer(UINT32 base)
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{
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return GetTimerMasked() - base;
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}
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VOID HalClockDelayUs(UINT32 usecs)
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{
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UINT32 tmo = 0;
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UINT32 tmp;
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UINT32 intSave = LOS_IntLock();
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/* part of usecs >= 1ms */
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if (usecs >= US_PER_MS) {
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tmo = usecs / US_PER_MS; /* start to normalize for usec to cycles per sec */
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tmo *= (g_sysClock / MS_PER_S); /* largest msecond 1374389 */
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usecs -= (usecs / US_PER_MS * US_PER_MS); /* get value of usecs < 1ms */
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}
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/* part of usecs < 1ms */
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if (usecs) {
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tmo += (usecs * (g_sysClock / MS_PER_S)) / US_PER_MS; /* translate us into sys_clock, prevent u32 overflow */
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}
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/* reset "advancing" timestamp to 0, set lastdec value */
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ResetTimerMasked();
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tmp = GetTimer(0); /* get current timestamp */
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/* set advancing stamp wake up time */
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tmo += tmp;
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while (GetTimerMasked() < tmo) {}
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LOS_IntRestore(intSave);
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}
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VOID HalClockFreqWrite(UINT32 freq)
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{
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PRINT_WARN("hisoc timer does not support setting frequency\n");
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}
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STATIC UINT32 UpdateTimeClk(UINT32 *timeClk)
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{
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UINT32 timeClkNow;
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timeClkNow = TimeClockRead();
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if (timeClkNow >= g_timeClkLast) {
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*timeClk = timeClkNow - g_timeClkLast;
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} else {
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*timeClk = timeClkNow + (TIMER_MAXLOAD - g_timeClkLast);
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}
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return timeClkNow;
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}
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VOID UpdateSchedClock(VOID)
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{
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UINT32 timeClk;
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UINT32 intSave;
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intSave = LOS_IntLock();
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g_timeClkLast = UpdateTimeClk(&timeClk);
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g_schedClockCycle += (UINT64)timeClk;
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g_schedClockNanosec += (UINT64)CYCLE_TO_NS(timeClk);
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OsAdjTime();
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LOS_IntRestore(intSave);
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}
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STATIC UINT64 GetSchedClock(VOID)
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{
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UINT32 timeClk;
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(VOID)UpdateTimeClk(&timeClk);
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return (g_schedClockNanosec + (UINT64)CYCLE_TO_NS(timeClk));
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}
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STATIC UINT64 SchedClock(VOID)
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{
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UINT32 intSave;
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UINT64 timeClk64;
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intSave = LOS_IntLock();
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timeClk64 = GetSchedClock();
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LOS_IntRestore(intSave);
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return timeClk64;
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}
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UINT64 hi_sched_clock(VOID)
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{
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return SchedClock();
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}
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VOID SchedClockSwtmr(VOID)
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{
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UINT32 ret;
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ret = LOS_SwtmrCreate(SCHED_CLOCK_INTETRVAL_TICKS, LOS_SWTMR_MODE_PERIOD,
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(SWTMR_PROC_FUNC)UpdateSchedClock, &g_swtmrID, 0);
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if (ret != LOS_OK) {
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PRINT_ERR("LOS_SwtmrCreate error %u\n", ret);
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return;
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}
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ret = LOS_SwtmrStart(g_swtmrID);
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if (ret != LOS_OK) {
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PRINT_ERR("LOS_SwtmrStart error %u\n", ret);
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return;
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}
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}
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LITE_OS_SEC_TEXT_INIT VOID HalClockStart(VOID)
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{
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UINT32 ret = OsSchedSetTickTimerType(32); /* 32 bit tick timer */
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if (ret != LOS_OK) {
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return;
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}
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HalIrqUnmask(NUM_HAL_INTERRUPT_TIMER);
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HalClockEnable();
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/* start adjusting swtmer */
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SchedClockSwtmr();
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g_cycle2NsScale = ((double)OS_SYS_NS_PER_SECOND / ((long)OS_TIME_TIMER_CLOCK));
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}
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UINT64 HalClockGetCycles(VOID)
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{
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UINT32 timeClk;
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UINT32 intSave;
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UINT64 cycle;
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intSave = LOS_IntLock();
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(VOID)UpdateTimeClk(&timeClk);
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cycle = g_schedClockCycle + (UINT64)timeClk;
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LOS_IntRestore(intSave);
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return cycle;
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}
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VOID HalDelayUs(UINT32 usecs)
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{
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UINT32 tmo = 0;
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UINT32 tmp;
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UINT32 intSave = LOS_IntLock();
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/* part of usecs >= 1ms */
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if (usecs >= US_PER_MS) {
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tmo = usecs / US_PER_MS; /* start to normalize for usec to cycles per sec */
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tmo *= (g_sysClock / MS_PER_S); /* largest msecond 1374389 */
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usecs -= (usecs / US_PER_MS * US_PER_MS); /* get value of usecs < 1ms */
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}
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/* part of usecs < 1ms */
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if (usecs) {
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tmo += (usecs * (g_sysClock / MS_PER_S)) / US_PER_MS; /* translate us into sys_clock, prevent u32 overflow */
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}
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/* reset "advancing" timestamp to 0, set lastdec value */
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ResetTimerMasked();
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tmp = GetTimer(0); /* get current timestamp */
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/* set advancing stamp wake up time */
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tmo += tmp;
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while (GetTimerMasked() < tmo) {}
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LOS_IntRestore(intSave);
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}
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#ifdef __cplusplus
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#if __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* __cplusplus */
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