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xiuos-test
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sync with upstream

This commit is contained in:
Wang_Weigen 2021-11-25 14:26:45 +08:00
parent f24189d7e1 86b1d9c77d
commit 592ca413e8
176 changed files with 51595 additions and 663 deletions
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16
APP_Framework/Applications/framework_init.c
View File

@ -20,7 +20,9 @@ extern int Adapter4GInit(void);
extern int AdapterNbiotInit(void);
extern int AdapterBlueToothInit(void);
extern int AdapterWifiInit(void);
extern int AdapterEthernetInit(void);
extern int AdapterZigbeeInit(void);
extern int AdapterLoraInit(void);
extern int D124VoiceInit(void);
extern int Hs300xTemperatureInit(void);
@ -93,19 +95,25 @@ static struct InitDesc sensor_desc[] =
static struct InitDesc connection_desc[] =
{
#ifdef CONNECTION_ADAPTER_4G
{ "4G adpter", Adapter4GInit},
{ "4G adapter", Adapter4GInit},
#endif
#ifdef CONNECTION_ADAPTER_NB
{ "NB adpter", AdapterNbiotInit},
#endif
#ifdef CONNECTION_ADAPTER_ZIGBEE
{ "zigbee adpter", AdapterZigbeeInit},
{ "zigbee adapter", AdapterZigbeeInit},
#endif
#ifdef CONNECTION_ADAPTER_BLUETOOTH
{ "BlueTooth adpter", AdapterBlueToothInit},
{ "bluetooth adapter", AdapterBlueToothInit},
#endif
#ifdef CONNECTION_ADAPTER_WIFI
{ "Wifi adpter", AdapterWifiInit},
{ "wifi adapter", AdapterWifiInit},
#endif
#ifdef CONNECTION_ADAPTER_ETHERNET
{ "ethernet adapter", AdapterEthernetInit},
#endif
#ifdef CONNECTION_ADAPTER_LORA
{ "lora adapter", AdapterLoraInit},
#endif
{ "NULL", NULL },
};

7
APP_Framework/Framework/connection/adapter.c
View File

@ -395,7 +395,7 @@ int AdapterDeviceConnect(struct Adapter *adapter, enum NetRoleType net_role, con
* @param priv_net_group - private net group
* @return success: 0 , failure: other
*/
int AdapterDeviceJoin(struct Adapter *adapter, const char *priv_net_group)
int AdapterDeviceJoin(struct Adapter *adapter, unsigned char *priv_net_group)
{
if (!adapter)
return -1;
@ -419,9 +419,10 @@ int AdapterDeviceJoin(struct Adapter *adapter, const char *priv_net_group)
/**
* @description: Adapter disconnect from ip net or private net group
* @param adapter - adapter device pointer
* @param priv_net_group - private net group for PRIVATE_PROTOCOL quit function
* @return success: 0 , failure: other
*/
int AdapterDeviceDisconnect(struct Adapter *adapter)
int AdapterDeviceDisconnect(struct Adapter *adapter, unsigned char *priv_net_group)
{
if (!adapter)
return -1;
@ -432,7 +433,7 @@ int AdapterDeviceDisconnect(struct Adapter *adapter)
if (NULL == priv_done->quit)
return -1;
return priv_done->quit(adapter);
return priv_done->quit(adapter, priv_net_group);
} else if (IP_PROTOCOL == adapter->net_protocol) {
struct IpProtocolDone *ip_done = (struct IpProtocolDone *)adapter->done;

15
APP_Framework/Framework/connection/adapter.h
View File

@ -90,6 +90,7 @@ enum NetRoleType
COORDINATOR,
ROUTER,
END_DEVICE,
GATEWAY,
ROLE_NONE,
};
@ -147,10 +148,10 @@ struct PrivProtocolDone
int (*setdhcp)(struct Adapter *adapter, int enable);
int (*ping)(struct Adapter *adapter, const char *destination);
int (*netstat)(struct Adapter *adapter);
int (*join)(struct Adapter *adapter, const char *priv_net_group);
int (*join)(struct Adapter *adapter, unsigned char *priv_net_group);
int (*send)(struct Adapter *adapter, const void *buf, size_t len);
int (*recv)(struct Adapter *adapter, void *buf, size_t len);
int (*quit)(struct Adapter *adapter);
int (*quit)(struct Adapter *adapter, unsigned char *priv_net_group);
};
struct Adapter
@ -164,6 +165,7 @@ struct Adapter
struct Socket socket;
int net_role_id;
enum NetProtocolType net_protocol;
enum NetRoleType net_role;
enum AdapterStatus adapter_status;
@ -171,6 +173,7 @@ struct Adapter
char buffer[ADAPTER_BUFFSIZE];
void *done;
void *adapter_param;
struct DoublelistNode link;
};
@ -206,10 +209,10 @@ int AdapterDeviceControl(struct Adapter *adapter, int cmd, void *args);
int AdapterDeviceConnect(struct Adapter *adapter, enum NetRoleType net_role, const char *ip, const char *port, enum IpType ip_type);
/*Join to a certain private net, only support PRIVATE_PROTOCOL*/
int AdapterDeviceJoin(struct Adapter *adapter, const char *priv_net_group);
int AdapterDeviceJoin(struct Adapter *adapter, unsigned char *priv_net_group);
/*Adapter disconnect from ip net or private net group*/
int AdapterDeviceDisconnect(struct Adapter *adapter);
int AdapterDeviceDisconnect(struct Adapter *adapter, unsigned char *priv_net_group);
/*Set up to net*/
int AdapterDeviceSetUp(struct Adapter *adapter);
@ -220,10 +223,10 @@ int AdapterDeviceSetDown(struct Adapter *adapter);
/*Set ip/gateway/netmask address*/
int AdapterDeviceSetAddr(struct Adapter *adapter, const char *ip, const char *gateway, const char *netmask);
/**/
/*Set DNS function*/
int AdapterDeviceSetDns(struct Adapter *adapter, const char *dns_addr, uint8 dns_count);
/**/
/*Set DHCP function*/
int AdapterDeviceSetDhcp(struct Adapter *adapter, int enable);
/*ping function*/

37
APP_Framework/Framework/connection/adapter_agent.c
View File

@ -117,10 +117,10 @@ int ParseATReply(char *str, const char *format, ...)
return counts;
}
uint32 ATSprintf(int fd, const char *format, va_list params)
void ATSprintf(int fd, const char *format, va_list params)
{
last_cmd_len = vsnprintf(send_buf, sizeof(send_buf), format, params);
printf("ATSprintf send %s len %u\n",send_buf, last_cmd_len);
printf("AT send %s len %u\n",send_buf, last_cmd_len);
PrivWrite(fd, send_buf, last_cmd_len);
}
@ -128,7 +128,7 @@ int ATOrderSend(ATAgentType agent, uint32 timeout_s, ATReplyType reply, const ch
{
if (agent == NULL) {
printf("ATAgent is null");
return -ERROR;
return -1;
}
struct timespec abstime;
@ -146,7 +146,7 @@ int ATOrderSend(ATAgentType agent, uint32 timeout_s, ATReplyType reply, const ch
va_list params;
uint32 cmd_size = 0;
uint32 result = EOK;
uint32 result = 0;
const char *cmd = NULL;
agent->reply = reply;
@ -227,35 +227,35 @@ char *GetReplyText(ATReplyType reply)
int AtSetReplyLrEnd(ATAgentType agent, char enable)
{
if (!agent) {
return -ERROR;
return -1;
}
agent->reply_lr_end = enable;
return EOK;
return 0;
}
int AtSetReplyEndChar(ATAgentType agent, char last_ch, char end_ch)
{
if (!agent) {
return -ERROR;
return -1;
}
agent->reply_end_last_char = last_ch;
agent->reply_end_char = end_ch;
return EOK;
return 0;
}
int AtSetReplyCharNum(ATAgentType agent, unsigned int num)
{
if (!agent) {
return -ERROR;
return -1;
}
agent->reply_char_num = num;
return EOK;
return 0;
}
int EntmSend(ATAgentType agent, const char *data, int len)
@ -476,13 +476,12 @@ static void *ATAgentReceiveProcess(void *param)
static int ATAgentInit(ATAgentType agent)
{
int result = EOK;
UtaskType at_utask;
int result = 0;
agent->maintain_len = 0;
agent->maintain_buffer = (char *)PrivMalloc(agent->maintain_max);
if (agent->maintain_buffer == NONE) {
if (agent->maintain_buffer == NULL) {
printf("ATAgentInit malloc maintain_buffer error\n");
goto __out;
}
@ -518,7 +517,7 @@ static int ATAgentInit(ATAgentType agent)
__out:
DeleteATAgent(agent);
result = -ERROR;
result = -1;
return result;
}
@ -526,9 +525,9 @@ __out:
int InitATAgent(const char *agent_name, int agent_fd, uint32 maintain_max)
{
int i = 0;
int result = EOK;
int open_result = EOK;
struct ATAgent *agent = NONE;
int result = 0;
int open_result = 0;
struct ATAgent *agent = NULL;
if (GetATAgent(agent_name) != NULL) {
return result;
@ -540,7 +539,7 @@ int InitATAgent(const char *agent_name, int agent_fd, uint32 maintain_max)
if (i >= AT_AGENT_MAX) {
printf("agent buffer(%d) is full.", AT_AGENT_MAX);
result = -ERROR;
result = -1;
return result;
}
@ -553,7 +552,7 @@ int InitATAgent(const char *agent_name, int agent_fd, uint32 maintain_max)
agent->maintain_max = maintain_max;
result = ATAgentInit(agent);
if (result == EOK) {
if (result == 0) {
PrivTaskStartup(&agent->at_handler);
}

8
APP_Framework/Framework/connection/bluetooth/adapter_bluetooth.c
View File

@ -24,7 +24,7 @@
extern AdapterProductInfoType Hc08Attach(struct Adapter *adapter);
#endif
#define ADAPTER_BLUETOOTH_NAME "BlueTooth"
#define ADAPTER_BLUETOOTH_NAME "bluetooth"
static int AdapterBlueToothRegister(struct Adapter *adapter)
{
@ -50,7 +50,7 @@ int AdapterBlueToothInit(void)
struct Adapter *adapter = PrivMalloc(sizeof(struct Adapter));
if (!adapter) {
free(adapter);
PrivFree(adapter);
return -1;
}
@ -59,7 +59,7 @@ int AdapterBlueToothInit(void)
ret = AdapterBlueToothRegister(adapter);
if (ret < 0) {
printf("AdapterBlueToothInit register BT adapter error\n");
free(adapter);
PrivFree(adapter);
return -1;
}
@ -67,7 +67,7 @@ int AdapterBlueToothInit(void)
AdapterProductInfoType product_info = Hc08Attach(adapter);
if (!product_info) {
printf("AdapterBlueToothInit hc08 attach error\n");
free(adapter);
PrivFree(adapter);
return -1;
}

9
APP_Framework/Framework/connection/ethernet/Kconfig
View File

@ -0,0 +1,9 @@
config ADAPTER_HFA21_ETHERNET
help
Please check HFA21 can only work for adapter_wifi or adapter_ethernet in the meantime!
bool "Using ethernet adapter device HFA21"
default n
if ADAPTER_HFA21_ETHERNET
source "$APP_DIR/Framework/connection/ethernet/hfa21_ethernet/Kconfig"
endif

4
APP_Framework/Framework/connection/ethernet/Makefile
View File

@ -1,3 +1,7 @@
SRC_FILES := adapter_ethernet.c
ifeq ($(CONFIG_ADAPTER_HFA21_ETHERNET),y)
SRC_DIR += hfa21_ethernet
endif
include $(KERNEL_ROOT)/compiler.mk

109
APP_Framework/Framework/connection/ethernet/adapter_ethernet.c
View File

@ -15,5 +15,112 @@
* @brief Implement the connection ethernet adapter function
* @version 1.1
* @author AIIT XUOS Lab
* @date 2021.06.25
* @date 2021.10.15
*/
#include <adapter.h>
#ifdef ADAPTER_HFA21_ETHERNET
extern AdapterProductInfoType Hfa21EthernetAttach(struct Adapter *adapter);
#endif
#define ADAPTER_ETHERNET_NAME "ethernet"
static int AdapterEthernetRegister(struct Adapter *adapter)
{
int ret = 0;
strncpy(adapter->name, ADAPTER_ETHERNET_NAME, NAME_NUM_MAX);
adapter->net_protocol = IP_PROTOCOL;
adapter->adapter_status = UNREGISTERED;
ret = AdapterDeviceRegister(adapter);
if (ret < 0) {
printf("AdapterEthernet register error\n");
return -1;
}
return ret;
}
int AdapterEthernetInit(void)
{
int ret = 0;
struct Adapter *adapter = PrivMalloc(sizeof(struct Adapter));
if (!adapter) {
printf("AdapterEthernetInit malloc error\n");
PrivFree(adapter);
return -1;
}
memset(adapter, 0, sizeof(struct Adapter));
ret = AdapterEthernetRegister(adapter);
if (ret < 0) {
printf("AdapterEthernetInit register ethernet adapter error\n");
PrivFree(adapter);
return -1;
}
#ifdef ADAPTER_HFA21_ETHERNET
AdapterProductInfoType product_info = Hfa21EthernetAttach(adapter);
if (!product_info) {
printf("AdapterEthernetInit hfa21 attach error\n");
PrivFree(adapter);
return -1;
}
adapter->product_info_flag = 1;
adapter->info = product_info;
adapter->done = product_info->model_done;
#endif
return ret;
}
/******************ethernet TEST*********************/
int AdapterEthernetTest(void)
{
int baud_rate = BAUD_RATE_57600;
struct Adapter *adapter = AdapterDeviceFindByName(ADAPTER_ETHERNET_NAME);
#ifdef ADAPTER_HFA21_ETHERNET
char ethernet_recv_msg[128] = {0};
int i, len = 0;
const char *ethernet_msg = "Adapter Ethernet Test";
AdapterDeviceOpen(adapter);
AdapterDeviceControl(adapter, OPE_INT, &baud_rate);
AdapterDeviceSetUp(adapter);
const char *ip = "10.10.100.50";
const char *port = "12345";
enum NetRoleType net_role = SERVER;//CLIENT
enum IpType ip_type = IPV4;
AdapterDeviceConnect(adapter, net_role, ip, port, ip_type);
printf("ready to test data transfer\n");
len = strlen(ethernet_msg);
for (i = 0;i < 10; i ++) {
printf("AdapterEthernetTest send %s\n", ethernet_msg);
AdapterDeviceSend(adapter, ethernet_msg, len);
PrivTaskDelay(4000);
}
while (1) {
AdapterDeviceRecv(adapter, ethernet_recv_msg, 128);
printf("AdapterEthernetTest recv %s\n", ethernet_recv_msg);
memset(ethernet_recv_msg, 0, 128);
}
#endif
return 0;
}
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHELL_CMD_PARAM_NUM(0)|SHELL_CMD_DISABLE_RETURN, AdapterEthernetTest, AdapterEthernetTest, show adapter ethernet information);

33
APP_Framework/Framework/connection/ethernet/hfa21_ethernet/Kconfig Normal file
View File

@ -0,0 +1,33 @@
config ADAPTER_ETHERNET_HFA21
string "HFA21 ETHERNET adapter name"
default "hfa21_ethernet"
if ADD_XIUOS_FETURES
config ADAPTER_HFA21_DRIVER_EXTUART
bool "Using extra uart to support ethernet"
default n
config ADAPTER_HFA21_DRIVER
string "HFA21 device uart driver path"
default "/dev/usart3_dev3"
depends on !ADAPTER_HFA21_DRIVER_EXTUART
if ADAPTER_HFA21_DRIVER_EXTUART
config ADAPTER_HFA21_DRIVER
string "HFA21 device extra uart driver path"
default "/dev/extuart_dev6"
config ADAPTER_HFA21_DRIVER_EXT_PORT
int "if HFA21 device using extuart, choose port"
default "6"
endif
endif
if ADD_NUTTX_FETURES
endif
if ADD_RTTHREAD_FETURES
endif

3
APP_Framework/Framework/connection/ethernet/hfa21_ethernet/Makefile Normal file
View File

@ -0,0 +1,3 @@
SRC_FILES := hfa21_ethernet.c
include $(KERNEL_ROOT)/compiler.mk

453
APP_Framework/Framework/connection/ethernet/hfa21_ethernet/hfa21_ethernet.c Normal file
View File

@ -0,0 +1,453 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file hfa21_ethernet.c
* @brief Implement the connection ethernet adapter function, using HFA21 device
* @version 1.1
* @author AIIT XUOS Lab
* @date 2021.10.15
*/
#include <adapter.h>
#include <at_agent.h>
#define HFA21_ETHERNET_AT_CMD "+++"
#define HFA21_ETHERNET_AT_CONFIRM_CMD "a"
#define HFA21_ETHERNET_AT_FCLR_CMD "AT+FCLR\r"
#define HFA21_ETHERNET_AT_FEPHY_CMD "AT+FEPHY=on\r"
#define HFA21_ETHERNET_AT_ENABLE_WANN_CMD "AT+FVEW=enable\r"
#define HFA21_ETHERNET_AT_DISABLE_WANN_CMD "AT+FVEW=disable\r"
#define HFA21_ETHERNET_AT_RELD_CMD "AT+RELD\r"
#define HFA21_ETHERNET_AT_WMODE_CMD "AT+WMODE\r"
#define HFA21_ETHERNET_AT_WANN_CMD "AT+WANN\r"
#define HFA21_ETHERNET_AT_SET_WANN_CMD "AT+WANN=%s,%s,%s,%s\r"
#define HFA21_ETHERNET_AT_PING_CMD "AT+PING=%s\r"
#define HFA21_ETHERNET_AT_NETP_CMD "AT+NETP=%s,%s,%s,%s\r"
#define HFA21_ETHERNET_AT_REBOOT_CMD "AT+Z\r"
#define HFA21_ETHERNET_OK_REPLY "+ok"
static int Hfa21EthernetSetDown(struct Adapter *adapter_at);
/**
* @description: enter AT command mode
* @param at_agent - ethernet device agent pointer
* @return success: 0
*/
static int Hfa21EthernetInitAtCmd(ATAgentType at_agent)
{
ATOrderSend(at_agent, REPLY_TIME_OUT, NULL, HFA21_ETHERNET_AT_CMD);
PrivTaskDelay(100);
ATOrderSend(at_agent, REPLY_TIME_OUT, NULL, HFA21_ETHERNET_AT_CONFIRM_CMD);
PrivTaskDelay(500);
return 0;
}
/**
* @description: Open HFA21 uart function
* @param adapter - ethernet device pointer
* @return success: 0, failure: -1
*/
static int Hfa21EthernetOpen(struct Adapter *adapter)
{
/*step1: open hfa21 serial port*/
adapter->fd = PrivOpen(ADAPTER_HFA21_DRIVER, O_RDWR);
if (adapter->fd < 0) {
printf("Hfa21EthernetOpen get serial %s fd error\n", ADAPTER_HFA21_DRIVER);
return -1;
}
/*step2: init AT agent*/
if (!adapter->agent) {
char *agent_name = "ethernet_uart_client";
if (EOK != InitATAgent(agent_name, adapter->fd, 512)) {
printf("at agent init failed !\n");
return -1;
}
ATAgentType at_agent = GetATAgent(agent_name);
adapter->agent = at_agent;
}
ADAPTER_DEBUG("Hfa21Ethernet open done\n");
return 0;
}
/**
* @description: Close HFA21 ethernet and uart function
* @param adapter - ethernet device pointer
* @return success: 0
*/
static int Hfa21EthernetClose(struct Adapter *adapter)
{
return Hfa21EthernetSetDown(adapter);
}
/**
* @description: send data to adapter
* @param adapter - ethernet device pointer
* @param data - data buffer
* @param data - data length
* @return success: 0
*/
static int Hfa21EthernetSend(struct Adapter *adapter, const void *data, size_t len)
{
int result = 0;
if (adapter->agent) {
EntmSend(adapter->agent, (const char *)data, len);
}else {
printf("Hfa21EthernetSend can not find agent!\n");
}
__exit:
return result;
}
/**
* @description: receive data from adapter
* @param adapter - ethernet device pointer
* @param data - data buffer
* @param data - data length
* @return success: 0
*/
static int Hfa21EthernetReceive(struct Adapter *adapter, void *rev_buffer, size_t buffer_len)
{
int result = 0;
if (adapter->agent) {
return EntmRecv(adapter->agent, (char *)rev_buffer, buffer_len, 40000);
} else {
printf("Hfa21EthernetReceive can not find agent!\n");
}
__exit:
return result;
}
/**
* @description: connnect Ethernet to internet
* @param adapter - Ethernet device pointer
* @return success: 0
*/
static int Hfa21EthernetSetUp(struct Adapter *adapter)
{
int ret = 0;
AtSetReplyLrEnd(adapter->agent, 1);
/* wait hfa21 device startup finish */
PrivTaskDelay(5000);
/*Step1 : enter AT mode*/
Hfa21EthernetInitAtCmd(adapter->agent);
PrivTaskDelay(1000);
/*Step2 : FCLR reboot*/
ret = AtCmdConfigAndCheck(adapter->agent, HFA21_ETHERNET_AT_FCLR_CMD, HFA21_ETHERNET_OK_REPLY);
if (ret < 0) {
goto __exit;
}
PrivTaskDelay(10000);
Hfa21EthernetInitAtCmd(adapter->agent);
/*Step3 : FEPHY enable phy function*/
ret = AtCmdConfigAndCheck(adapter->agent, HFA21_ETHERNET_AT_FEPHY_CMD, HFA21_ETHERNET_OK_REPLY);
if (ret < 0) {
goto __exit;
}
/*Step4 : FVEW disable WANN function, ethernet work at LANN mode*/
ret = AtCmdConfigAndCheck(adapter->agent, HFA21_ETHERNET_AT_DISABLE_WANN_CMD, HFA21_ETHERNET_OK_REPLY);
if (ret < 0) {
goto __exit;
}
/*Step5 : RELD enable F-AT cmd*/
ret = AtCmdConfigAndCheck(adapter->agent, HFA21_ETHERNET_AT_RELD_CMD, HFA21_ETHERNET_OK_REPLY);
if (ret < 0) {
goto __exit;
}
PrivTaskDelay(10000);
Hfa21EthernetInitAtCmd(adapter->agent);
/*Step6 : AT+WMODE check work mode, AP or STA*/
ret = AtCmdConfigAndCheck(adapter->agent, HFA21_ETHERNET_AT_WMODE_CMD, HFA21_ETHERNET_OK_REPLY);
if (ret < 0) {
goto __exit;
}
/*Step7 : AT+WANN check if get ip、netmask、gateway*/
ret = AtCmdConfigAndCheck(adapter->agent, HFA21_ETHERNET_AT_WANN_CMD, HFA21_ETHERNET_OK_REPLY);
if (ret < 0) {
goto __exit;
}
/*Step8 : AT+Z reboot hfa21 device*/
ret = AtCmdConfigAndCheck(adapter->agent, HFA21_ETHERNET_AT_REBOOT_CMD, HFA21_ETHERNET_OK_REPLY);
if (ret < 0) {
goto __exit;
}
PrivTaskDelay(10000);
return ret;
__exit:
Hfa21EthernetSetDown(adapter);
return -1;
}
/**
* @description: disconnnect ethernet from internet
* @param adapter - ethernet device pointer
* @return success: 0
*/
static int Hfa21EthernetSetDown(struct Adapter *adapter)
{
Hfa21EthernetInitAtCmd(adapter->agent);
ATOrderSend(adapter->agent, REPLY_TIME_OUT, NULL, HFA21_ETHERNET_AT_FCLR_CMD);
PrivTaskDelay(20000);
return 0;
}
/**
* @description: set ethernet ip/gateway/netmask address(in sta mode) working at WANN mode
* @param adapter - ethernet device pointer
* @param ip - ip address
* @param gateway - gateway address
* @param netmask - netmask address
* @return success: 0, failure: -ENOMEMORY or -1
*/
static int Hfa21EthernetSetAddr(struct Adapter *adapter, const char *ip, const char *gateway, const char *netmask)
{
int ret = 0;
uint8_t hfa21_ethernet_cmd[64];
/*Step1 : enter AT mode*/
Hfa21EthernetInitAtCmd(adapter->agent);
/*Step2 : set mode、ip、netmask and gateway*/
memset(hfa21_ethernet_cmd, 0, sizeof(hfa21_ethernet_cmd));
sprintf(hfa21_ethernet_cmd, HFA21_ETHERNET_AT_SET_WANN_CMD, "DHCP", ip, netmask, gateway);
ret = AtCmdConfigAndCheck(adapter->agent, hfa21_ethernet_cmd, HFA21_ETHERNET_OK_REPLY);
if (ret < 0) {
goto __exit;
}
/*Step3 : AT+WANN check if set ip、netmask、gateway successfully*/
ret = AtCmdConfigAndCheck(adapter->agent, HFA21_ETHERNET_AT_WANN_CMD, HFA21_ETHERNET_OK_REPLY);
if (ret < 0) {
goto __exit;
}
/*Step4 : AT+Z reboot hfa21 device*/
ret = AtCmdConfigAndCheck(adapter->agent, HFA21_ETHERNET_AT_REBOOT_CMD, HFA21_ETHERNET_OK_REPLY);
if (ret < 0) {
goto __exit;
}
PrivTaskDelay(10000);
return ret;
__exit:
Hfa21EthernetSetDown(adapter);
return -1;
}
/**
* @description: ethernet ping function
* @param adapter - ethernet device pointer
* @param destination - domain name or ip address
* @return success: 0, failure: -1
*/
static int Hfa21EthernetPing(struct Adapter *adapter, const char *destination)
{
int ret = 0;
char *ping_result = (char *) PrivCalloc(1, 17);
char *dst = (char *) PrivCalloc(1, 17);
strcpy(dst, destination);
strcat(dst, "\r");
printf("Hfa21EthernetPing [%s]\n", dst);
/*Step1 : enter AT mode*/
Hfa21EthernetInitAtCmd(adapter->agent);
/*Step2 : ping dst ip address*/
ret = AtCmdConfigAndCheck(adapter->agent, HFA21_ETHERNET_AT_PING_CMD, HFA21_ETHERNET_OK_REPLY);
if (ret < 0) {
goto __exit;
}
/*Step3 : AT+Z reboot hfa21 device*/
ret = AtCmdConfigAndCheck(adapter->agent, HFA21_ETHERNET_AT_REBOOT_CMD, HFA21_ETHERNET_OK_REPLY);
if (ret < 0) {
goto __exit;
}
return ret;
__exit:
Hfa21EthernetSetDown(adapter);
return -1;
}
/**
* @description: ethernet connect function
* @param adapter - ethernet device pointer
* @param net_role - net role, CLIENT or SERVER
* @param ip - ip address
* @param port - port num
* @param ip_type - ip type, IPV4 or IPV6
* @return success: 0, failure: -1
*/
static int Hfa21EthernetConnect(struct Adapter *adapter, enum NetRoleType net_role, const char *ip, const char *port, enum IpType ip_type)
{
int ret = 0;
char hfa21_ethernet_cmd[128];
char net_role_string[6] = {0};
/*Step1 : enter AT mode*/
Hfa21EthernetInitAtCmd(adapter->agent);
if (CLIENT == net_role) {
strcpy(net_role_string, "CLIENT");
} else if (SERVER == net_role) {
strcpy(net_role_string, "SERVER");
} else {
printf("Hfa21EthernetConnect do not support %d net type\n", net_role);
return -1;
}
if (IPV4 == ip_type) {
/*to do*/
} else if (IPV6 == ip_type) {
/*to do*/
} else {
printf("Hfa21EthernetConnect do not support %d ip type\n", ip_type);
return -1;
}
/*Step2 : create tcp connect*/
memset(hfa21_ethernet_cmd, 0, sizeof(hfa21_ethernet_cmd));
sprintf(hfa21_ethernet_cmd, HFA21_ETHERNET_AT_NETP_CMD, "TCP", net_role_string, port, ip);
ret = AtCmdConfigAndCheck(adapter->agent, hfa21_ethernet_cmd, HFA21_ETHERNET_OK_REPLY);
if (ret < 0) {
goto __exit;
}
adapter->net_role = net_role;
/*Step3 : AT+Z reboot hfa21 device*/
ret = AtCmdConfigAndCheck(adapter->agent, HFA21_ETHERNET_AT_REBOOT_CMD, HFA21_ETHERNET_OK_REPLY);
if (ret < 0) {
goto __exit;
}
PrivTaskDelay(10000);
return ret;
__exit:
Hfa21EthernetSetDown(adapter);
return -1;
}
static int Hfa21EthernetIoctl(struct Adapter *adapter, int cmd, void *args)
{
if (OPE_INT != cmd) {
printf("Hfa21EthernetIoctl only support OPE_INT, do not support %d\n", cmd);
return -1;
}
uint32_t baud_rate = *((uint32_t *)args);
struct SerialDataCfg serial_cfg;
memset(&serial_cfg, 0 ,sizeof(struct SerialDataCfg));
serial_cfg.serial_baud_rate = baud_rate;
serial_cfg.serial_data_bits = DATA_BITS_8;
serial_cfg.serial_stop_bits = STOP_BITS_1;
serial_cfg.serial_buffer_size = SERIAL_RB_BUFSZ;
serial_cfg.serial_parity_mode = PARITY_NONE;
serial_cfg.serial_bit_order = BIT_ORDER_LSB;
serial_cfg.serial_invert_mode = NRZ_NORMAL;
#ifdef ADAPTER_HFA21_DRIVER_EXT_PORT
serial_cfg.ext_uart_no = ADAPTER_HFA21_DRIVER_EXT_PORT;
serial_cfg.port_configure = PORT_CFG_INIT;
#endif
struct PrivIoctlCfg ioctl_cfg;
ioctl_cfg.ioctl_driver_type = SERIAL_TYPE;
ioctl_cfg.args = &serial_cfg;
PrivIoctl(adapter->fd, OPE_INT, &ioctl_cfg);
printf("Hfa21EthernetIoctl success\n");
return 0;
}
static const struct IpProtocolDone hfa21_ethernet_done =
{
.open = Hfa21EthernetOpen,
.close = Hfa21EthernetClose,
.ioctl = Hfa21EthernetIoctl,
.setup = Hfa21EthernetSetUp,
.setdown = Hfa21EthernetSetDown,
.setaddr = Hfa21EthernetSetAddr,
.setdns = NULL,
.setdhcp = NULL,
.ping = Hfa21EthernetPing,
.netstat = NULL,
.connect = Hfa21EthernetConnect,
.send = Hfa21EthernetSend,
.recv = Hfa21EthernetReceive,
.disconnect = NULL,
};
/**
* @description: Register ethernet device hfa21
* @return success: product_info, failure: NULL
*/
AdapterProductInfoType Hfa21EthernetAttach(struct Adapter *adapter)
{
struct AdapterProductInfo *product_info = PrivMalloc(sizeof(struct AdapterProductInfo));
if (!product_info) {
printf("Hfa21EthernetAttach Attach malloc product_info error\n");
PrivFree(product_info);
return NULL;
}
strcpy(product_info->model_name, ADAPTER_ETHERNET_HFA21);
product_info->model_done = (void *)&hfa21_ethernet_done;
return product_info;
}

30
APP_Framework/Framework/connection/lora/Kconfig
View File

@ -0,0 +1,30 @@
config ADAPTER_SX1278
bool "Using lora adapter device SX1278"
default y
choice
prompt "Lora device adapter select net role type "
default AS_LORA_CLIENT_ROLE
config AS_LORA_GATEWAY_ROLE
bool "config as a gateway"
config AS_LORA_CLIENT_ROLE
bool "config as a client"
endchoice
if AS_LORA_GATEWAY_ROLE
config ADAPTER_LORA_NET_ROLE_ID
hex "if Lora device config as a gateway, set gateway net id"
default "0x10"
endif
if AS_LORA_CLIENT_ROLE
config ADAPTER_LORA_NET_ROLE_ID
hex "if Lora device config as a client, set client net id"
default "0x01"
endif
if ADAPTER_SX1278
source "$APP_DIR/Framework/connection/lora/sx1278/Kconfig"
endif

4
APP_Framework/Framework/connection/lora/Makefile
View File

@ -1,3 +1,7 @@
SRC_FILES := adapter_lora.c
ifeq ($(CONFIG_ADAPTER_SX1278),y)
SRC_DIR += sx1278
endif
include $(KERNEL_ROOT)/compiler.mk

764
APP_Framework/Framework/connection/lora/adapter_lora.c
View File

@ -15,5 +15,767 @@
* @brief Implement the connection lora adapter function
* @version 1.1
* @author AIIT XUOS Lab
* @date 2021.06.25
* @date 2021.10.20
*/
#include <adapter.h>
#ifdef ADAPTER_SX1278
extern AdapterProductInfoType Sx1278Attach(struct Adapter *adapter);
#endif
#define ADAPTER_LORA_NAME "lora"
#define ADAPTER_LORA_CLIENT_NUM 6
#define ADAPTER_LORA_DATA_LENGTH 128
#define ADAPTER_LORA_DATA_HEAD 0x3C
#define ADAPTER_LORA_NET_PANID 0x0102
#define ADAPTER_LORA_DATA_TYPE_JOIN 0x0A
#define ADAPTER_LORA_DATA_TYPE_QUIT 0x0B
#define ADAPTER_LORA_DATA_TYPE_JOIN_REPLY 0x0C
#define ADAPTER_LORA_DATA_TYPE_QUIT_REPLY 0x0D
#define ADAPTER_LORA_DATA_TYPE_USERDATA 0x0E
#define ADAPTER_LORA_DATA_TYPE_CMD 0x0F
//need to change status if the lora client wants to quit the net when timeout or a certain event
//eg.can also use sem to trigger quit function
static int g_adapter_lora_quit_flag = 0;
enum ClientState
{
CLIENT_DISCONNECT = 0,
CLIENT_CONNECT,
CLIENT_DEFAULT,
};
enum DataType
{
LORA_CLIENT_ACCESS = 0,
LORA_GATEWAY_REPLY,
LORA_USER_DATA,
};
enum LoraGatewayState {
LORA_STATE_IDLE = 0,
LORA_JOIN_NET,
LORA_QUIT_NET,
LORA_RECV_DATA,
};
static uint8 LoraGatewayState = LORA_STATE_IDLE;
struct LoraGatewayParam
{
uint8 gateway_id;
uint16 panid;
uint8 client_id[ADAPTER_LORA_CLIENT_NUM];
int client_num;
int receive_data_sem;
};
struct LoraClientParam
{
uint8 client_id;
uint16 panid;
enum ClientState client_state;
uint8 gateway_id;
};
/*LoraDataFormat:
**flame_head : 0x3C
**length : sizeof(struct LoraDataFormat)
**panid : 0x0102
**client_id : 0x01、0x02、0x03...
**gateway_id : 0x11、0x12、0x13...
**data_type : 0x0A(join net, client->gateway)、0x0B(join net reply, gateway->client)、
0x0C(user data, client->gateway)、0x0D(user data cmd, gateway->client)
**data : user data
**crc16 : CRC 16 check data
*/
struct LoraDataFormat
{
uint8 flame_head;
uint32 length;
uint16 panid;
uint8 client_id;
uint8 gateway_id;
uint8 data_type;
uint8 data[ADAPTER_LORA_DATA_LENGTH];
uint16 crc16;
};
/*******************LORA MESH FUNCTION***********************/
/**
* @description: create CRC16 data
* @param data input data buffer
* @param length input data buffer minus check code
*/
static uint16 LoraCrc16(uint8 *data, uint16 length)
{
int j;
uint16 crc_data = 0xFFFF;
while (length--) {
crc_data ^= *data++;
for( j = 0 ; j < 8 ; j ++) {
if(crc_data & 0x01) /* LSB(b0)=1 */
crc_data = crc_data >> 1 ^ 0xA001;
else
crc_data = crc_data >> 1;
}
}
return crc_data;
}
/**
* @description: CRC16 check
* @param data input data buffer
* @param length input data buffer minus check code
*/
static int LoraCrc16Check(uint8 *data, uint16 length)
{
uint16 crc_data;
uint16 input_data = (((uint16)data[length - 1] << 8) & 0xFF00) | ((uint16)data[length - 2] & 0x00FF);
crc_data = LoraCrc16(data, length - 2);
if (crc_data == input_data)
return 0;
else
return -1;
}
/**
* @description: Lora Gateway reply connect request to Client
* @param adapter Lora adapter pointer
* @param gateway_recv_data Lora Client connect data
*/
static int LoraGatewayReply(struct Adapter *adapter, struct LoraDataFormat *gateway_recv_data)
{
int i;
int client_join_flag = 0;
struct LoraGatewayParam *gateway = (struct LoraGatewayParam *)adapter->adapter_param;
struct LoraDataFormat gateway_reply_data;
memset(&gateway_reply_data, 0, sizeof(struct LoraDataFormat));
if (ADAPTER_LORA_DATA_TYPE_JOIN == gateway_recv_data->data_type) {
for (i = 0; i < gateway->client_num; i ++) {
if (gateway_recv_data->client_id == gateway->client_id[i]) {
printf("Lora client_%d 0x%x has already join net 0x%x\n", i, gateway_recv_data->client_id, gateway->gateway_id);
client_join_flag = 1;
break;
}
}
if (!client_join_flag) {
if (gateway->client_num > 6) {
printf("Lora gateway only support 6(max) client\n");
gateway->client_num = 0;
}
gateway->client_id[gateway->client_num] = gateway_recv_data->client_id;
gateway->client_num ++;
}
gateway_reply_data.flame_head = ADAPTER_LORA_DATA_HEAD;
gateway_reply_data.length = sizeof(struct LoraDataFormat);
gateway_reply_data.panid = gateway->panid;
gateway_reply_data.data_type = ADAPTER_LORA_DATA_TYPE_JOIN_REPLY;
gateway_reply_data.client_id = gateway_recv_data->client_id;
gateway_reply_data.gateway_id = gateway->gateway_id;
gateway_reply_data.crc16 = LoraCrc16((uint8 *)&gateway_reply_data, sizeof(struct LoraDataFormat) - 2);
if (AdapterDeviceSend(adapter, (uint8 *)&gateway_reply_data, gateway_reply_data.length) < 0) {
return -1;
}
printf("Lora gateway 0x%x accept client 0x%x <join request>\n", gateway->gateway_id, gateway_recv_data->client_id);
} else if (ADAPTER_LORA_DATA_TYPE_QUIT == gateway_recv_data->data_type) {
for (i = 0; i < gateway->client_num; i ++) {
if (gateway->client_id[i] == gateway_recv_data->client_id) {
gateway->client_id[i] = 0;
gateway->client_num --;
break;
}
}
gateway_reply_data.flame_head = ADAPTER_LORA_DATA_HEAD;
gateway_reply_data.length = sizeof(struct LoraDataFormat);
gateway_reply_data.panid = gateway->panid;
gateway_reply_data.data_type = ADAPTER_LORA_DATA_TYPE_QUIT_REPLY;
gateway_reply_data.client_id = gateway_recv_data->client_id;
gateway_reply_data.gateway_id = gateway->gateway_id;
gateway_reply_data.crc16 = LoraCrc16((uint8 *)&gateway_reply_data, sizeof(struct LoraDataFormat) - 2);
if (AdapterDeviceSend(adapter, (uint8 *)&gateway_reply_data, gateway_reply_data.length) < 0) {
return -1;
}
printf("Lora gateway 0x%x accept client 0x%x <quit request>\n", gateway->gateway_id, gateway_recv_data->client_id);
}
return 0;
}
/**
* @description: Lora Gateway send cmd to Client
* @param adapter Lora adapter pointer
* @param client_id Lora Client id
* @param cmd Lora cmd
*/
static int LoraGatewaySendCmd(struct Adapter *adapter, unsigned char client_id, int cmd)
{
struct LoraGatewayParam *gateway = (struct LoraGatewayParam *)adapter->adapter_param;
struct LoraDataFormat gateway_cmd_data;
memset(&gateway_cmd_data, 0, sizeof(struct LoraDataFormat));
gateway_cmd_data.flame_head = ADAPTER_LORA_DATA_HEAD;
gateway_cmd_data.length = sizeof(struct LoraDataFormat);
gateway_cmd_data.panid = gateway->panid;
gateway_cmd_data.data_type = cmd;
gateway_cmd_data.client_id = client_id;
gateway_cmd_data.gateway_id = gateway->gateway_id;
gateway_cmd_data.crc16 = LoraCrc16((uint8 *)&gateway_cmd_data, sizeof(struct LoraDataFormat) - 2);
if (AdapterDeviceSend(adapter, (uint8 *)&gateway_cmd_data, gateway_cmd_data.length) < 0) {
return -1;
}
return 0;
}
/**
* @description: Lora Gateway handle the user data from the client
* @param adapter Lora adapter pointer
* @param gateway_recv_data Lora Client user data
*/
static int LoraGatewayHandleData(struct Adapter *adapter, struct LoraDataFormat *gateway_recv_data)
{
/*User needs to handle client data depends on the requirement*/
printf("Lora Gateway receive Client %d data:\n", gateway_recv_data->client_id);
printf("%s\n", gateway_recv_data->data);
return 0;
}
/**
* @description: Lora Client update status after join the net
* @param adapter Lora adapter pointer
* @param client_recv_data Lora Client recv data from Lora Gateway
*/
static int LoraClientUpdate(struct Adapter *adapter, struct LoraDataFormat *client_recv_data)
{
struct LoraClientParam *client = (struct LoraClientParam *)adapter->adapter_param;
if (ADAPTER_LORA_DATA_TYPE_JOIN_REPLY == client_recv_data->data_type) {
client->gateway_id = client_recv_data->gateway_id;
client->panid = client_recv_data->panid;
client->client_state = CLIENT_CONNECT;
printf("LoraClientUpdate client join panid 0x%x successfully\n", client->panid);
} else if (ADAPTER_LORA_DATA_TYPE_QUIT_REPLY == client_recv_data->data_type) {
client->gateway_id = 0;
client->panid = 0;
client->client_state = CLIENT_DISCONNECT;
printf("LoraClientUpdate client quit panid 0x%x successfully\n", client->panid);
}
return 0;
}
/**
* @description: Lora Client send the user data to the gateway
* @param adapter Lora adapter pointer
* @param send_buf Lora Client send user data buf
* @param length user data length (max size is ADAPTER_LORA_DATA_LENGTH)
*/
static int LoraClientSendData(struct Adapter *adapter, void *send_buf, int length)
{
struct LoraClientParam *client = (struct LoraClientParam *)adapter->adapter_param;
if (client->client_state != CLIENT_CONNECT) {
printf("Lora client %d do not connect to Lora gateway\n", client->client_id);
return 0;
}
if (length > ADAPTER_LORA_DATA_LENGTH) {
printf("Lora client %d send data %d larger than max %d \n", client->client_id, length, ADAPTER_LORA_DATA_LENGTH);
return 0;
}
struct LoraDataFormat client_user_data;
memset(&client_user_data, 0, sizeof(struct LoraDataFormat));
client_user_data.flame_head = ADAPTER_LORA_DATA_HEAD;
client_user_data.length = sizeof(struct LoraDataFormat);
client_user_data.panid = client->panid;
client_user_data.data_type = ADAPTER_LORA_DATA_TYPE_USERDATA;
client_user_data.client_id = client->client_id;
client_user_data.gateway_id = client->gateway_id;
memcpy(client_user_data.data, (uint8 *)send_buf, length);
client_user_data.crc16 = LoraCrc16((uint8 *)&client_user_data, sizeof(struct LoraDataFormat) - 2);
if (AdapterDeviceSend(adapter, (uint8 *)&client_user_data, client_user_data.length) < 0) {
return -1;
}
return 0;
}
/**
* @description: Lora Gateway receive data analyzing
* @param adapter Lora adapter pointer
* @param gateway_recv_data Lora gateway receive data pointer
*/
static int LoraGateWayDataAnalyze(struct Adapter *adapter, struct LoraDataFormat *gateway_recv_data)
{
int ret = 0;
if (LoraCrc16Check((uint8 *)gateway_recv_data, sizeof(struct LoraDataFormat)) < 0) {
printf("LoraGateWayDataAnalyze CRC check error\n");
return -1;
}
if ((ADAPTER_LORA_DATA_HEAD == gateway_recv_data->flame_head) &&
(ADAPTER_LORA_NET_PANID == gateway_recv_data->panid)) {
switch (gateway_recv_data->data_type)
{
case ADAPTER_LORA_DATA_TYPE_JOIN :
case ADAPTER_LORA_DATA_TYPE_QUIT :
ret = LoraGatewayReply(adapter, gateway_recv_data);
break;
case ADAPTER_LORA_DATA_TYPE_USERDATA :
ret = LoraGatewayHandleData(adapter, gateway_recv_data);
break;
default:
break;
}
}
return ret;
}
/**
* @description: Lora Client receive data analyzing
* @param adapter Lora adapter pointer
* @param send_buf Lora Client send user data buf
* @param length user data length (max size is ADAPTER_LORA_DATA_LENGTH)
*/
static int LoraClientDataAnalyze(struct Adapter *adapter, void *send_buf, int length)
{
int ret = 0;
struct LoraDataFormat *client_recv_data = PrivMalloc(sizeof(struct LoraDataFormat));
memset(client_recv_data, 0, sizeof(struct LoraDataFormat));
ret = AdapterDeviceRecv(adapter, client_recv_data, sizeof(struct LoraDataFormat));
if (0 == ret) {
printf("LoraClientDataAnalyze recv error.Just return\n");
PrivFree(client_recv_data);
return -1;
}
printf("client_recv_data\n");
printf("head 0x%x length %d panid 0x%x data_type 0x%x client_id 0x%x gateway_id 0x%x crc 0x%x\n",
client_recv_data->flame_head, client_recv_data->length, client_recv_data->panid, client_recv_data->data_type,
client_recv_data->client_id, client_recv_data->gateway_id, client_recv_data->crc16);
if ((ADAPTER_LORA_DATA_HEAD == client_recv_data->flame_head) &&
(ADAPTER_LORA_NET_PANID == client_recv_data->panid)) {
if (LoraCrc16Check((uint8 *)client_recv_data, sizeof(struct LoraDataFormat)) < 0) {
printf("LoraClientDataAnalyze CRC check error\n");
PrivFree(client_recv_data);
return -1;
}
//only handle this client_id information from gateway
if (client_recv_data->client_id == adapter->net_role_id) {
switch (client_recv_data->data_type)
{
case ADAPTER_LORA_DATA_TYPE_JOIN_REPLY :
case ADAPTER_LORA_DATA_TYPE_QUIT_REPLY :
ret = LoraClientUpdate(adapter, client_recv_data);
break;
case ADAPTER_LORA_DATA_TYPE_CMD :
if (send_buf) {
ret = LoraClientSendData(adapter, send_buf, length);
}
break;
default:
break;
}
}
}
PrivFree(client_recv_data);
return ret;
}
/**
* @description: Lora Client join net function
* @param adapter Lora adapter pointer
* @param panid Lora net panid
*/
static int LoraClientJoinNet(struct Adapter *adapter, unsigned short panid)
{
struct LoraDataFormat client_join_data;
memset(&client_join_data, 0, sizeof(struct LoraDataFormat));
client_join_data.flame_head = ADAPTER_LORA_DATA_HEAD;
client_join_data.length = sizeof(struct LoraDataFormat);
client_join_data.panid = panid;
client_join_data.data_type = ADAPTER_LORA_DATA_TYPE_JOIN;
client_join_data.client_id = adapter->net_role_id;
client_join_data.crc16 = LoraCrc16((uint8 *)&client_join_data, sizeof(struct LoraDataFormat) - 2);
if (AdapterDeviceJoin(adapter, (uint8 *)&client_join_data) < 0) {
return -1;
}
return 0;
}
/**
* @description: Lora Client quit net function
* @param adapter Lora adapter pointer
* @param panid Lora net panid
*/
static int LoraClientQuitNet(struct Adapter *adapter, unsigned short panid)
{
struct LoraDataFormat client_join_data;
memset(&client_join_data, 0, sizeof(struct LoraDataFormat));
client_join_data.flame_head = ADAPTER_LORA_DATA_HEAD;
client_join_data.length = sizeof(struct LoraDataFormat);
client_join_data.panid = panid;
client_join_data.data_type = ADAPTER_LORA_DATA_TYPE_QUIT;
client_join_data.client_id = adapter->net_role_id;
client_join_data.crc16 = LoraCrc16((uint8 *)&client_join_data, sizeof(struct LoraDataFormat) - 2);
if (AdapterDeviceDisconnect(adapter, (uint8 *)&client_join_data) < 0) {
return -1;
}
return 0;
}
/**
* @description: Lora Gateway Process function
* @param lora_adapter Lora adapter pointer
* @param gateway Lora gateway pointer
* @param gateway_recv_data Lora gateway receive data pointer
*/
int LoraGatewayProcess(struct Adapter *lora_adapter, struct LoraGatewayParam *gateway, struct LoraDataFormat *gateway_recv_data)
{
int i, ret = 0;
switch (LoraGatewayState)
{
case LORA_STATE_IDLE:
ret = AdapterDeviceRecv(lora_adapter, gateway_recv_data, sizeof(struct LoraDataFormat));
if (0 == ret) {
printf("LoraGatewayProcess IDLE recv error.Just return\n");
break;
}
if (ADAPTER_LORA_DATA_TYPE_JOIN == gateway_recv_data->data_type) {
LoraGatewayState = LORA_JOIN_NET;
} else if (ADAPTER_LORA_DATA_TYPE_QUIT == gateway_recv_data->data_type) {
LoraGatewayState = LORA_QUIT_NET;
} else {
LoraGatewayState = LORA_STATE_IDLE;
}
break;
case LORA_JOIN_NET:
case LORA_QUIT_NET:
ret = LoraGateWayDataAnalyze(lora_adapter, gateway_recv_data);
if (ret < 0) {
printf("LoraGateWayDataAnalyze state %d error, re-send data cmd to client\n", LoraGatewayState);
PrivTaskDelay(500);
}
LoraGatewayState = LORA_RECV_DATA;
break;
case LORA_RECV_DATA:
for (i = 0; i < gateway->client_num; i ++) {
if (gateway->client_id[i]) {
printf("LoraGatewayProcess send to client %d for data\n", gateway->client_id[i]);
ret = LoraGatewaySendCmd(lora_adapter, gateway->client_id[i], ADAPTER_LORA_DATA_TYPE_CMD);
if (ret < 0) {
printf("LoraGatewaySendCmd client ID %d error\n", gateway->client_id[i]);
PrivTaskDelay(500);
continue;
}
ret = AdapterDeviceRecv(lora_adapter, gateway_recv_data, sizeof(struct LoraDataFormat));
if (0 == ret) {
printf("LoraGatewayProcess recv error.Just return\n");
continue;
}
if (ADAPTER_LORA_DATA_TYPE_JOIN == gateway_recv_data->data_type) {
LoraGatewayState = LORA_JOIN_NET;
} else if (ADAPTER_LORA_DATA_TYPE_QUIT == gateway_recv_data->data_type) {
LoraGatewayState = LORA_QUIT_NET;
} else {
ret = LoraGateWayDataAnalyze(lora_adapter, gateway_recv_data);
if (ret < 0) {
printf("LoraGateWayDataAnalyze error, re-send data cmd to client\n");
PrivTaskDelay(500);
}
}
}
}
break;
default:
break;
}
return 0;
}
/**
* @description: Lora Gateway task
* @param parameter - Lora adapter pointer
*/
static void *LoraGatewayTask(void *parameter)
{
int i;
int ret = 0;
struct Adapter *lora_adapter = (struct Adapter *)parameter;
struct LoraGatewayParam *gateway = (struct LoraGatewayParam *)lora_adapter->adapter_param;
struct LoraDataFormat gateway_recv_data;
while (1) {
LoraGatewayProcess(lora_adapter, gateway, &gateway_recv_data);
}
return 0;
}
/**
* @description: Lora Client data upload task
* @param parameter - Lora adapter pointer
*/
static void *LoraClientDataTask(void *parameter)
{
int i, ret = 0;
int join_times = 10;
struct Adapter *lora_adapter = (struct Adapter *)parameter;
struct LoraClientParam *client = (struct LoraClientParam *)lora_adapter->adapter_param;
//set lora_send_buf for test
uint8 lora_send_buf[ADAPTER_LORA_DATA_LENGTH];
memset(lora_send_buf, 0, ADAPTER_LORA_DATA_LENGTH);
sprintf(lora_send_buf, "Lora client %d adapter test\n", client->client_id);
while (1) {
PrivTaskDelay(100);
if ((CLIENT_DISCONNECT == client->client_state) && (!g_adapter_lora_quit_flag)) {
ret = LoraClientJoinNet(lora_adapter, client->panid);
if (ret < 0) {
printf("LoraClientJoinNet error panid 0x%x\n", client->panid);
}
ret = LoraClientDataAnalyze(lora_adapter, NULL, 0);
if (ret < 0) {
printf("LoraClientDataAnalyze error, reconnect to gateway\n");
PrivTaskDelay(500);
continue;
}
}
if (CLIENT_CONNECT == client->client_state) {
ret = LoraClientDataAnalyze(lora_adapter, (void *)lora_send_buf, strlen(lora_send_buf));
if (ret < 0) {
printf("LoraClientDataAnalyze error, wait for next data cmd\n");
PrivTaskDelay(500);
continue;
}
}
}
return 0;
}
/**
* @description: Lora Client quit task
* @param parameter - Lora adapter pointer
*/
static void *LoraClientQuitTask(void *parameter)
{
int ret = 0;
struct Adapter *lora_adapter = (struct Adapter *)parameter;
struct LoraClientParam *client = (struct LoraClientParam *)lora_adapter->adapter_param;
while (1) {
PrivTaskDelay(100);
if ((CLIENT_CONNECT == client->client_state) && (g_adapter_lora_quit_flag)) {
ret = LoraClientQuitNet(lora_adapter, client->panid);
if (ret < 0) {
printf("LoraClientQuitNet error panid 0x%x, re-quit net\n", client->panid);
continue;
}
ret = LoraClientDataAnalyze(lora_adapter, NULL, 0);
if (ret < 0) {
printf("LoraClientQuitTask LoraClientDataAnalyze error\n");
PrivTaskDelay(500);
continue;
}
}
}
return 0;
}
/*******************LORA ADAPTER FUNCTION********************/
static int AdapterLoraRegister(struct Adapter *adapter)
{
int ret = 0;
struct LoraGatewayParam *lora_gateway;
struct LoraClientParam *lora_client;
strncpy(adapter->name, ADAPTER_LORA_NAME, NAME_NUM_MAX);
adapter->net_protocol = PRIVATE_PROTOCOL;
#ifdef AS_LORA_GATEWAY_ROLE
lora_gateway = PrivMalloc(sizeof(struct LoraGatewayParam));
if (!lora_gateway) {
PrivFree(lora_gateway);
return -1;
}
memset(lora_gateway, 0, sizeof(struct LoraGatewayParam));
lora_gateway->gateway_id = ADAPTER_LORA_NET_ROLE_ID;
lora_gateway->panid = ADAPTER_LORA_NET_PANID;
adapter->net_role = GATEWAY;
adapter->adapter_param = (void *)lora_gateway;
#else //AS_LORA_CLIENT_ROLE
lora_client = PrivMalloc(sizeof(struct LoraClientParam));
if (!lora_client) {
PrivFree(lora_client);
return -1;
}
memset(lora_client, 0, sizeof(struct LoraClientParam));
lora_client->client_id = ADAPTER_LORA_NET_ROLE_ID;
lora_client->client_state = CLIENT_DISCONNECT;
lora_client->panid = ADAPTER_LORA_NET_PANID;
adapter->net_role = CLIENT;
adapter->adapter_param = (void *)lora_client;
#endif
adapter->net_role_id = ADAPTER_LORA_NET_ROLE_ID;
adapter->adapter_status = UNREGISTERED;
ret = AdapterDeviceRegister(adapter);
if (ret < 0) {
printf("Adapter4G register error\n");
if (lora_gateway)
PrivFree(lora_gateway);
if (lora_client)
PrivFree(lora_client);
return -1;
}
return ret;
}
int AdapterLoraInit(void)
{
int ret = 0;
struct Adapter *adapter = PrivMalloc(sizeof(struct Adapter));
if (!adapter) {
PrivFree(adapter);
return -1;
}
memset(adapter, 0, sizeof(struct Adapter));
ret = AdapterLoraRegister(adapter);
if (ret < 0) {
printf("AdapterLoraInit register lora adapter error\n");
PrivFree(adapter);
return -1;
}
#ifdef ADAPTER_SX1278
AdapterProductInfoType product_info = Sx1278Attach(adapter);
if (!product_info) {
printf("AdapterLoraInit sx1278 attach error\n");
PrivFree(adapter);
return -1;
}
adapter->product_info_flag = 1;
adapter->info = product_info;
adapter->done = product_info->model_done;
#endif
return ret;
}
/******************Lora TEST*********************/
#ifdef AS_LORA_GATEWAY_ROLE
static pthread_t lora_gateway_task;
#else //AS_LORA_CLIENT_ROLE
static pthread_t lora_client_data_task;
static pthread_t lora_client_quit_task;
#endif
int AdapterLoraTest(void)
{
struct Adapter *adapter = AdapterDeviceFindByName(ADAPTER_LORA_NAME);
AdapterDeviceOpen(adapter);
//create lora gateway task
#ifdef AS_LORA_GATEWAY_ROLE
pthread_attr_t lora_gateway_attr;
lora_gateway_attr.schedparam.sched_priority = 20;
lora_gateway_attr.stacksize = 2048;
PrivTaskCreate(&lora_gateway_task, &lora_gateway_attr, &LoraGatewayTask, (void *)adapter);
PrivTaskStartup(&lora_gateway_task);
#else //AS_LORA_CLIENT_ROLE
//create lora client task
pthread_attr_t lora_client_attr;
lora_client_attr.schedparam.sched_priority = 20;
lora_client_attr.stacksize = 2048;
PrivTaskCreate(&lora_client_data_task, &lora_client_attr, &LoraClientDataTask, (void *)adapter);
PrivTaskStartup(&lora_client_data_task);
lora_client_attr.stacksize = 1024;
PrivTaskCreate(&lora_client_quit_task, &lora_client_attr, &LoraClientQuitTask, (void *)adapter);
PrivTaskStartup(&lora_client_quit_task);
#endif
return 0;
}
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHELL_CMD_PARAM_NUM(0)|SHELL_CMD_DISABLE_RETURN, AdapterLoraTest, AdapterLoraTest, show adapter lora information);

17
APP_Framework/Framework/connection/lora/sx1278/Kconfig
View File

@ -0,0 +1,17 @@
config ADAPTER_LORA_SX1278
string "SX1278 adapter name"
default "sx1278"
if ADD_XIUOS_FETURES
config ADAPTER_SX1278_DRIVER
string "SX1278 device spi driver path"
default "/dev/spi2_lora"
endif
if ADD_NUTTX_FETURES
endif
if ADD_RTTHREAD_FETURES
endif

3
APP_Framework/Framework/connection/lora/sx1278/Makefile
View File

@ -0,0 +1,3 @@
SRC_FILES := sx1278.c
include $(KERNEL_ROOT)/compiler.mk

152
APP_Framework/Framework/connection/lora/sx1278/sx1278.c
View File

@ -0,0 +1,152 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file sx1278.c
* @brief Implement the connection lora adapter function
* @version 1.1
* @author AIIT XUOS Lab
* @date 2021.10.20
*/
#include <adapter.h>
/**
* @description: Open SX1278 spi function
* @param adapter - Lora device pointer
* @return success: 0, failure: -1
*/
static int Sx1278Open(struct Adapter *adapter)
{
/*step1: open sx1278 spi port*/
adapter->fd = PrivOpen(ADAPTER_SX1278_DRIVER, O_RDWR);
if (adapter->fd < 0) {
printf("Sx1278Open get spi %s fd error\n", ADAPTER_SX1278_DRIVER);
return -1;
}
printf("Sx1278Open done\n");
return 0;
}
/**
* @description: Close SX1278 spi function
* @param adapter - Lora device pointer
* @return success: 0, failure: -1
*/
static int Sx1278Close(struct Adapter *adapter)
{
/*step1: close sx1278 spi port*/
PrivClose(adapter->fd);
ADAPTER_DEBUG("Sx1278Close done\n");
return 0;
}
/**
* @description: SX1278 ioctl function
* @param adapter - Lora device pointer
* @param cmd - ioctl cmd
* @param args - iotl params
* @return success: 0, failure: -1
*/
static int Sx1278Ioctl(struct Adapter *adapter, int cmd, void *args)
{
/*to do*/
return 0;
}
/**
* @description: SX1278 join lora net group function
* @param adapter - Lora device pointer
* @param priv_net_group - priv_net_group params
* @return success: 0, failure: -1
*/
static int Sx1278Join(struct Adapter *adapter, unsigned char *priv_net_group)
{
PrivWrite(adapter->fd, (void *)priv_net_group, 144);
return 0;
}
/**
* @description: SX1278 send data function
* @param adapter - Lora device pointer
* @param buf - data buffers
* @param len - data len
* @return success: 0, failure: -1
*/
static int Sx1278Send(struct Adapter *adapter, const void *buf, size_t len)
{
PrivWrite(adapter->fd, buf, len);
return 0;
}
/**
* @description: SX1278 receive data function
* @param adapter - Lora device pointer
* @param buf - data buffers
* @param len - data len
* @return success: 0, failure: -1
*/
static int Sx1278Recv(struct Adapter *adapter, void *buf, size_t len)
{
return PrivRead(adapter->fd, buf, len);
}
/**
* @description: SX1278 quit lora net group function
* @param adapter - Lora device pointer
* @param priv_net_group - priv_net_group params
* @return success: 0, failure: -1
*/
static int Sx1278Quit(struct Adapter *adapter, unsigned char *priv_net_group)
{
PrivWrite(adapter->fd, (void *)priv_net_group, 144);
return 0;
}
static const struct PrivProtocolDone sx1278_done =
{
.open = Sx1278Open,
.close = Sx1278Close,
.ioctl = Sx1278Ioctl,
.setup = NULL,
.setdown = NULL,
.setaddr = NULL,
.setdns = NULL,
.setdhcp = NULL,
.ping = NULL,
.netstat = NULL,
.join = Sx1278Join,
.send = Sx1278Send,
.recv = Sx1278Recv,
.quit = Sx1278Quit,
};
AdapterProductInfoType Sx1278Attach(struct Adapter *adapter)
{
struct AdapterProductInfo *product_info = malloc(sizeof(struct AdapterProductInfo));
if (!product_info) {
printf("Sx1278Attach malloc product_info error\n");
return NULL;
}
strncpy(product_info->model_name, ADAPTER_LORA_SX1278,sizeof(product_info->model_name));
product_info->model_done = (void *)&sx1278_done;
return product_info;
}

4
APP_Framework/Framework/connection/wifi/Kconfig
View File

@ -1,6 +1,8 @@
config ADAPTER_HFA21_WIFI
help
Please check HFA21 can only work for adapter_wifi or adapter_ethernet in the meantime!
bool "Using wifi adapter device HFA21"
default y
default n
if ADAPTER_HFA21_WIFI
source "$APP_DIR/Framework/connection/wifi/hfa21_wifi/Kconfig"

14
APP_Framework/Framework/connection/wifi/adapter_wifi.c
View File

@ -22,7 +22,7 @@
#include <bus_pin.h>
#ifdef ADAPTER_HFA21_WIFI
extern AdapterProductInfoType Hfa21Attach(struct Adapter *adapter);
extern AdapterProductInfoType Hfa21WifiAttach(struct Adapter *adapter);
#endif
#define ADAPTER_WIFI_NAME "wifi"
@ -52,7 +52,7 @@ int AdapterWifiInit(void)
struct Adapter *adapter = PrivMalloc(sizeof(struct Adapter));
if (!adapter) {
printf("AdapterWifiInit malloc error\n");
free(adapter);
PrivFree(adapter);
return -1;
}
@ -61,15 +61,15 @@ int AdapterWifiInit(void)
ret = AdapterWifiRegister(adapter);
if (ret < 0) {
printf("AdapterWifiInit register wifi adapter error\n");
free(adapter);
PrivFree(adapter);
return -1;
}
#ifdef ADAPTER_HFA21_WIFI
AdapterProductInfoType product_info = Hfa21Attach(adapter);
AdapterProductInfoType product_info = Hfa21WifiAttach(adapter);
if (!product_info) {
printf("AdapterWifiInit hfa21 attach error\n");
free(adapter);
PrivFree(adapter);
return -1;
}
@ -167,7 +167,3 @@ int AdapterWifiTest(void)
}
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHELL_CMD_PARAM_NUM(0)|SHELL_CMD_DISABLE_RETURN, AdapterWifiTest, AdapterWifiTest, show adapter wifi information);

104
APP_Framework/Framework/connection/wifi/hfa21_wifi/hfa21_wifi.c
View File

@ -11,7 +11,7 @@
*/
/**
* @file hfa21.c
* @file hfa21_wifi.c
* @brief Implement the connection wifi adapter function, using HFA21 device
* @version 1.1
* @author AIIT XUOS Lab
@ -23,14 +23,14 @@
#define LEN_PARA_BUF 128
static int Hfa21SetDown(struct Adapter *adapter_at);
static int Hfa21WifiSetDown(struct Adapter *adapter_at);
/**
* @description: enter AT command mode
* @param at_agent - wifi device agent pointer
* @return success: EOK
*/
static int Hfa21InitAtCmd(ATAgentType at_agent)
static int Hfa21WifiInitAtCmd(ATAgentType at_agent)
{
ATOrderSend(at_agent, REPLY_TIME_OUT, NULL, "+++");
PrivTaskDelay(100);
@ -46,12 +46,12 @@ static int Hfa21InitAtCmd(ATAgentType at_agent)
* @param adapter - wifi device pointer
* @return success: EOK, failure: ENOMEMORY
*/
static int Hfa21Open(struct Adapter *adapter)
static int Hfa21WifiOpen(struct Adapter *adapter)
{
/*step1: open ec200t serial port*/
/*step1: open hfa21 serial port*/
adapter->fd = PrivOpen(ADAPTER_HFA21_DRIVER, O_RDWR);
if (adapter->fd < 0) {
printf("Hfa21Open get serial %s fd error\n", ADAPTER_HFA21_DRIVER);
printf("Hfa21WifiOpen get serial %s fd error\n", ADAPTER_HFA21_DRIVER);
return -1;
}
@ -67,7 +67,7 @@ static int Hfa21Open(struct Adapter *adapter)
adapter->agent = at_agent;
}
ADAPTER_DEBUG("Hfa21 open done\n");
ADAPTER_DEBUG("Hfa21Wifi open done\n");
return 0;
}
@ -77,25 +77,25 @@ static int Hfa21Open(struct Adapter *adapter)
* @param adapter - wifi device pointer
* @return success: EOK
*/
static int Hfa21Close(struct Adapter *adapter)
static int Hfa21WifiClose(struct Adapter *adapter)
{
return Hfa21SetDown(adapter);
return Hfa21WifiSetDown(adapter);
}
/**
* @description: send data to adapter
* @param adapter - wifi device pointer
* @param data - data bufferd
* @param data - data buffer
* @param data - data length
* @return success: EOK
*/
static int Hfa21Send(struct Adapter *adapter, const void *data, size_t len)
static int Hfa21WifiSend(struct Adapter *adapter, const void *data, size_t len)
{
x_err_t result = EOK;
if (adapter->agent) {
EntmSend(adapter->agent, (const char *)data, len);
}else {
printf("Can not find agent \n");
printf("Hfa21WifiSend can not find agent!\n");
}
__exit:
@ -106,11 +106,11 @@ __exit:
/**
* @description: receive data from adapter
* @param adapter - wifi device pointer
* @param data - data bufferd
* @param data - data buffer
* @param data - data length
* @return success: EOK
*/
static int Hfa21Receive(struct Adapter *adapter, void *rev_buffer, size_t buffer_len)
static int Hfa21WifiReceive(struct Adapter *adapter, void *rev_buffer, size_t buffer_len)
{
x_err_t result = EOK;
printf("hfa21 receive waiting ... \n");
@ -118,7 +118,7 @@ static int Hfa21Receive(struct Adapter *adapter, void *rev_buffer, size_t buffer
if (adapter->agent) {
return EntmRecv(adapter->agent, (char *)rev_buffer, buffer_len, 40);
} else {
printf("Can not find agent \n");
printf("Hfa21WifiReceive can not find agent!\n");
}
__exit:
@ -131,26 +131,25 @@ __exit:
* @param adapter - wifi device pointer
* @return success: EOK
*/
static int Hfa21SetUp(struct Adapter *adapter)
static int Hfa21WifiSetUp(struct Adapter *adapter)
{
uint8 wifi_ssid[LEN_PARA_BUF] = "AIIT-Guest";
uint8 wifi_pwd[LEN_PARA_BUF] = "";
char cmd[LEN_PARA_BUF];
//struct at_device_esp8266 *esp8266 = (struct at_device_esp8266 *) device->UserData;
struct ATAgent *agent = adapter->agent;
/* wait hfa21 device startup finish */
PrivTaskDelay(5000);
Hfa21InitAtCmd(agent);
Hfa21WifiInitAtCmd(agent);
memset(cmd,0,sizeof(cmd));
strcpy(cmd,"AT+FCLR\r");
ATOrderSend(agent, REPLY_TIME_OUT, NULL, cmd);
PrivTaskDelay(20000);
Hfa21InitAtCmd(agent);
Hfa21WifiInitAtCmd(agent);
memset(cmd,0,sizeof(cmd));
strcpy(cmd,"AT+WSSSID=");
@ -184,9 +183,9 @@ static int Hfa21SetUp(struct Adapter *adapter)
* @param adapter - wifi device pointer
* @return success: EOK
*/
static int Hfa21SetDown(struct Adapter *adapter)
static int Hfa21WifiSetDown(struct Adapter *adapter)
{
Hfa21InitAtCmd(adapter->agent);
Hfa21WifiInitAtCmd(adapter->agent);
ATOrderSend(adapter->agent, REPLY_TIME_OUT, NULL, "AT+FCLR\r");
PrivTaskDelay(20000);
@ -202,7 +201,7 @@ static int Hfa21SetDown(struct Adapter *adapter)
* @param netmask - netmask address
* @return success: EOK, failure: ENOMEMORY
*/
static int Hfa21SetAddr(struct Adapter *adapter, const char *ip, const char *gateway, const char *netmask)
static int Hfa21WifiSetAddr(struct Adapter *adapter, const char *ip, const char *gateway, const char *netmask)
{
#define HFA21_SET_ADDR_EXPRESSION "+ok=%[^,],%[^,],%[^,],%[^,]\r"
char *dhcp_mode =NULL;
@ -215,7 +214,7 @@ static int Hfa21SetAddr(struct Adapter *adapter, const char *ip, const char *gat
gw_str = (char *) PrivCalloc(1, 17);
mask_str = (char *) PrivCalloc(1, 17);
Hfa21InitAtCmd(adapter->agent);
Hfa21WifiInitAtCmd(adapter->agent);
x_err_t result = EOK;
@ -251,12 +250,12 @@ __exit:
}
/**
* @description: ping
* @description: wifi ping function
* @param adapter - wifi device pointer
* @param destination - domain name or ip address
* @return success: EOK, failure: ENOMEMORY
*/
static int Hfa21Ping(struct Adapter *adapter, const char *destination)
static int Hfa21WifiPing(struct Adapter *adapter, const char *destination)
{
char *ping_result = NONE;
char *dst = NONE;
@ -265,7 +264,7 @@ static int Hfa21Ping(struct Adapter *adapter, const char *destination)
strcpy(dst, destination);
strcat(dst, "\r");
Hfa21InitAtCmd(adapter->agent);
Hfa21WifiInitAtCmd(adapter->agent);
uint32 result = EOK;
@ -301,11 +300,11 @@ __exit:
}
/**
* @description: display network configuration
* @description: display wifi network configuration
* @param adapter - wifi device pointer
* @return success: EOK, failure: ENOMEMORY
*/
static int Hfa21Netstat(struct Adapter *adapter)
static int Hfa21WifiNetstat(struct Adapter *adapter)
{
#define HFA21_NETSTAT_RESP_SIZE 320
#define HFA21_NETSTAT_TYPE_SIZE 10
@ -400,7 +399,16 @@ __exit:
PrivFree(work_mode);
}
static int Hfa21Connect(struct Adapter *adapter, enum NetRoleType net_role, const char *ip, const char *port, enum IpType ip_type)
/**
* @description: wifi connect function
* @param adapter - wifi device pointer
* @param net_role - net role, CLIENT or SERVER
* @param ip - ip address
* @param port - port num
* @param ip_type - ip type, IPV4 or IPV6
* @return success: 0, failure: -1
*/
static int Hfa21WifiConnect(struct Adapter *adapter, enum NetRoleType net_role, const char *ip, const char *port, enum IpType ip_type)
{
int result = EOK;
ATReplyType reply = NONE;
@ -413,7 +421,7 @@ static int Hfa21Connect(struct Adapter *adapter, enum NetRoleType net_role, cons
return ENOMEMORY;
}
Hfa21InitAtCmd(adapter->agent);
Hfa21WifiInitAtCmd(adapter->agent);
memset(cmd,0,sizeof(cmd));
strcpy(cmd,"AT+NETP=TCP,");
@ -446,10 +454,10 @@ __exit:
return result;
}
static int Hfa21Ioctl(struct Adapter *adapter, int cmd, void *args)
static int Hfa21WifiIoctl(struct Adapter *adapter, int cmd, void *args)
{
if (OPE_INT != cmd) {
printf("Hfa21Ioctl only support OPE_INT, do not support %d\n", cmd);
printf("Hfa21WifiIoctl only support OPE_INT, do not support %d\n", cmd);
return -1;
}
@ -473,25 +481,25 @@ static int Hfa21Ioctl(struct Adapter *adapter, int cmd, void *args)
ioctl_cfg.ioctl_driver_type = SERIAL_TYPE;
ioctl_cfg.args = &serial_cfg;
PrivIoctl(adapter->fd, OPE_INT, &ioctl_cfg);
printf("Hfa21Ioctl success\n");
printf("Hfa21WifiIoctl success\n");
return 0;
}
static const struct IpProtocolDone hfa21_done =
static const struct IpProtocolDone hfa21_wifi_done =
{
.open = Hfa21Open,
.close = Hfa21Close,
.ioctl = Hfa21Ioctl,
.setup = Hfa21SetUp,
.setdown = Hfa21SetDown,
.setaddr = Hfa21SetAddr,
.open = Hfa21WifiOpen,
.close = Hfa21WifiClose,
.ioctl = Hfa21WifiIoctl,
.setup = Hfa21WifiSetUp,
.setdown = Hfa21WifiSetDown,
.setaddr = Hfa21WifiSetAddr,
.setdns = NULL,
.setdhcp = NULL,
.ping = Hfa21Ping,
.netstat = Hfa21Netstat,
.connect = Hfa21Connect,
.send = Hfa21Send,
.recv = Hfa21Receive,
.ping = Hfa21WifiPing,
.netstat = Hfa21WifiNetstat,
.connect = Hfa21WifiConnect,
.send = Hfa21WifiSend,
.recv = Hfa21WifiReceive,
.disconnect = NULL,
};
@ -499,18 +507,18 @@ static const struct IpProtocolDone hfa21_done =
* @description: Register wifi device hfa21
* @return success: EOK, failure: ERROR
*/
AdapterProductInfoType Hfa21Attach(struct Adapter *adapter)
AdapterProductInfoType Hfa21WifiAttach(struct Adapter *adapter)
{
struct AdapterProductInfo *product_info = PrivMalloc(sizeof(struct AdapterProductInfo));
if (!product_info) {
printf("Hfa21Attach Attach malloc product_info error\n");
printf("Hfa21WifiAttach Attach malloc product_info error\n");
PrivFree(product_info);
return NULL;
}
strcpy(product_info->model_name, ADAPTER_WIFI_HFA21);
product_info->model_done = (void *)&hfa21_done;
product_info->model_done = (void *)&hfa21_wifi_done;
return product_info;
}

4
APP_Framework/Framework/connection/zigbee/adapter_zigbee.c
View File

@ -72,14 +72,14 @@ int AdapterZigbeeInit(void)
ret = AdapterZigbeeRegister(adapter);
if (ret < 0) {
printf("AdapterZigbeeRegister register zigbee adapter error\n");
free(adapter);
PrivFree(adapter);
return -1;
}
#ifdef ADAPTER_E18
AdapterProductInfoType product_info = E18Attach(adapter);
if (!product_info) {
printf("AdapterZigbeeRegister e18 attach error\n");
free(adapter);
PrivFree(adapter);
return -1;
}

2
APP_Framework/Framework/connection/zigbee/e18/e18.c
View File

@ -257,7 +257,7 @@ static int E18Ioctl(struct Adapter *adapter, int cmd, void *args)
return ret;
}
static int E18Join(struct Adapter *adapter, const char *priv_net_group)
static int E18Join(struct Adapter *adapter, unsigned char *priv_net_group)
{
int ret = 0;

2
Ubiquitous/XiUOS/Makefile
View File

@ -5,7 +5,7 @@ MAKEFLAGS += --no-print-directory
.PHONY:COMPILE_APP COMPILE_KERNEL
support :=kd233 stm32f407-st-discovery maix-go stm32f407zgt6 aiit-riscv64-board aiit-arm32-board hifive1-rev-B hifive1-emulator k210-emulator cortex-m3-emulator ok1052-c gapuino
support :=kd233 stm32f407-st-discovery maix-go stm32f407zgt6 aiit-riscv64-board aiit-arm32-board hifive1-rev-B hifive1-emulator k210-emulator cortex-m3-emulator cortex-m4-emulator ok1052-c gapuino
SRC_DIR:=
export BOARD ?=kd233

4
Ubiquitous/XiUOS/arch/arm/Makefile
View File

@ -9,6 +9,10 @@ ifeq ($(CONFIG_BOARD_STM32F407_EVB),y)
SRC_DIR +=cortex-m4
endif
ifeq ($(CONFIG_BOARD_CORTEX_M4_EVB),y)
SRC_DIR +=cortex-m4
endif
ifeq ($(CONFIG_BOARD_CORTEX_M7_EVB),y)
SRC_DIR +=cortex-m7
endif

3
Ubiquitous/XiUOS/arch/arm/cortex-m4/boot.S
View File

@ -105,6 +105,7 @@ BSSInit:
BSSInitEnd:
bl SystemInit
bl stm32f407_start
bl entry
bx lr
.size Reset_Handler, .-Reset_Handler

24
Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/spi/Kconfig
View File

@ -22,42 +22,42 @@ if BSP_USING_SPI2
config SPI_2_DRV_NAME
string "spi bus 2 driver name"
default "spi2_drv"
menuconfig CONNECTION_COMMUNICATION_LORA_USING_SX1278
bool "Using spi lora SX1278"
menuconfig RESOURCES_SPI_LORA
bool "Using spi lora function"
default n
if CONNECTION_COMMUNICATION_LORA_USING_SX1278
if RESOURCES_SPI_LORA
config SX12XX_SPI_DEVICE_NAME
string "SX1278 device spi name"
string "SX1278 lora device spi name"
default "spi2_dev0"
config SX12XX_DEVICE_NAME
string "SX1278 device name"
string "SX1278 lora device name"
default "spi2_lora"
config CONNECTION_COMMUNICATION_LORA_SX12XX_RST_PIN
config SX12XX_DEVICE_RST_PIN
int
default 10
config CONNECTION_COMMUNICATION_LORA_SX12XX_DO0_PIN
config SX12XX_DEVICE_DO0_PIN
int
default 10
config CONNECTION_COMMUNICATION_LORA_SX12XX_DO1_PIN
config SX12XX_DEVICE_DO1_PIN
int
default 10
config CONNECTION_COMMUNICATION_LORA_SX12XX_DO2_PIN
config SX12XX_DEVICE_DO2_PIN
int
default 10
config CONNECTION_COMMUNICATION_LORA_SX12XX_DO3_PIN
config SX12XX_DEVICE_DO3_PIN
int
default 10
config CONNECTION_COMMUNICATION_LORA_SX12XX_DO4_PIN
config SX12XX_DEVICE_DO4_PIN
int
default 10
config CONNECTION_COMMUNICATION_LORA_SX12XX_DO5_PIN
config SX12XX_DEVICE_DO5_PIN
int
default 10
endif

2
Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/spi/Makefile
View File

@ -4,7 +4,7 @@ ifeq ($(CONFIG_RESOURCES_SPI_SFUD),y)
SRC_FILES += connect_flash_spi.c
endif
ifeq ($(CONFIG_CONNECTION_COMMUNICATION_LORA_USING_SX1278),y)
ifeq ($(CONFIG_RESOURCES_SPI_LORA),y)
SRC_DIR += third_party_spi_lora
SRC_FILES += connect_lora_spi.c
endif

60
Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/spi/connect_lora_spi.c
View File

@ -38,17 +38,17 @@ void SX1276InitIo(void)
buspin = PinBusInitGet();
PinCfg.cmd = GPIO_CONFIG_MODE;
PinCfg.pin = CONNECTION_COMMUNICATION_LORA_SX12XX_DO0_PIN;
PinCfg.pin = SX12XX_DEVICE_DO0_PIN;
PinCfg.mode = GPIO_CFG_INPUT;
BusDrvConfigure(buspin->owner_driver, &configure_info);
PinCfg.cmd = GPIO_CONFIG_MODE;
PinCfg.pin = CONNECTION_COMMUNICATION_LORA_SX12XX_DO1_PIN;
PinCfg.pin = SX12XX_DEVICE_DO1_PIN;
PinCfg.mode = GPIO_CFG_INPUT;
BusDrvConfigure(buspin->owner_driver, &configure_info);
PinCfg.cmd = GPIO_CONFIG_MODE;
PinCfg.pin = CONNECTION_COMMUNICATION_LORA_SX12XX_DO2_PIN;
PinCfg.pin = SX12XX_DEVICE_DO2_PIN;
PinCfg.mode = GPIO_CFG_INPUT;
BusDrvConfigure(buspin->owner_driver, &configure_info);
}
@ -60,7 +60,7 @@ inline uint8_t SX1276ReadDio0(void)
struct BusBlockReadParam read_param;
read_param.buffer = (void *)&PinStat;
PinStat.pin = CONNECTION_COMMUNICATION_LORA_SX12XX_DO0_PIN;
PinStat.pin = SX12XX_DEVICE_DO0_PIN;
return BusDevReadData(buspin->owner_haldev, &read_param);
}
@ -72,7 +72,7 @@ inline uint8_t SX1276ReadDio1(void)
struct BusBlockReadParam read_param;
read_param.buffer = (void *)&PinStat;
PinStat.pin = CONNECTION_COMMUNICATION_LORA_SX12XX_DO1_PIN;
PinStat.pin = SX12XX_DEVICE_DO1_PIN;
return BusDevReadData(buspin->owner_haldev, &read_param);
}
@ -84,7 +84,7 @@ inline uint8_t SX1276ReadDio2(void)
struct BusBlockReadParam read_param;
read_param.buffer = (void *)&PinStat;
PinStat.pin = CONNECTION_COMMUNICATION_LORA_SX12XX_DO2_PIN;
PinStat.pin = SX12XX_DEVICE_DO2_PIN;
return BusDevReadData(buspin->owner_haldev, &read_param);
}
@ -96,7 +96,7 @@ inline uint8_t SX1276ReadDio3(void)
struct BusBlockReadParam read_param;
read_param.buffer = (void *)&PinStat;
PinStat.pin = CONNECTION_COMMUNICATION_LORA_SX12XX_DO3_PIN;
PinStat.pin = SX12XX_DEVICE_DO3_PIN;
return BusDevReadData(buspin->owner_haldev, &read_param);
}
@ -108,7 +108,7 @@ inline uint8_t SX1276ReadDio4(void)
struct BusBlockReadParam read_param;
read_param.buffer = (void *)&PinStat;
PinStat.pin = CONNECTION_COMMUNICATION_LORA_SX12XX_DO4_PIN;
PinStat.pin = SX12XX_DEVICE_DO4_PIN;
return BusDevReadData(buspin->owner_haldev, &read_param);
}
@ -120,7 +120,7 @@ inline uint8_t SX1276ReadDio5(void)
struct BusBlockReadParam read_param;
read_param.buffer = (void *)&PinStat;
PinStat.pin = CONNECTION_COMMUNICATION_LORA_SX12XX_DO5_PIN;
PinStat.pin = SX12XX_DEVICE_DO5_PIN;
return BusDevReadData(buspin->owner_haldev, &read_param);
}
@ -129,11 +129,11 @@ inline void SX1276WriteRxTx(uint8_t txEnable)
{
if (txEnable != 0)
{
/*to do*/
}
else
{
/*to do*/
}
}
@ -152,18 +152,18 @@ void SX1276SetReset(uint8_t state)
if (state == RADIO_RESET_ON)
{
PinCfg.cmd = GPIO_CONFIG_MODE;
PinCfg.pin = CONNECTION_COMMUNICATION_LORA_SX12XX_RST_PIN;
PinCfg.pin = SX12XX_DEVICE_RST_PIN;
PinCfg.mode = GPIO_CFG_OUTPUT;
BusDrvConfigure(buspin->owner_driver, &configure_info);
PinStat.val = GPIO_LOW;
PinStat.pin = CONNECTION_COMMUNICATION_LORA_SX12XX_RST_PIN;
PinStat.pin = SX12XX_DEVICE_RST_PIN;
BusDevWriteData(buspin->owner_haldev, &write_param);
}
else
{
PinCfg.cmd = GPIO_CONFIG_MODE;
PinCfg.pin = CONNECTION_COMMUNICATION_LORA_SX12XX_RST_PIN;
PinCfg.pin = SX12XX_DEVICE_RST_PIN;
PinCfg.mode = GPIO_CFG_INPUT;
BusDrvConfigure(buspin->owner_driver, &configure_info);
}
@ -262,10 +262,7 @@ static uint32 SpiLoraWrite(void *dev, struct BusBlockWriteParam *write_param)
NULL_PARAM_CHECK(dev);
NULL_PARAM_CHECK(write_param);
uint8 i;
char Msg[SPI_LORA_BUFFER_SIZE] = {0};
if (write_param->size > 120) {
if (write_param->size > 256) {
KPrintf("SpiLoraWrite ERROR:The message is too long!\n");
return ERROR;
} else {
@ -289,18 +286,34 @@ static uint32 SpiLoraRead(void *dev, struct BusBlockReadParam *read_param)
{
NULL_PARAM_CHECK(dev);
NULL_PARAM_CHECK(read_param);
int read_times = 100;
//Radio->StartRx();
SX1276StartRx();
KPrintf("SpiLoraRead Ready!\n");
while (read_times) {
if (SX1276Process() != RF_RX_DONE) {
read_times --;
MdelayKTask(500);
} else {
break;
}
}
if (read_times > 0) {
SX1276GetRxPacket(read_param->buffer, (uint16 *)&read_param->read_length);
} else {
read_param->read_length = 0;
}
//while(Radio->Process() != RF_RX_DONE);
//Radio->GetRxPacket(read_param->buffer, (uint16 *)&read_param->read_length);
while(SX1276Process() != RF_RX_DONE);
SX1276GetRxPacket(read_param->buffer, (uint16 *)&read_param->read_length);
KPrintf("SpiLoraRead : %s\n", read_param->buffer);
// while(SX1276Process() != RF_RX_DONE);
// SX1276GetRxPacket(read_param->buffer, (uint16 *)&read_param->read_length);
return EOK;
return read_param->read_length;
}
static uint32 SpiLoraOpen(void *dev)
@ -354,7 +367,7 @@ static uint32 SpiLoraOpen(void *dev)
KPrintf("LoRa check failed!\n!");
} else {
Radio = RadioDriverInit();
KPrintf("LoRa check ok!\nNote: The length of the message that can be sent in a single time is 120 characters\n");
KPrintf("LoRa check ok!\nNote: The length of the message that can be sent in a single time is 256 characters\n");
}
lora_init_status = RET_TRUE;
@ -480,6 +493,7 @@ int LoraSx12xxSpiDeviceInit(void)
return EOK;
}
//#define LORA_TEST
#ifdef LORA_TEST
/*Just for lora test*/
static struct Bus *bus;

801
Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/spi/connect_spi.c
View File

File diff suppressed because it is too large Load Diff

5
Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/spi/third_party_spi_lora/src/radio/sx1276-LoRa.c
View File

@ -183,6 +183,7 @@ tSX1276LR* SX1276LR;
* Local RF buffer for communication support
*/
static uint8_t RFBuffer[RF_BUFFER_SIZE];
static uint8_t TFBuffer[RF_BUFFER_SIZE];
/*!
* RF state machine variable
@ -401,7 +402,7 @@ void SX1276LoRaSetTxPacket( const void *buffer, uint16_t size )
{
TxPacketSize = 255;
}
memcpy( ( void * )RFBuffer, buffer, ( size_t )TxPacketSize );
memcpy( ( void * )TFBuffer, buffer, ( size_t )TxPacketSize );
RFLRState = RFLR_STATE_TX_INIT;
}
@ -678,7 +679,7 @@ uint32_t SX1276LoRaProcess( void )
SX1276LR->RegFifoAddrPtr = SX1276LR->RegFifoTxBaseAddr;
SX1276Write( REG_LR_FIFOADDRPTR, SX1276LR->RegFifoAddrPtr );
// Write payload buffer to LORA modem
SX1276WriteFifo( RFBuffer, SX1276LR->RegPayloadLength );
SX1276WriteFifo( TFBuffer, SX1276LR->RegPayloadLength );
// TxDone RxTimeout FhssChangeChannel ValidHeader
SX1276LR->RegDioMapping1 = RFLR_DIOMAPPING1_DIO0_01 | RFLR_DIOMAPPING1_DIO1_00 | RFLR_DIOMAPPING1_DIO2_00 | RFLR_DIOMAPPING1_DIO3_01;
// PllLock Mode Ready

4
Ubiquitous/XiUOS/board/aiit-arm32-board/third_party_driver/usb/STM32_USB_OTG_Driver/inc/usb_conf.h
View File

@ -240,8 +240,10 @@
#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
#if defined ( __GNUC__ ) /* GNU Compiler */
#if defined ( __GNUC__ ) /* GNU Compiler */
#ifndef __packed
#define __packed __attribute__ ((__packed__))
#endif
#endif
/**

22
Ubiquitous/XiUOS/board/aiit-riscv64-board/third_party_driver/spi/Kconfig
View File

@ -29,38 +29,38 @@ if BSP_USING_SPI1
config BSP_SPI1_SS0_PIN
int "spi1 ss0 pin number"
default 9
menuconfig CONNECTION_COMMUNICATION_LORA_USING_SX1278
bool "Using spi lora SX1278"
menuconfig RESOURCES_SPI_LORA
bool "Using spi lora function"
default n
if CONNECTION_COMMUNICATION_LORA_USING_SX1278
if RESOURCES_SPI_LORA
config SX12XX_DEVICE_NAME
string "SX1278 device name"
string "SX1278 lora device name"
default "spi1_lora"
config CONNECTION_COMMUNICATION_LORA_SX12XX_RST_PIN
config SX12XX_DEVICE_RST_PIN
int
default 10
config CONNECTION_COMMUNICATION_LORA_SX12XX_DO0_PIN
config SX12XX_DEVICE_DO0_PIN
int
default 10
config CONNECTION_COMMUNICATION_LORA_SX12XX_DO1_PIN
config SX12XX_DEVICE_DO1_PIN
int
default 10
config CONNECTION_COMMUNICATION_LORA_SX12XX_DO2_PIN
config SX12XX_DEVICE_DO2_PIN
int
default 10
config CONNECTION_COMMUNICATION_LORA_SX12XX_DO3_PIN
config SX12XX_DEVICE_DO3_PIN
int
default 10
config CONNECTION_COMMUNICATION_LORA_SX12XX_DO4_PIN
config SX12XX_DEVICE_DO4_PIN
int
default 10
config CONNECTION_COMMUNICATION_LORA_SX12XX_DO5_PIN
config SX12XX_DEVICE_DO5_PIN
int
default 10
endif

2
Ubiquitous/XiUOS/board/aiit-riscv64-board/third_party_driver/spi/Makefile
View File

@ -1,7 +1,7 @@
SRC_FILES := connect_spi.c hardware_spi.c
ifeq ($(CONFIG_CONNECTION_COMMUNICATION_LORA_USING_SX1278),y)
ifeq ($(CONFIG_RESOURCES_SPI_LORA),y)
SRC_DIR += third_party_spi_lora
SRC_FILES += connect_lora_spi.c
endif

56
Ubiquitous/XiUOS/board/aiit-riscv64-board/third_party_driver/spi/connect_lora_spi.c
View File

@ -38,17 +38,17 @@ void SX1276InitIo(void)
buspin = PinBusInitGet();
PinCfg.cmd = GPIO_CONFIG_MODE;
PinCfg.pin = CONNECTION_COMMUNICATION_LORA_SX12XX_DO0_PIN;
PinCfg.pin = SX12XX_DEVICE_DO0_PIN;
PinCfg.mode = GPIO_CFG_INPUT;
BusDrvConfigure(buspin->owner_driver, &configure_info);
PinCfg.cmd = GPIO_CONFIG_MODE;
PinCfg.pin = CONNECTION_COMMUNICATION_LORA_SX12XX_DO1_PIN;
PinCfg.pin = SX12XX_DEVICE_DO1_PIN;
PinCfg.mode = GPIO_CFG_INPUT;
BusDrvConfigure(buspin->owner_driver, &configure_info);
PinCfg.cmd = GPIO_CONFIG_MODE;
PinCfg.pin = CONNECTION_COMMUNICATION_LORA_SX12XX_DO2_PIN;
PinCfg.pin = SX12XX_DEVICE_DO2_PIN;
PinCfg.mode = GPIO_CFG_INPUT;
BusDrvConfigure(buspin->owner_driver, &configure_info);
}
@ -60,7 +60,7 @@ inline uint8_t SX1276ReadDio0(void)
struct BusBlockReadParam read_param;
read_param.buffer = (void *)&PinStat;
PinStat.pin = CONNECTION_COMMUNICATION_LORA_SX12XX_DO0_PIN;
PinStat.pin = SX12XX_DEVICE_DO0_PIN;
return BusDevReadData(buspin->owner_haldev, &read_param);
}
@ -72,7 +72,7 @@ inline uint8_t SX1276ReadDio1(void)
struct BusBlockReadParam read_param;
read_param.buffer = (void *)&PinStat;
PinStat.pin = CONNECTION_COMMUNICATION_LORA_SX12XX_DO1_PIN;
PinStat.pin = SX12XX_DEVICE_DO1_PIN;
return BusDevReadData(buspin->owner_haldev, &read_param);
}
@ -84,7 +84,7 @@ inline uint8_t SX1276ReadDio2(void)
struct BusBlockReadParam read_param;
read_param.buffer = (void *)&PinStat;
PinStat.pin = CONNECTION_COMMUNICATION_LORA_SX12XX_DO2_PIN;
PinStat.pin = SX12XX_DEVICE_DO2_PIN;
return BusDevReadData(buspin->owner_haldev, &read_param);
}
@ -96,7 +96,7 @@ inline uint8_t SX1276ReadDio3(void)
struct BusBlockReadParam read_param;
read_param.buffer = (void *)&PinStat;
PinStat.pin = CONNECTION_COMMUNICATION_LORA_SX12XX_DO3_PIN;
PinStat.pin = SX12XX_DEVICE_DO3_PIN;
return BusDevReadData(buspin->owner_haldev, &read_param);
}
@ -108,7 +108,7 @@ inline uint8_t SX1276ReadDio4(void)
struct BusBlockReadParam read_param;
read_param.buffer = (void *)&PinStat;
PinStat.pin = CONNECTION_COMMUNICATION_LORA_SX12XX_DO4_PIN;
PinStat.pin = SX12XX_DEVICE_DO4_PIN;
return BusDevReadData(buspin->owner_haldev, &read_param);
}
@ -120,7 +120,7 @@ inline uint8_t SX1276ReadDio5(void)
struct BusBlockReadParam read_param;
read_param.buffer = (void *)&PinStat;
PinStat.pin = CONNECTION_COMMUNICATION_LORA_SX12XX_DO5_PIN;
PinStat.pin = SX12XX_DEVICE_DO5_PIN;
return BusDevReadData(buspin->owner_haldev, &read_param);
}
@ -145,18 +145,18 @@ void SX1276SetReset(uint8_t state)
if (state == RADIO_RESET_ON)
{
PinCfg.cmd = GPIO_CONFIG_MODE;
PinCfg.pin = CONNECTION_COMMUNICATION_LORA_SX12XX_RST_PIN;
PinCfg.pin = SX12XX_DEVICE_RST_PIN;
PinCfg.mode = GPIO_CFG_OUTPUT;
BusDrvConfigure(buspin->owner_driver, &configure_info);
PinStat.val = GPIO_LOW;
PinStat.pin = CONNECTION_COMMUNICATION_LORA_SX12XX_RST_PIN;
PinStat.pin = SX12XX_DEVICE_RST_PIN;
BusDevWriteData(buspin->owner_haldev, &write_param);
}
else
{
PinCfg.cmd = GPIO_CONFIG_MODE;
PinCfg.pin = CONNECTION_COMMUNICATION_LORA_SX12XX_RST_PIN;
PinCfg.pin = SX12XX_DEVICE_RST_PIN;
PinCfg.mode = GPIO_CFG_INPUT;
BusDrvConfigure(buspin->owner_driver, &configure_info);
}
@ -255,10 +255,7 @@ static uint32 SpiLoraWrite(void *dev, struct BusBlockWriteParam *write_param)
NULL_PARAM_CHECK(dev);
NULL_PARAM_CHECK(write_param);
uint8 i;
char Msg[SPI_LORA_BUFFER_SIZE] = {0};
if (write_param->size > 120) {
if (write_param->size > 256) {
KPrintf("SpiLoraWrite ERROR:The message is too long!\n");
return ERROR;
} else {
@ -282,18 +279,34 @@ static uint32 SpiLoraRead(void *dev, struct BusBlockReadParam *read_param)
{
NULL_PARAM_CHECK(dev);
NULL_PARAM_CHECK(read_param);
int read_times = 1000;
//Radio->StartRx();
SX1276StartRx();
KPrintf("SpiLoraRead Ready!\n");
while (read_times) {
if (SX1276Process() != RF_RX_DONE) {
read_times --;
MdelayKTask(500);
} else {
break;
}
}
if (read_times > 0) {
SX1276GetRxPacket(read_param->buffer, (uint16 *)&read_param->read_length);
} else {
read_param->read_length = 0;
}
//while(Radio->Process() != RF_RX_DONE);
//Radio->GetRxPacket(read_param->buffer, (uint16 *)&read_param->read_length);
while(SX1276Process() != RF_RX_DONE);
SX1276GetRxPacket(read_param->buffer, (uint16 *)&read_param->read_length);
KPrintf("SpiLoraRead : %s\n", read_param->buffer);
// while(SX1276Process() != RF_RX_DONE);
// SX1276GetRxPacket(read_param->buffer, (uint16 *)&read_param->read_length);
return EOK;
return read_param->read_length;
}
static uint32 SpiLoraOpen(void *dev)
@ -347,7 +360,7 @@ static uint32 SpiLoraOpen(void *dev)
KPrintf("LoRa check failed!\n!");
} else {
Radio = RadioDriverInit();
KPrintf("LoRa check ok!\nNote: The length of the message that can be sent in a single time is 120 characters\n");
KPrintf("LoRa check ok!\nNote: The length of the message that can be sent in a single time is 256 characters\n");
}
lora_init_status = RET_TRUE;
@ -465,6 +478,7 @@ int LoraSx12xxSpiDeviceInit(void)
return EOK;
}
//#define LORA_TEST
#ifdef LORA_TEST
/*Just for lora test*/
static struct Bus *bus;

6
Ubiquitous/XiUOS/board/aiit-riscv64-board/third_party_driver/spi/connect_spi.c
View File

@ -214,13 +214,14 @@ static uint32 SpiWriteData(struct SpiHardwareDevice *spi_dev, struct SpiDataStan
spi_datacfg = spi_datacfg->next;
}
return spi_datacfg->length;
return EOK;
}
static uint32 SpiReadData(struct SpiHardwareDevice *spi_dev, struct SpiDataStandard *spi_datacfg)
{
SpiDeviceParam *dev_param = (SpiDeviceParam *)(spi_dev->haldev.private_data);
uint32 spi_read_length = 0;;
uint8 device_id = dev_param->spi_slave_param->spi_slave_id;
uint8 device_master_id = dev_param->spi_dma_param->spi_master_id;
uint8 cs_gpio_pin = dev_param->spi_slave_param->spi_cs_gpio_pin;
@ -282,10 +283,11 @@ static uint32 SpiReadData(struct SpiHardwareDevice *spi_dev, struct SpiDataStand
gpiohs_set_pin(cs_gpio_pin, GPIO_PV_HIGH);
}
spi_read_length += spi_datacfg->length;
spi_datacfg = spi_datacfg->next;
}
return spi_datacfg->length;
return spi_read_length;
}
/*manage the spi device operations*/

5
Ubiquitous/XiUOS/board/aiit-riscv64-board/third_party_driver/spi/third_party_spi_lora/src/radio/sx1276-LoRa.c
View File

@ -183,6 +183,7 @@ tSX1276LR* SX1276LR;
* Local RF buffer for communication support
*/
static uint8_t RFBuffer[RF_BUFFER_SIZE];
static uint8_t TFBuffer[RF_BUFFER_SIZE];
/*!
* RF state machine variable
@ -401,7 +402,7 @@ void SX1276LoRaSetTxPacket( const void *buffer, uint16_t size )
{
TxPacketSize = 255;
}
memcpy( ( void * )RFBuffer, buffer, ( size_t )TxPacketSize );
memcpy( ( void * )TFBuffer, buffer, ( size_t )TxPacketSize );
RFLRState = RFLR_STATE_TX_INIT;
}
@ -678,7 +679,7 @@ uint32_t SX1276LoRaProcess( void )
SX1276LR->RegFifoAddrPtr = SX1276LR->RegFifoTxBaseAddr;
SX1276Write( REG_LR_FIFOADDRPTR, SX1276LR->RegFifoAddrPtr );
// Write payload buffer to LORA modem
SX1276WriteFifo( RFBuffer, SX1276LR->RegPayloadLength );
SX1276WriteFifo( TFBuffer, SX1276LR->RegPayloadLength );
// TxDone RxTimeout FhssChangeChannel ValidHeader
SX1276LR->RegDioMapping1 = RFLR_DIOMAPPING1_DIO0_01 | RFLR_DIOMAPPING1_DIO1_00 | RFLR_DIOMAPPING1_DIO2_00 | RFLR_DIOMAPPING1_DIO3_01;
// PllLock Mode Ready

59
Ubiquitous/XiUOS/board/cortex-m4-emulator/.history/Kconfig_20210730193816 Normal file
View File

@ -0,0 +1,59 @@
mainmenu "XiUOS Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config KERNEL_DIR
string
option env="KERNEL_ROOT"
default "../.."
config BOARD_STM32F407_EVB
bool
select ARCH_ARM
default y
source "$KERNEL_DIR/arch/Kconfig"
menu "stm32f407-st-discovery feature"
source "$BSP_DIR/third_party_driver/Kconfig"
menu "config default board resources"
menu "config board app name"
config BOARD_APP_NAME
string "config board app name"
default "/XiUOS_stm32f407-st-discovery_app.bin"
endmenu
menu "config board service table"
config SERVICE_TABLE_ADDRESS
hex "board service table address"
default 0x20000000
endmenu
menu "config hardware resources for connection"
if CONNECTION_COMMUNICATION_ETHERNET
config ETHERNET_UART_NAME
string "ethernet uart name"
default "/dev/usart3_dev3"
endif
if CONNECTION_COMMUNICATION_WIFI
config WIFI_UART_NAME
string "wifi uart name"
default "/dev/usart3_dev3"
endif
endmenu
endmenu
endmenu
menu "Hardware feature"
source "$KERNEL_DIR/resources/Kconfig"
endmenu
source "$KERNEL_DIR/Kconfig"

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mainmenu "XiUOS Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config KERNEL_DIR
string
option env="KERNEL_ROOT"
default "../.."
config BOARD_CORTEX_M4_EVB
bool
select ARCH_ARM
default y
source "$KERNEL_DIR/arch/Kconfig"
menu "stm32f407-st-discovery feature"
source "$BSP_DIR/third_party_driver/Kconfig"
menu "config default board resources"
menu "config board app name"
config BOARD_APP_NAME
string "config board app name"
default "/XiUOS_stm32f407-st-discovery_app.bin"
endmenu
menu "config board service table"
config SERVICE_TABLE_ADDRESS
hex "board service table address"
default 0x20000000
endmenu
menu "config hardware resources for connection"
if CONNECTION_COMMUNICATION_ETHERNET
config ETHERNET_UART_NAME
string "ethernet uart name"
default "/dev/usart3_dev3"
endif
if CONNECTION_COMMUNICATION_WIFI
config WIFI_UART_NAME
string "wifi uart name"
default "/dev/usart3_dev3"
endif
endmenu
endmenu
endmenu
menu "Hardware feature"
source "$KERNEL_DIR/resources/Kconfig"
endmenu
source "$KERNEL_DIR/Kconfig"

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mainmenu "XiUOS Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config KERNEL_DIR
string
option env="KERNEL_ROOT"
default "../.."
config BOARD_CORTEX_M4_EVB
bool
select ARCH_ARM
default y
source "$KERNEL_DIR/arch/Kconfig"
menu "stm32f407-st-discovery feature"
source "$BSP_DIR/third_party_driver/Kconfig"
menu "config default board resources"
menu "config board app name"
config BOARD_APP_NAME
string "config board app name"
default "/XiUOS_stm32f407-st-discovery_app.bin"
endmenu
menu "config board service table"
config SERVICE_TABLE_ADDRESS
hex "board service table address"
default 0x20000000
endmenu
menu "config hardware resources for connection"
if CONNECTION_COMMUNICATION_ETHERNET
config ETHERNET_UART_NAME
string "ethernet uart name"
default "/dev/usart3_dev3"
endif
if CONNECTION_COMMUNICATION_WIFI
config WIFI_UART_NAME
string "wifi uart name"
default "/dev/usart3_dev3"
endif
endmenu
endmenu
endmenu
menu "Hardware feature"
source "$KERNEL_DIR/resources/Kconfig"
endmenu
source "$KERNEL_DIR/Kconfig"

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mainmenu "XiUOS Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config KERNEL_DIR
string
option env="KERNEL_ROOT"
default "../.."
config BOARD_CORTEX_M4_EVB
bool
select ARCH_ARM
default y
source "$KERNEL_DIR/arch/Kconfig"
menu "cortex-m4 emulator feature"
source "$BSP_DIR/third_party_driver/Kconfig"
menu "config default board resources"
menu "config board app name"
config BOARD_APP_NAME
string "config board app name"
default "/XiUOS_stm32f407-st-discovery_app.bin"
endmenu
menu "config board service table"
config SERVICE_TABLE_ADDRESS
hex "board service table address"
default 0x20000000
endmenu
menu "config hardware resources for connection"
if CONNECTION_COMMUNICATION_ETHERNET
config ETHERNET_UART_NAME
string "ethernet uart name"
default "/dev/usart3_dev3"
endif
if CONNECTION_COMMUNICATION_WIFI
config WIFI_UART_NAME
string "wifi uart name"
default "/dev/usart3_dev3"
endif
endmenu
endmenu
endmenu
menu "Hardware feature"
source "$KERNEL_DIR/resources/Kconfig"
endmenu
source "$KERNEL_DIR/Kconfig"

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mainmenu "XiUOS Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config KERNEL_DIR
string
option env="KERNEL_ROOT"
default "../.."
config BOARD_CORTEX_M4_EVB
bool
select ARCH_ARM
default y
source "$KERNEL_DIR/arch/Kconfig"
menu "cortex-m4 emulator feature"
source "$BSP_DIR/third_party_driver/Kconfig"
menu "config default board resources"
menu "config board app name"
config BOARD_APP_NAME
string "config board app name"
default "//XiUOS_cortex-m4-emulator_app.bin"
endmenu
menu "config board service table"
config SERVICE_TABLE_ADDRESS
hex "board service table address"
default 0x20000000
endmenu
menu "config hardware resources for connection"
if CONNECTION_COMMUNICATION_ETHERNET
config ETHERNET_UART_NAME
string "ethernet uart name"
default "/dev/usart3_dev3"
endif
if CONNECTION_COMMUNICATION_WIFI
config WIFI_UART_NAME
string "wifi uart name"
default "/dev/usart3_dev3"
endif
endmenu
endmenu
endmenu
menu "Hardware feature"
source "$KERNEL_DIR/resources/Kconfig"
endmenu
source "$KERNEL_DIR/Kconfig"

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mainmenu "XiUOS Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config KERNEL_DIR
string
option env="KERNEL_ROOT"
default "../.."
config BOARD_CORTEX_M4_EVB
bool
select ARCH_ARM
default y
source "$KERNEL_DIR/arch/Kconfig"
menu "cortex-m4 emulator feature"
source "$BSP_DIR/third_party_driver/Kconfig"
menu "config default board resources"
menu "config board app name"
config BOARD_APP_NAME
string "config board app name"
default "//XiUOS_cortex-m4-emulator_app.bin"
endmenu
menu "config board service table"
config SERVICE_TABLE_ADDRESS
hex "board service table address"
default 0x20000000
endmenu
menu "config hardware resources for connection"
if CONNECTION_COMMUNICATION_ETHERNET
config ETHERNET_UART_NAME
string "ethernet uart name"
default "/dev/usart3_dev3"
endif
if CONNECTION_COMMUNICATION_WIFI
config WIFI_UART_NAME
string "wifi uart name"
default "/dev/usart3_dev3"
endif
endmenu
endmenu
config __STACKSIZE__
int "stack size for interrupt"
default 4096
endmenu
menu "Hardware feature"
source "$KERNEL_DIR/resources/Kconfig"
endmenu
source "$KERNEL_DIR/Kconfig"

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mainmenu "XiUOS Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config KERNEL_DIR
string
option env="KERNEL_ROOT"
default "../.."
config BOARD_CORTEX_M4_EVB
bool
select ARCH_ARM
default y
source "$KERNEL_DIR/arch/Kconfig"
menu "cortex-m4 emulator feature"
source "$BSP_DIR/third_party_driver/Kconfig"
menu "config default board resources"
menu "config board app name"
config BOARD_APP_NAME
string "config board app name"
default "//XiUOS_cortex-m4-emulator_app.bin"
endmenu
menu "config board service table"
config SERVICE_TABLE_ADDRESS
hex "board service table address"
default 0x20000000
endmenu
menu "config hardware resources for connection"
if CONNECTION_COMMUNICATION_ETHERNET
config ETHERNET_UART_NAME
string "ethernet uart name"
default "/dev/usart3_dev3"
endif
if CONNECTION_COMMUNICATION_WIFI
config WIFI_UART_NAME
string "wifi uart name"
default "/dev/usart3_dev3"
endif
endmenu
endmenu
config __STACKSIZE__
int "stack size for interrupt"
default 4096
endmenu
menu "Hardware feature"
source "$KERNEL_DIR/resources/Kconfig"
endmenu
source "$KERNEL_DIR/Kconfig"

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mainmenu "XiUOS Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config KERNEL_DIR
string
option env="KERNEL_ROOT"
default "../.."
config BOARD_CORTEX_M4_EVB
bool
select ARCH_ARM
default y
source "$KERNEL_DIR/arch/Kconfig"
menu "cortex-m4 emulator feature"
source "$BSP_DIR/third_party_driver/Kconfig"
menu "config default board resources"
menu "config board app name"
config BOARD_APP_NAME
string "config board app name"
default "//XiUOS_cortex-m4-emulator_app.bin"
endmenu
menu "config board service table"
config SERVICE_TABLE_ADDRESS
hex "board service table address"
default 0x20000000
endmenu
menu "config hardware resources for connection"
if CONNECTION_COMMUNICATION_ETHERNET
config ETHERNET_UART_NAME
string "ethernet uart name"
default "/dev/usart3_dev3"
endif
if CONNECTION_COMMUNICATION_WIFI
config WIFI_UART_NAME
string "wifi uart name"
default "/dev/usart3_dev3"
endif
endmenu
endmenu
config __STACKSIZE__
int "stack size for interrupt"
default 4096
endmenu
menu "Hardware feature"
source "$KERNEL_DIR/resources/Kconfig"
endmenu
source "$KERNEL_DIR/Kconfig"

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mainmenu "XiUOS Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config KERNEL_DIR
string
option env="KERNEL_ROOT"
default "../.."
config BOARD_CORTEX_M4_EVB
bool
select ARCH_ARM
default y
source "$KERNEL_DIR/arch/Kconfig"
menu "cortex-m4 emulator feature"
source "$BSP_DIR/third_party_driver/Kconfig"
menu "config default board resources"
menu "config board app name"
config BOARD_APP_NAME
string "config board app name"
default "//XiUOS_cortex-m4-emulator_app.bin"
endmenu
menu "config board service table"
config SERVICE_TABLE_ADDRESS
hex "board service table address"
default 0x20000000
endmenu
menu "config hardware resources for connection"
if CONNECTION_COMMUNICATION_ETHERNET
config ETHERNET_UART_NAME
string "ethernet uart name"
default "/dev/usart3_dev3"
endif
if CONNECTION_COMMUNICATION_WIFI
config WIFI_UART_NAME
string "wifi uart name"
default "/dev/usart3_dev3"
endif
endmenu
endmenu
config __STACKSIZE__
int "stack size for interrupt"
default 4096
endmenu
menu "Hardware feature"
source "$KERNEL_DIR/resources/Kconfig"
endmenu
source "$KERNEL_DIR/Kconfig"

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mainmenu "XiUOS Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config KERNEL_DIR
string
option env="KERNEL_ROOT"
default "../.."
config BOARD_CORTEX_M4_EVB
bool
select ARCH_ARM
default y
source "$KERNEL_DIR/arch/Kconfig"
menu "cortex-m4 emulator feature"
source "$BSP_DIR/third_party_driver/Kconfig"
menu "config default board resources"
menu "config board app name"
config BOARD_APP_NAME
string "config board app name"
default "//XiUOS_cortex-m4-emulator_app.bin"
endmenu
menu "config board service table"
config SERVICE_TABLE_ADDRESS
hex "board service table address"
default 0x20000000
endmenu
menu "config hardware resources for connection"
if CONNECTION_COMMUNICATION_ETHERNET
config ETHERNET_UART_NAME
string "ethernet uart name"
default "/dev/usart3_dev3"
endif
if CONNECTION_COMMUNICATION_WIFI
config WIFI_UART_NAME
string "wifi uart name"
default "/dev/usart3_dev3"
endif
endmenu
endmenu
config __STACKSIZE__
int "stack size for interrupt"
default 4096
endmenu
menu "Hardware feature"
source "$KERNEL_DIR/resources/Kconfig"
endmenu
source "$KERNEL_DIR/Kconfig"

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mainmenu "XiUOS Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config KERNEL_DIR
string
option env="KERNEL_ROOT"
default "../.."
config BOARD_CORTEX_M4_EVB
bool
select ARCH_ARM
default y
source "$KERNEL_DIR/arch/Kconfig"
menu "cortex-m4 emulator feature"
source "$BSP_DIR/third_party_driver/Kconfig"
menu "config default board resources"
menu "config board app name"
config BOARD_APP_NAME
string "config board app name"
default "//XiUOS_cortex-m4-emulator_app.bin"
endmenu
menu "config board service table"
config SERVICE_TABLE_ADDRESS
hex "board service table address"
default 0x20000000
endmenu
menu "config hardware resources for connection"
if CONNECTION_COMMUNICATION_ETHERNET
config ETHERNET_UART_NAME
string "ethernet uart name"
default "/dev/usart3_dev3"
endif
if CONNECTION_COMMUNICATION_WIFI
config WIFI_UART_NAME
string "wifi uart name"
default "/dev/usart3_dev3"
endif
endmenu
endmenu
config __STACKSIZE__
int "stack size for interrupt"
default 4096
endmenu
menu "Hardware feature"
source "$KERNEL_DIR/resources/Kconfig"
endmenu
source "$KERNEL_DIR/Kconfig"

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mainmenu "XiUOS Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config KERNEL_DIR
string
option env="KERNEL_ROOT"
default "../.."
config BOARD_CORTEX_M4_EVB
bool
select ARCH_ARM
default y
source "$KERNEL_DIR/arch/Kconfig"
menu "cortex-m4 emulator feature"
source "$BSP_DIR/third_party_driver/Kconfig"
menu "config default board resources"
menu "config board app name"
config BOARD_APP_NAME
string "config board app name"
default "//XiUOS_cortex-m4-emulator_app.bin"
endmenu
menu "config board service table"
config SERVICE_TABLE_ADDRESS
hex "board service table address"
default 0x20000000
endmenu
menu "config hardware resources for connection"
if CONNECTION_COMMUNICATION_ETHERNET
config ETHERNET_UART_NAME
string "ethernet uart name"
default "/dev/usart3_dev3"
endif
if CONNECTION_COMMUNICATION_WIFI
config WIFI_UART_NAME
string "wifi uart name"
default "/dev/usart3_dev3"
endif
endmenu
endmenu
config __STACKSIZE__
int "stack size for interrupt"
default 4096
endmenu
menu "Hardware feature"
source "$KERNEL_DIR/resources/Kconfig"
endmenu
source "$KERNEL_DIR/Kconfig"

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mainmenu "XiUOS Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config KERNEL_DIR
string
option env="KERNEL_ROOT"
default "../.."
config BOARD_CORTEX_M4_EVB
bool
select ARCH_ARM
default y
source "$KERNEL_DIR/arch/Kconfig"
menu "cortex-m4 emulator feature"
source "$BSP_DIR/third_party_driver/Kconfig"
menu "config default board resources"
menu "config board app name"
config BOARD_APP_NAME
string "config board app name"
default "//XiUOS_cortex-m4-emulator_app.bin"
endmenu
menu "config board service table"
config SERVICE_TABLE_ADDRESS
hex "board service table address"
default 0x20000000
endmenu
menu "config hardware resources for connection"
if CONNECTION_COMMUNICATION_ETHERNET
config ETHERNET_UART_NAME
string "ethernet uart name"
default "/dev/usart3_dev3"
endif
if CONNECTION_COMMUNICATION_WIFI
config WIFI_UART_NAME
string "wifi uart name"
default "/dev/usart3_dev3"
endif
endmenu
endmenu
config __STACKSIZE__
int "stack size for interrupt"
default 4096
endmenu
menu "Hardware feature"
source "$KERNEL_DIR/resources/Kconfig"
endmenu
source "$KERNEL_DIR/Kconfig"

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mainmenu "XiUOS Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config KERNEL_DIR
string
option env="KERNEL_ROOT"
default "../.."
config BOARD_CORTEX_M4_EVB
bool
select ARCH_ARM
default y
source "$KERNEL_DIR/arch/Kconfig"
menu "cortex-m4 emulator feature"
source "$BSP_DIR/third_party_driver/Kconfig"
menu "config default board resources"
menu "config board app name"
config BOARD_APP_NAME
string "config board app name"
default "//XiUOS_cortex-m4-emulator_app.bin"
endmenu
menu "config board service table"
config SERVICE_TABLE_ADDRESS
hex "board service table address"
default 0x20000000
endmenu
menu "config hardware resources for connection"
if CONNECTION_COMMUNICATION_ETHERNET
config ETHERNET_UART_NAME
string "ethernet uart name"
default "/dev/usart3_dev3"
endif
if CONNECTION_COMMUNICATION_WIFI
config WIFI_UART_NAME
string "wifi uart name"
default "/dev/usart3_dev3"
endif
endmenu
endmenu
config __STACKSIZE__
int "stack size for interrupt"
default 4096
endmenu
menu "Hardware feature"
source "$KERNEL_DIR/resources/Kconfig"
endmenu
source "$KERNEL_DIR/Kconfig"

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mainmenu "XiUOS Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config KERNEL_DIR
string
option env="KERNEL_ROOT"
default "../.."
config BOARD_CORTEX_M4_EVB
bool
select ARCH_ARM
default y
source "$KERNEL_DIR/arch/Kconfig"
menu "cortex-m4 emulator feature"
source "$BSP_DIR/third_party_driver/Kconfig"
menu "config default board resources"
menu "config board app name"
config BOARD_APP_NAME
string "config board app name"
default "//XiUOS_cortex-m4-emulator_app.bin"
endmenu
menu "config board service table"
config SERVICE_TABLE_ADDRESS
hex "board service table address"
default 0x20000000
endmenu
menu "config hardware resources for connection"
if CONNECTION_COMMUNICATION_ETHERNET
config ETHERNET_UART_NAME
string "ethernet uart name"
default "/dev/usart3_dev3"
endif
if CONNECTION_COMMUNICATION_WIFI
config WIFI_UART_NAME
string "wifi uart name"
default "/dev/usart3_dev3"
endif
endmenu
endmenu
config __STACKSIZE__
int "stack size for interrupt"
default 4096
endmenu
menu "Hardware feature"
source "$KERNEL_DIR/resources/Kconfig"
endmenu
source "$KERNEL_DIR/Kconfig"

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mainmenu "XiUOS Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config KERNEL_DIR
string
option env="KERNEL_ROOT"
default "../.."
config BOARD_CORTEX_M4_EVB
bool
select ARCH_ARM
default y
source "$KERNEL_DIR/arch/Kconfig"
menu "cortex-m4 emulator feature"
source "$BSP_DIR/third_party_driver/Kconfig"
menu "config default board resources"
menu "config board app name"
config BOARD_APP_NAME
string "config board app name"
default "//XiUOS_cortex-m4-emulator_app.bin"
endmenu
menu "config board service table"
config SERVICE_TABLE_ADDRESS
hex "board service table address"
default 0x20000000
endmenu
menu "config hardware resources for connection"
if CONNECTION_COMMUNICATION_ETHERNET
config ETHERNET_UART_NAME
string "ethernet uart name"
default "/dev/usart3_dev3"
endif
if CONNECTION_COMMUNICATION_WIFI
config WIFI_UART_NAME
string "wifi uart name"
default "/dev/usart3_dev3"
endif
endmenu
endmenu
config __STACKSIZE__
int "stack size for interrupt"
default 4096
endmenu
menu "Hardware feature"
source "$KERNEL_DIR/resources/Kconfig"
endmenu
source "$KERNEL_DIR/Kconfig"

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mainmenu "XiUOS Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config KERNEL_DIR
string
option env="KERNEL_ROOT"
default "../.."
config BOARD_CORTEX_M4_EVB
bool
select ARCH_ARM
default y
source "$KERNEL_DIR/arch/Kconfig"
menu "cortex-m4 emulator feature"
source "$BSP_DIR/third_party_driver/Kconfig"
menu "config default board resources"
menu "config board app name"
config BOARD_APP_NAME
string "config board app name"
default "//XiUOS_cortex-m4-emulator_app.bin"
endmenu
menu "config board service table"
config SERVICE_TABLE_ADDRESS
hex "board service table address"
default 0x20000000
endmenu
menu "config hardware resources for connection"
if CONNECTION_COMMUNICATION_ETHERNET
config ETHERNET_UART_NAME
string "ethernet uart name"
default "/dev/usart3_dev3"
endif
if CONNECTION_COMMUNICATION_WIFI
config WIFI_UART_NAME
string "wifi uart name"
default "/dev/usart3_dev3"
endif
endmenu
endmenu
endmenu
menu "Hardware feature"
source "$KERNEL_DIR/resources/Kconfig"
endmenu
source "$KERNEL_DIR/Kconfig"

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mainmenu "XiUOS Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config KERNEL_DIR
string
option env="KERNEL_ROOT"
default "../.."
config BOARD_CORTEX_M4_EVB
bool
select ARCH_ARM
default y
source "$KERNEL_DIR/arch/Kconfig"
menu "cortex-m4 emulator feature"
source "$BSP_DIR/third_party_driver/Kconfig"
menu "config default board resources"
menu "config board app name"
config BOARD_APP_NAME
string "config board app name"
default "//XiUOS_cortex-m4-emulator_app.bin"
endmenu
menu "config board service table"
config SERVICE_TABLE_ADDRESS
hex "board service table address"
default 0x20000000
endmenu
menu "config hardware resources for connection"
if CONNECTION_COMMUNICATION_ETHERNET
config ETHERNET_UART_NAME
string "ethernet uart name"
default "/dev/usart3_dev3"
endif
if CONNECTION_COMMUNICATION_WIFI
config WIFI_UART_NAME
string "wifi uart name"
default "/dev/usart3_dev3"
endif
endmenu
endmenu
endmenu
menu "Hardware feature"
source "$KERNEL_DIR/resources/Kconfig"
endmenu
source "$KERNEL_DIR/Kconfig"

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mainmenu "XiUOS Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config KERNEL_DIR
string
option env="KERNEL_ROOT"
default "../.."
config BOARD_CORTEX_M4_EVB
bool
select ARCH_ARM
default y
source "$KERNEL_DIR/arch/Kconfig"
menu "cortex-m4 emulator feature"
source "$BSP_DIR/third_party_driver/Kconfig"
menu "config default board resources"
menu "config board app name"
config BOARD_APP_NAME
string "config board app name"
default "//XiUOS_cortex-m4-emulator_app.bin"
endmenu
menu "config board service table"
config SERVICE_TABLE_ADDRESS
hex "board service table address"
default 0x20000000
endmenu
menu "config hardware resources for connection"
if CONNECTION_COMMUNICATION_ETHERNET
config ETHERNET_UART_NAME
string "ethernet uart name"
default "/dev/usart3_dev3"
endif
if CONNECTION_COMMUNICATION_WIFI
config WIFI_UART_NAME
string "wifi uart name"
default "/dev/usart3_dev3"
endif
endmenu
endmenu
config __STACKSIZE__
int "stack size for interrupt"
default 4096
endmenu
menu "Hardware feature"
source "$KERNEL_DIR/resources/Kconfig"
endmenu
source "$KERNEL_DIR/Kconfig"

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mainmenu "XiUOS Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config KERNEL_DIR
string
option env="KERNEL_ROOT"
default "../.."
config BOARD_CORTEX_M4_EVB
bool
select ARCH_ARM
default y
source "$KERNEL_DIR/arch/Kconfig"
menu "cortex-m4 emulator feature"
source "$BSP_DIR/third_party_driver/Kconfig"
menu "config default board resources"
menu "config board app name"
config BOARD_APP_NAME
string "config board app name"
default "//XiUOS_cortex-m4-emulator_app.bin"
endmenu
menu "config board service table"
config SERVICE_TABLE_ADDRESS
hex "board service table address"
default 0x20000000
endmenu
menu "config hardware resources for connection"
if CONNECTION_COMMUNICATION_ETHERNET
config ETHERNET_UART_NAME
string "ethernet uart name"
default "/dev/usart3_dev3"
endif
if CONNECTION_COMMUNICATION_WIFI
config WIFI_UART_NAME
string "wifi uart name"
default "/dev/usart3_dev3"
endif
endmenu
endmenu
config __STACKSIZE__
int "stack size for interrupt"
default 4096
endmenu
menu "Hardware feature"
source "$KERNEL_DIR/resources/Kconfig"
endmenu
source "$KERNEL_DIR/Kconfig"

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mainmenu "XiUOS Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config KERNEL_DIR
string
option env="KERNEL_ROOT"
default "../.."
config BOARD_CORTEX_M4_EVB
bool
select ARCH_ARM
default y
source "$KERNEL_DIR/arch/Kconfig"
menu "cortex-m4 emulator feature"
source "$BSP_DIR/third_party_driver/Kconfig"
menu "config default board resources"
menu "config board app name"
config BOARD_APP_NAME
string "config board app name"
default "/XiUOS_cortex-m4-emulator_app.bin"
endmenu
menu "config board service table"
config SERVICE_TABLE_ADDRESS
hex "board service table address"
default 0x20000000
endmenu
menu "config hardware resources for connection"
if CONNECTION_COMMUNICATION_ETHERNET
config ETHERNET_UART_NAME
string "ethernet uart name"
default "/dev/usart3_dev3"
endif
if CONNECTION_COMMUNICATION_WIFI
config WIFI_UART_NAME
string "wifi uart name"
default "/dev/usart3_dev3"
endif
endmenu
endmenu
config __STACKSIZE__
int "stack size for interrupt"
default 4096
endmenu
menu "Hardware feature"
source "$KERNEL_DIR/resources/Kconfig"
endmenu
source "$KERNEL_DIR/Kconfig"

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/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file board.c
* @brief support stm32f407-st-discovery-board init configure and start-up
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021-04-25
*/
/*************************************************
File name: board.c
Description: support stm32f407-st-discovery-board init configure and driver/task/... init
Others:
History:
1. Date: 2021-04-25
Author: AIIT XUOS Lab
Modification:
1. support stm32f407-st-discovery-board InitBoardHardware
*************************************************/
#include <xiuos.h>
#include "hardware_rcc.h"
#include "board.h"
#include "connect_usart.h"
#include "misc.h"
#include <xs_service.h>
static void ClockConfiguration()
{
int cr,cfgr,pllcfgr;
int cr1,cfgr1,pllcfgr1;
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
PWR->CR |= PWR_CR_VOS;
RCC_HSEConfig(RCC_HSE_ON);
if (RCC_WaitForHSEStartUp() == SUCCESS)
{
RCC_HCLKConfig(RCC_SYSCLK_Div1);
RCC_PCLK2Config(RCC_HCLK_Div2);
RCC_PCLK1Config(RCC_HCLK_Div4);
RCC_PLLConfig(RCC_PLLSource_HSE, 8, 336, 2, 7);
RCC_PLLCmd(ENABLE);
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS;
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
}
SystemCoreClockUpdate();
}
void NVIC_Configuration(void)
{
#ifdef VECT_TAB_RAM
NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
#else
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
#endif
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
}
void SysTickConfiguration(void)
{
RCC_ClocksTypeDef rcc_clocks;
uint32 cnts;
RCC_GetClocksFreq(&rcc_clocks);
cnts = (uint32)rcc_clocks.HCLK_Frequency / TICK_PER_SECOND;
cnts = cnts / 8;
SysTick_Config(cnts);
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8);
}
void SysTick_Handler(int irqn, void *arg)
{
TickAndTaskTimesliceUpdate();
}
DECLARE_HW_IRQ(SysTick_IRQn, SysTick_Handler, NONE);
void InitBoardHardware()
{
int i = 0;
int ret = 0;
ClockConfiguration();
NVIC_Configuration();
SysTickConfiguration();
#ifdef BSP_USING_UART
Stm32HwUsartInit();
#endif
#ifdef KERNEL_CONSOLE
InstallConsole(KERNEL_CONSOLE_BUS_NAME, KERNEL_CONSOLE_DRV_NAME, KERNEL_CONSOLE_DEVICE_NAME);
RCC_ClocksTypeDef rcc_clocks;
RCC_GetClocksFreq(&rcc_clocks);
KPrintf("HCLK_Frequency %d, PCLK1_Frequency %d, PCLK2_Frequency %d, SYSCLK_Frequency %d\n", rcc_clocks.HCLK_Frequency, rcc_clocks.PCLK1_Frequency, rcc_clocks.PCLK2_Frequency, rcc_clocks.SYSCLK_Frequency);
KPrintf("\nconsole init completed.\n");
KPrintf("board initialization......\n");
#endif
InitBoardMemory((void*)MEMORY_START_ADDRESS, (void*)MEMORY_END_ADDRESS);
}

78
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/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file board.h
* @brief define stm32f407-st-discovery-board init configure and start-up function
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021-04-25
*/
/*************************************************
File name: board.h
Description: define stm32f407-st-discovery-board board init function and struct
Others:
History:
1. Date: 2021-04-25
Author: AIIT XUOS Lab
Modification:
1. define stm32f407-st-discovery-board InitBoardHardware
2. define stm32f407-st-discovery-board data and bss struct
*************************************************/
#ifndef BOARD_H
#define BOARD_H
#include <stdint.h>
extern int __stack_end__;
extern unsigned int g_service_table_start;
extern unsigned int g_service_table_end;
#define SURPORT_MPU
#define MEMORY_START_ADDRESS (&__stack_end__)
#define MEM_OFFSET 128
#define MEMORY_END_ADDRESS (0x20000000 + MEM_OFFSET * 1024)
#ifdef SEPARATE_COMPILE
typedef int (*main_t)(int argc, char *argv[]);
typedef void (*exit_t)(void);
struct userspace_s
{
main_t us_entrypoint;
exit_t us_taskquit;
uintptr_t us_textstart;
uintptr_t us_textend;
uintptr_t us_datasource;
uintptr_t us_datastart;
uintptr_t us_dataend;
uintptr_t us_bssstart;
uintptr_t us_bssend;
uintptr_t us_heapend;
};
#define USERSPACE (( struct userspace_s *)(0x08080000))
#ifndef SERVICE_TABLE_ADDRESS
#define SERVICE_TABLE_ADDRESS (0x20000000)
#endif
#define USER_SRAM_SIZE 64
#define USER_MEMORY_START_ADDRESS (USERSPACE->us_bssend)
#define USER_MEMORY_END_ADDRESS (0x10000000 + USER_SRAM_SIZE * 1024)
#endif
void InitBoardHardware(void);
#endif

125
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/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file board.c
* @brief support stm32f407-st-discovery-board init configure and start-up
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021-04-25
*/
/*************************************************
File name: board.c
Description: support stm32f407-st-discovery-board init configure and driver/task/... init
Others:
History:
1. Date: 2021-04-25
Author: AIIT XUOS Lab
Modification:
1. support stm32f407-st-discovery-board InitBoardHardware
*************************************************/
#include <xiuos.h>
#include "hardware_rcc.h"
#include "board.h"
#include "connect_usart.h"
#include "misc.h"
#include <xs_service.h>
static void ClockConfiguration()
{
int cr,cfgr,pllcfgr;
int cr1,cfgr1,pllcfgr1;
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
PWR->CR |= PWR_CR_VOS;
RCC_HSEConfig(RCC_HSE_ON);
if (RCC_WaitForHSEStartUp() == SUCCESS)
{
RCC_HCLKConfig(RCC_SYSCLK_Div1);
RCC_PCLK2Config(RCC_HCLK_Div2);
RCC_PCLK1Config(RCC_HCLK_Div4);
RCC_PLLConfig(RCC_PLLSource_HSE, 8, 336, 2, 7);
RCC_PLLCmd(ENABLE);
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS;
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
}
SystemCoreClockUpdate();
}
void NVIC_Configuration(void)
{
#ifdef VECT_TAB_RAM
NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
#else
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
#endif
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
}
void SysTickConfiguration(void)
{
RCC_ClocksTypeDef rcc_clocks;
uint32 cnts;
RCC_GetClocksFreq(&rcc_clocks);
cnts = (uint32)rcc_clocks.HCLK_Frequency / TICK_PER_SECOND;
cnts = cnts / 8;
SysTick_Config(cnts);
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8);
}
void SysTick_Handler(int irqn, void *arg)
{
TickAndTaskTimesliceUpdate();
}
DECLARE_HW_IRQ(SysTick_IRQn, SysTick_Handler, NONE);
void InitBoardHardware()
{
int i = 0;
int ret = 0;
ClockConfiguration();
NVIC_Configuration();
SysTickConfiguration();
#ifdef BSP_USING_UART
InitHwUsart();
#endif
#ifdef KERNEL_CONSOLE
InstallConsole(KERNEL_CONSOLE_BUS_NAME, KERNEL_CONSOLE_DRV_NAME, KERNEL_CONSOLE_DEVICE_NAME);
RCC_ClocksTypeDef rcc_clocks;
RCC_GetClocksFreq(&rcc_clocks);
KPrintf("HCLK_Frequency %d, PCLK1_Frequency %d, PCLK2_Frequency %d, SYSCLK_Frequency %d\n", rcc_clocks.HCLK_Frequency, rcc_clocks.PCLK1_Frequency, rcc_clocks.PCLK2_Frequency, rcc_clocks.SYSCLK_Frequency);
KPrintf("\nconsole init completed.\n");
KPrintf("board initialization......\n");
#endif
InitBoardMemory((void*)MEMORY_START_ADDRESS, (void*)MEMORY_END_ADDRESS);
}

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/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file board.c
* @brief support stm32f407-st-discovery-board init configure and start-up
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021-04-25
*/
/*************************************************
File name: board.c
Description: support stm32f407-st-discovery-board init configure and driver/task/... init
Others:
History:
1. Date: 2021-04-25
Author: AIIT XUOS Lab
Modification:
1. support stm32f407-st-discovery-board InitBoardHardware
*************************************************/
#include <xiuos.h>
#include "hardware_rcc.h"
#include "board.h"
#include "connect_usart.h"
#include "misc.h"
#include <xs_service.h>
static void ClockConfiguration()
{
int cr,cfgr,pllcfgr;
int cr1,cfgr1,pllcfgr1;
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
PWR->CR |= PWR_CR_VOS;
RCC_HSEConfig(RCC_HSE_ON);
if (RCC_WaitForHSEStartUp() == SUCCESS)
{
RCC_HCLKConfig(RCC_SYSCLK_Div1);
RCC_PCLK2Config(RCC_HCLK_Div2);
RCC_PCLK1Config(RCC_HCLK_Div4);
RCC_PLLConfig(RCC_PLLSource_HSE, 8, 336, 2, 7);
RCC_PLLCmd(ENABLE);
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS;
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
}
SystemCoreClockUpdate();
}
void NVIC_Configuration(void)
{
#ifdef VECT_TAB_RAM
NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
#else
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
#endif
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
}
void SysTickConfiguration(void)
{
RCC_ClocksTypeDef rcc_clocks;
uint32 cnts;
RCC_GetClocksFreq(&rcc_clocks);
cnts = (uint32)rcc_clocks.HCLK_Frequency / TICK_PER_SECOND;
cnts = cnts / 8;
SysTick_Config(cnts);
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8);
}
void SysTick_Handler(int irqn, void *arg)
{
TickAndTaskTimesliceUpdate();
}
DECLARE_HW_IRQ(SysTick_IRQn, SysTick_Handler, NONE);
void InitBoardHardware()
{
int i = 0;
int ret = 0;
ClockConfiguration();
NVIC_Configuration();
SysTickConfiguration();
#ifdef BSP_USING_UART
InitHwUsart();
#endif
#ifdef KERNEL_CONSOLE
InstallConsole(KERNEL_CONSOLE_BUS_NAME, KERNEL_CONSOLE_DRV_NAME, KERNEL_CONSOLE_DEVICE_NAME);
RCC_ClocksTypeDef rcc_clocks;
RCC_GetClocksFreq(&rcc_clocks);
KPrintf("HCLK_Frequency %d, PCLK1_Frequency %d, PCLK2_Frequency %d, SYSCLK_Frequency %d\n", rcc_clocks.HCLK_Frequency, rcc_clocks.PCLK1_Frequency, rcc_clocks.PCLK2_Frequency, rcc_clocks.SYSCLK_Frequency);
KPrintf("\nconsole init completed.\n");
KPrintf("board initialization......\n");
#endif
InitBoardMemory((void*)MEMORY_START_ADDRESS, (void*)MEMORY_END_ADDRESS);
}

125
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/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file board.c
* @brief support stm32f407-st-discovery-board init configure and start-up
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021-04-25
*/
/*************************************************
File name: board.c
Description: support stm32f407-st-discovery-board init configure and driver/task/... init
Others:
History:
1. Date: 2021-04-25
Author: AIIT XUOS Lab
Modification:
1. support stm32f407-st-discovery-board InitBoardHardware
*************************************************/
#include <xiuos.h>
#include "hardware_rcc.h"
#include "board.h"
#include "connect_usart.h"
#include "misc.h"
#include <xs_service.h>
static void ClockConfiguration()
{
int cr,cfgr,pllcfgr;
int cr1,cfgr1,pllcfgr1;
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
PWR->CR |= PWR_CR_VOS;
RCC_HSEConfig(RCC_HSE_ON);
if (RCC_WaitForHSEStartUp() == SUCCESS)
{
RCC_HCLKConfig(RCC_SYSCLK_Div1);
RCC_PCLK2Config(RCC_HCLK_Div2);
RCC_PCLK1Config(RCC_HCLK_Div4);
RCC_PLLConfig(RCC_PLLSource_HSE, 8, 336, 2, 7);
RCC_PLLCmd(ENABLE);
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS;
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
}
SystemCoreClockUpdate();
}
void NVIC_Configuration(void)
{
#ifdef VECT_TAB_RAM
NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
#else
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
#endif
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
}
void SysTickConfiguration(void)
{
RCC_ClocksTypeDef rcc_clocks;
uint32 cnts;
RCC_GetClocksFreq(&rcc_clocks);
cnts = (uint32)rcc_clocks.HCLK_Frequency / TICK_PER_SECOND;
cnts = cnts / 8;
SysTick_Config(cnts);
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8);
}
void SysTick_Handler(int irqn, void *arg)
{
TickAndTaskTimesliceUpdate();
}
DECLARE_HW_IRQ(SysTick_IRQn, SysTick_Handler, NONE);
void InitBoardHardware()
{
int i = 0;
int ret = 0;
ClockConfiguration();
NVIC_Configuration();
SysTickConfiguration();
#ifdef BSP_USING_UART
InitHwUsart();
#endif
#ifdef KERNEL_CONSOLE
InstallConsole(KERNEL_CONSOLE_BUS_NAME, KERNEL_CONSOLE_DRV_NAME, KERNEL_CONSOLE_DEVICE_NAME);
RCC_ClocksTypeDef rcc_clocks;
RCC_GetClocksFreq(&rcc_clocks);
KPrintf("HCLK_Frequency %d, PCLK1_Frequency %d, PCLK2_Frequency %d, SYSCLK_Frequency %d\n", rcc_clocks.HCLK_Frequency, rcc_clocks.PCLK1_Frequency, rcc_clocks.PCLK2_Frequency, rcc_clocks.SYSCLK_Frequency);
KPrintf("\nconsole init completed.\n");
KPrintf("board initialization......\n");
#endif
InitBoardMemory((void*)MEMORY_START_ADDRESS, (void*)MEMORY_END_ADDRESS);
}

125
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/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file board.c
* @brief support stm32f407-st-discovery-board init configure and start-up
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021-04-25
*/
/*************************************************
File name: board.c
Description: support stm32f407-st-discovery-board init configure and driver/task/... init
Others:
History:
1. Date: 2021-04-25
Author: AIIT XUOS Lab
Modification:
1. support stm32f407-st-discovery-board InitBoardHardware
*************************************************/
#include <xiuos.h>
#include "hardware_rcc.h"
#include "board.h"
#include "connect_usart.h"
#include "misc.h"
#include <xs_service.h>
static void ClockConfiguration()
{
int cr,cfgr,pllcfgr;
int cr1,cfgr1,pllcfgr1;
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
PWR->CR |= PWR_CR_VOS;
RCC_HSEConfig(RCC_HSE_ON);
if (RCC_WaitForHSEStartUp() == SUCCESS)
{
RCC_HCLKConfig(RCC_SYSCLK_Div1);
RCC_PCLK2Config(RCC_HCLK_Div2);
RCC_PCLK1Config(RCC_HCLK_Div4);
RCC_PLLConfig(RCC_PLLSource_HSE, 8, 336, 2, 7);
RCC_PLLCmd(ENABLE);
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS;
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
}
SystemCoreClockUpdate();
}
void NVIC_Configuration(void)
{
#ifdef VECT_TAB_RAM
NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
#else
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
#endif
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
}
void SysTickConfiguration(void)
{
RCC_ClocksTypeDef rcc_clocks;
uint32 cnts;
RCC_GetClocksFreq(&rcc_clocks);
cnts = (uint32)rcc_clocks.HCLK_Frequency / TICK_PER_SECOND;
cnts = cnts / 8;
SysTick_Config(cnts);
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8);
}
void SysTick_Handler(int irqn, void *arg)
{
TickAndTaskTimesliceUpdate();
}
DECLARE_HW_IRQ(SysTick_IRQn, SysTick_Handler, NONE);
void InitBoardHardware()
{
int i = 0;
int ret = 0;
ClockConfiguration();
NVIC_Configuration();
SysTickConfiguration();
#ifdef BSP_USING_UART
InitHwUsart();
#endif
#ifdef KERNEL_CONSOLE
InstallConsole(KERNEL_CONSOLE_BUS_NAME, KERNEL_CONSOLE_DRV_NAME, KERNEL_CONSOLE_DEVICE_NAME);
RCC_ClocksTypeDef rcc_clocks;
RCC_GetClocksFreq(&rcc_clocks);
KPrintf("HCLK_Frequency %d, PCLK1_Frequency %d, PCLK2_Frequency %d, SYSCLK_Frequency %d\n", rcc_clocks.HCLK_Frequency, rcc_clocks.PCLK1_Frequency, rcc_clocks.PCLK2_Frequency, rcc_clocks.SYSCLK_Frequency);
KPrintf("\nconsole init completed.\n");
KPrintf("board initialization......\n");
#endif
InitBoardMemory((void*)MEMORY_START_ADDRESS, (void*)MEMORY_END_ADDRESS);
}

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/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file board.h
* @brief define stm32f407-st-discovery-board init configure and start-up function
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021-04-25
*/
/*************************************************
File name: board.h
Description: define stm32f407-st-discovery-board board init function and struct
Others:
History:
1. Date: 2021-04-25
Author: AIIT XUOS Lab
Modification:
1. define stm32f407-st-discovery-board InitBoardHardware
2. define stm32f407-st-discovery-board data and bss struct
*************************************************/
#ifndef BOARD_H
#define BOARD_H
#include <stdint.h>
extern int __stack_end__;
extern unsigned int g_service_table_start;
extern unsigned int g_service_table_end;
#define SURPORT_MPU
#define MEMORY_START_ADDRESS (&__stack_end__)
#define MEM_OFFSET 128
#define MEMORY_END_ADDRESS (0x20000000 + MEM_OFFSET * 1024)
#ifdef SEPARATE_COMPILE
typedef int (*main_t)(int argc, char *argv[]);
typedef void (*exit_t)(void);
struct userspace_s
{
main_t us_entrypoint;
exit_t us_taskquit;
uintptr_t us_textstart;
uintptr_t us_textend;
uintptr_t us_datasource;
uintptr_t us_datastart;
uintptr_t us_dataend;
uintptr_t us_bssstart;
uintptr_t us_bssend;
uintptr_t us_heapend;
};
#define USERSPACE (( struct userspace_s *)(0x08080000))
#ifndef SERVICE_TABLE_ADDRESS
#define SERVICE_TABLE_ADDRESS (0x20000000)
#endif
#define USER_SRAM_SIZE 64
#define USER_MEMORY_START_ADDRESS (USERSPACE->us_bssend)
#define USER_MEMORY_END_ADDRESS (0x10000000 + USER_SRAM_SIZE * 1024)
#endif
void InitBoardHardware(void);
#endif

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/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file board.c
* @brief support stm32f407-st-discovery-board init configure and start-up
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021-04-25
*/
/*************************************************
File name: board.c
Description: support stm32f407-st-discovery-board init configure and driver/task/... init
Others:
History:
1. Date: 2021-04-25
Author: AIIT XUOS Lab
Modification:
1. support stm32f407-st-discovery-board InitBoardHardware
*************************************************/
#include <xiuos.h>
#include "hardware_rcc.h"
#include "board.h"
#include "connect_usart.h"
#include "misc.h"
#include <xs_service.h>
static void ClockConfiguration()
{
int cr,cfgr,pllcfgr;
int cr1,cfgr1,pllcfgr1;
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
PWR->CR |= PWR_CR_VOS;
RCC_HSEConfig(RCC_HSE_ON);
if (RCC_WaitForHSEStartUp() == SUCCESS)
{
RCC_HCLKConfig(RCC_SYSCLK_Div1);
RCC_PCLK2Config(RCC_HCLK_Div2);
RCC_PCLK1Config(RCC_HCLK_Div4);
RCC_PLLConfig(RCC_PLLSource_HSE, 8, 336, 2, 7);
RCC_PLLCmd(ENABLE);
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS;
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
}
SystemCoreClockUpdate();
}
void NVIC_Configuration(void)
{
#ifdef VECT_TAB_RAM
NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
#else
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
#endif
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
}
void SysTickConfiguration(void)
{
RCC_ClocksTypeDef rcc_clocks;
uint32 cnts;
RCC_GetClocksFreq(&rcc_clocks);
cnts = (uint32)rcc_clocks.HCLK_Frequency / TICK_PER_SECOND;
cnts = cnts / 8;
SysTick_Config(cnts);
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8);
}
void SysTick_Handler(int irqn, void *arg)
{
TickAndTaskTimesliceUpdate();
}
DECLARE_HW_IRQ(SysTick_IRQn, SysTick_Handler, NONE);
void InitBoardHardware()
{
int i = 0;
int ret = 0;
ClockConfiguration();
NVIC_Configuration();
SysTickConfiguration();
#ifdef BSP_USING_UART
Stm32HwUsartInit();
#endif
#ifdef KERNEL_CONSOLE
InstallConsole(KERNEL_CONSOLE_BUS_NAME, KERNEL_CONSOLE_DRV_NAME, KERNEL_CONSOLE_DEVICE_NAME);
RCC_ClocksTypeDef rcc_clocks;
RCC_GetClocksFreq(&rcc_clocks);
KPrintf("HCLK_Frequency %d, PCLK1_Frequency %d, PCLK2_Frequency %d, SYSCLK_Frequency %d\n", rcc_clocks.HCLK_Frequency, rcc_clocks.PCLK1_Frequency, rcc_clocks.PCLK2_Frequency, rcc_clocks.SYSCLK_Frequency);
KPrintf("\nconsole init completed.\n");
KPrintf("board initialization......\n");
#endif
InitBoardMemory((void*)MEMORY_START_ADDRESS, (void*)MEMORY_END_ADDRESS);
}

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/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file board.c
* @brief support stm32f407-st-discovery-board init configure and start-up
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021-04-25
*/
/*************************************************
File name: board.c
Description: support stm32f407-st-discovery-board init configure and driver/task/... init
Others:
History:
1. Date: 2021-04-25
Author: AIIT XUOS Lab
Modification:
1. support stm32f407-st-discovery-board InitBoardHardware
*************************************************/
#include <xiuos.h>
#include "hardware_rcc.h"
#include "board.h"
#include "connect_usart.h"
#include "misc.h"
#include <xs_service.h>
static void ClockConfiguration()
{
int cr,cfgr,pllcfgr;
int cr1,cfgr1,pllcfgr1;
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
PWR->CR |= PWR_CR_VOS;
RCC_HSEConfig(RCC_HSE_ON);
if (RCC_WaitForHSEStartUp() == SUCCESS)
{
RCC_HCLKConfig(RCC_SYSCLK_Div1);
RCC_PCLK2Config(RCC_HCLK_Div2);
RCC_PCLK1Config(RCC_HCLK_Div4);
RCC_PLLConfig(RCC_PLLSource_HSE, 8, 336, 2, 7);
RCC_PLLCmd(ENABLE);
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS;
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
}
SystemCoreClockUpdate();
}
void NVIC_Configuration(void)
{
#ifdef VECT_TAB_RAM
NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
#else
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
#endif
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
}
void SysTickConfiguration(void)
{
RCC_ClocksTypeDef rcc_clocks;
uint32 cnts;
RCC_GetClocksFreq(&rcc_clocks);
cnts = (uint32)rcc_clocks.HCLK_Frequency / TICK_PER_SECOND;
cnts = cnts / 8;
SysTick_Config(cnts);
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8);
}
void SysTick_Handler(int irqn, void *arg)
{
TickAndTaskTimesliceUpdate();
}
DECLARE_HW_IRQ(SysTick_IRQn, SysTick_Handler, NONE);
void InitBoardHardware()
{
int i = 0;
int ret = 0;
ClockConfiguration();
NVIC_Configuration();
SysTickConfiguration();
#ifdef BSP_USING_UART
Stm32HwUsartInit();
#endif
#ifdef KERNEL_CONSOLE
InstallConsole(KERNEL_CONSOLE_BUS_NAME, KERNEL_CONSOLE_DRV_NAME, KERNEL_CONSOLE_DEVICE_NAME);
RCC_ClocksTypeDef rcc_clocks;
RCC_GetClocksFreq(&rcc_clocks);
KPrintf("HCLK_Frequency %d, PCLK1_Frequency %d, PCLK2_Frequency %d, SYSCLK_Frequency %d\n", rcc_clocks.HCLK_Frequency, rcc_clocks.PCLK1_Frequency, rcc_clocks.PCLK2_Frequency, rcc_clocks.SYSCLK_Frequency);
KPrintf("\nconsole init completed.\n");
KPrintf("board initialization......\n");
#endif
InitBoardMemory((void*)MEMORY_START_ADDRESS, (void*)MEMORY_END_ADDRESS);
}

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/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file board.c
* @brief support stm32f407-st-discovery-board init configure and start-up
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021-04-25
*/
/*************************************************
File name: board.c
Description: support stm32f407-st-discovery-board init configure and driver/task/... init
Others:
History:
1. Date: 2021-04-25
Author: AIIT XUOS Lab
Modification:
1. support stm32f407-st-discovery-board InitBoardHardware
*************************************************/
#include <xiuos.h>
#include "hardware_rcc.h"
#include "board.h"
#include "connect_usart.h"
#include "misc.h"
#include <xs_service.h>
static void ClockConfiguration()
{
int cr,cfgr,pllcfgr;
int cr1,cfgr1,pllcfgr1;
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
PWR->CR |= PWR_CR_VOS;
RCC_HSEConfig(RCC_HSE_ON);
if (RCC_WaitForHSEStartUp() == SUCCESS)
{
RCC_HCLKConfig(RCC_SYSCLK_Div1);
RCC_PCLK2Config(RCC_HCLK_Div2);
RCC_PCLK1Config(RCC_HCLK_Div4);
RCC_PLLConfig(RCC_PLLSource_HSE, 8, 336, 2, 7);
RCC_PLLCmd(ENABLE);
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS;
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
}
SystemCoreClockUpdate();
}
void NVIC_Configuration(void)
{
#ifdef VECT_TAB_RAM
NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
#else
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
#endif
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
}
void SysTickConfiguration(void)
{
RCC_ClocksTypeDef rcc_clocks;
uint32 cnts;
RCC_GetClocksFreq(&rcc_clocks);
cnts = (uint32)rcc_clocks.HCLK_Frequency / TICK_PER_SECOND;
cnts = cnts / 8;
SysTick_Config(cnts);
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8);
}
void SysTick_Handler(int irqn, void *arg)
{
TickAndTaskTimesliceUpdate();
}
DECLARE_HW_IRQ(SysTick_IRQn, SysTick_Handler, NONE);
void InitBoardHardware()
{
int i = 0;
int ret = 0;
ClockConfiguration();
NVIC_Configuration();
SysTickConfiguration();
#ifdef BSP_USING_UART
Stm32HwUsartInit();
#endif
#ifdef KERNEL_CONSOLE
InstallConsole(KERNEL_CONSOLE_BUS_NAME, KERNEL_CONSOLE_DRV_NAME, KERNEL_CONSOLE_DEVICE_NAME);
RCC_ClocksTypeDef rcc_clocks;
RCC_GetClocksFreq(&rcc_clocks);
KPrintf("HCLK_Frequency %d, PCLK1_Frequency %d, PCLK2_Frequency %d, SYSCLK_Frequency %d\n", rcc_clocks.HCLK_Frequency, rcc_clocks.PCLK1_Frequency, rcc_clocks.PCLK2_Frequency, rcc_clocks.SYSCLK_Frequency);
KPrintf("\nconsole init completed.\n");
KPrintf("board initialization......\n");
#endif
InitBoardMemory((void*)MEMORY_START_ADDRESS, (void*)MEMORY_END_ADDRESS);
}

17
Ubiquitous/XiUOS/board/cortex-m4-emulator/.history/config_20210824125750.mk Normal file
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export CROSS_COMPILE ?=/usr/bin/arm-none-eabi-
export CFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -fgnu89-inline -Wa,-mimplicit-it=thumb -Werror
export AFLAGS := -c -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -x assembler-with-cpp -Wa,-mimplicit-it=thumb -gdwarf-2
export LFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_stm32f407-st-discovery.map,-cref,-u,Reset_Handler -T $(BSP_ROOT)/link.lds
export CXXFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -Werror
export APPLFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_app.map,-cref,-u, -T $(BSP_ROOT)/link_userspace.lds
export DEFINES := -DHAVE_CCONFIG_H -DSTM32F407xx -DUSE_HAL_DRIVER -DHAVE_SIGINFO
export USING_NEWLIB =1
export USING_VFS = 1
export USING_SPI = 1
export ARCH = arm
export USING_LORA = 1

14
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export CROSS_COMPILE ?=/usr/bin/arm-none-eabi-
export CFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -fgnu89-inline -Wa,-mimplicit-it=thumb -Werror
export AFLAGS := -c -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -x assembler-with-cpp -Wa,-mimplicit-it=thumb -gdwarf-2
export LFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_stm32f407-st-discovery.map,-cref,-u,Reset_Handler -T $(BSP_ROOT)/link.lds
export CXXFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -Werror
export APPLFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_app.map,-cref,-u, -T $(BSP_ROOT)/link_userspace.lds
export DEFINES := -DHAVE_CCONFIG_H -DSTM32F407xx -DUSE_HAL_DRIVER -DHAVE_SIGINFO
export ARCH = arm
export USING_LORA = 1

14
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export CROSS_COMPILE ?=/usr/bin/arm-none-eabi-
export CFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -fgnu89-inline -Wa,-mimplicit-it=thumb -Werror
export AFLAGS := -c -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -x assembler-with-cpp -Wa,-mimplicit-it=thumb -gdwarf-2
export LFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_stm32f407-st-discovery.map,-cref,-u,Reset_Handler -T $(BSP_ROOT)/link.lds
export CXXFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -Werror
export APPLFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_app.map,-cref,-u, -T $(BSP_ROOT)/link_userspace.lds
export DEFINES := -DHAVE_CCONFIG_H -DSTM32F407xx -DUSE_HAL_DRIVER -DHAVE_SIGINFO
export ARCH = arm
export USING_LORA = 1

14
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export CROSS_COMPILE ?=/usr/bin/arm-none-eabi-
export CFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -fgnu89-inline -Wa,-mimplicit-it=thumb -Werror
export AFLAGS := -c -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -x assembler-with-cpp -Wa,-mimplicit-it=thumb -gdwarf-2
export LFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_stm32f407-st-discovery.map,-cref,-u,Reset_Handler -T $(BSP_ROOT)/link.lds
export CXXFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -Werror
export APPLFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_app.map,-cref,-u, -T $(BSP_ROOT)/link_userspace.lds
export DEFINES := -DHAVE_CCONFIG_H
export ARCH = arm
export USING_LORA = 1

14
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export CROSS_COMPILE ?=/usr/bin/arm-none-eabi-
export CFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -fgnu89-inline -Wa,-mimplicit-it=thumb -Werror
export AFLAGS := -c -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -x assembler-with-cpp -Wa,-mimplicit-it=thumb -gdwarf-2
export LFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_stm32f407-st-discovery.map,-cref,-u,Reset_Handler -T $(BSP_ROOT)/link.lds
export CXXFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -Werror
export APPLFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_app.map,-cref,-u, -T $(BSP_ROOT)/link_userspace.lds
export DEFINES := -DHAVE_CCONFIG_H
export ARCH = arm
export USING_LORA = 1

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/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_usart.h
* @brief define stm32f407-st-discovery-board usart function and struct
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021-04-25
*/
#ifndef CONNECT_USART_H
#define CONNECT_USART_H
#include <device.h>
#include "hardware_usart.h"
#include "hardware_dma.h"
#ifdef __cplusplus
extern "C" {
#endif
#define KERNEL_CONSOLE_BUS_NAME SERIAL_BUS_NAME_1
#define KERNEL_CONSOLE_DRV_NAME SERIAL_DRV_NAME_1
#define KERNEL_CONSOLE_DEVICE_NAME SERIAL_1_DEVICE_NAME_0
struct UsartHwCfg
{
USART_TypeDef *uart_device;
IRQn_Type irq;
};
struct Stm32Usart
{
struct Stm32UsartDma
{
DMA_Stream_TypeDef *RxStream;
uint32 RxCh;
uint32 RxFlag;
uint8 RxIrqCh;
x_size_t SettingRecvLen;
x_size_t LastRecvIndex;
} dma;
struct SerialBus serial_bus;
};
int Stm32HwUsartInit(void);
#ifdef __cplusplus
}
#endif
#endif

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/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_usart.h
* @brief define stm32f407-st-discovery-board usart function and struct
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021-04-25
*/
#ifndef CONNECT_USART_H
#define CONNECT_USART_H
#include <device.h>
#include "hardware_usart.h"
#include "hardware_dma.h"
#ifdef __cplusplus
extern "C" {
#endif
#define KERNEL_CONSOLE_BUS_NAME SERIAL_BUS_NAME_1
#define KERNEL_CONSOLE_DRV_NAME SERIAL_DRV_NAME_1
#define KERNEL_CONSOLE_DEVICE_NAME SERIAL_1_DEVICE_NAME_0
struct UsartHwCfg
{
USART_TypeDef *uart_device;
IRQn_Type irq;
};
struct Stm32Usart
{
struct Stm32UsartDma
{
DMA_Stream_TypeDef *RxStream;
uint32 RxCh;
uint32 RxFlag;
uint8 RxIrqCh;
x_size_t SettingRecvLen;
x_size_t LastRecvIndex;
} dma;
struct SerialBus serial_bus;
};
int InitHwUsart(void);
#ifdef __cplusplus
}
#endif
#endif

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/*
* Copyright (c) 2020 RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
*/
/**
* @file connect_usart.c
* @brief support stm32f407-st-discovery-board usart function and register to bus framework
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021-04-25
*/
/*************************************************
File name: connect_uart.c
Description: support stm32f407-st-discovery-board usart configure and uart bus register function
Others: take RT-Thread v4.0.2/bsp/stm32/libraries/HAL_Drivers/drv_usart.c for references
https://github.com/RT-Thread/rt-thread/tree/v4.0.2
History:
1. Date: 2021-04-25
Author: AIIT XUOS Lab
Modification:
1. support stm32f407-st-discovery-board usart configure, write and read
2. support stm32f407-st-discovery-board usart bus device and driver register
*************************************************/
#include "stm32f4xx.h"
#include "board.h"
#include "misc.h"
#include "connect_usart.h"
#include "hardware_gpio.h"
#include "hardware_rcc.h"
/* UART GPIO define. */
#define UART1_GPIO_TX GPIO_Pin_6
#define UART1_TX_PIN_SOURCE GPIO_PinSource6
#define UART1_GPIO_RX GPIO_Pin_7
#define UART1_RX_PIN_SOURCE GPIO_PinSource7
#define UART1_GPIO GPIOB
#define UART1_GPIO_RCC RCC_AHB1Periph_GPIOB
#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1
#define UART2_GPIO_TX GPIO_Pin_2
#define UART2_TX_PIN_SOURCE GPIO_PinSource2
#define UART2_GPIO_RX GPIO_Pin_3
#define UART2_RX_PIN_SOURCE GPIO_PinSource3
#define UART2_GPIO GPIOA
#define UART2_GPIO_RCC RCC_AHB1Periph_GPIOA
#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
#define UART3_GPIO_TX GPIO_Pin_8
#define UART3_TX_PIN_SOURCE GPIO_PinSource8
#define UART3_GPIO_RX GPIO_Pin_9
#define UART3_RX_PIN_SOURCE GPIO_PinSource9
#define UART3_GPIO GPIOD
#define UART3_GPIO_RCC RCC_AHB1Periph_GPIOD
#define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3
#define UART4_GPIO_TX GPIO_Pin_10
#define UART4_TX_PIN_SOURCE GPIO_PinSource10
#define UART4_GPIO_RX GPIO_Pin_11
#define UART4_RX_PIN_SOURCE GPIO_PinSource11
#define UART4_GPIO GPIOC
#define UART4_GPIO_RCC RCC_AHB1Periph_GPIOC
#define RCC_APBPeriph_UART4 RCC_APB1Periph_UART4
#define UART5_GPIO_TX GPIO_Pin_12
#define UART5_TX_PIN_SOURCE GPIO_PinSource12
#define UART5_GPIO_RX GPIO_Pin_2
#define UART5_RX_PIN_SOURCE GPIO_PinSource2
#define UART5_TX GPIOC
#define UART5_RX GPIOD
#define UART5_GPIO_RCC_TX RCC_AHB1Periph_GPIOC
#define UART5_GPIO_RCC_RX RCC_AHB1Periph_GPIOD
#define RCC_APBPeriph_UART5 RCC_APB1Periph_UART5
#define UART_ENABLE_IRQ(n) NVIC_EnableIRQ((n))
#define UART_DISABLE_IRQ(n) NVIC_DisableIRQ((n))
static void RCCConfiguration(void)
{
#ifdef BSP_USING_USART1
RCC_AHB1PeriphClockCmd(UART1_GPIO_RCC, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APBPeriph_UART1, ENABLE);
#endif
#ifdef BSP_USING_USART2
RCC_AHB1PeriphClockCmd(UART2_GPIO_RCC, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART2, ENABLE);
#endif
#ifdef BSP_USING_USART3
RCC_AHB1PeriphClockCmd(UART3_GPIO_RCC, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART3, ENABLE);
#endif
#ifdef BSP_USING_UART4
RCC_AHB1PeriphClockCmd(UART4_GPIO_RCC, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART4, ENABLE);
#endif
#ifdef BSP_USING_UART5
RCC_AHB1PeriphClockCmd(UART5_GPIO_RCC_TX | UART5_GPIO_RCC_RX, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART5, ENABLE);
#endif
}
static void GPIOConfiguration(void)
{
GPIO_InitTypeDef gpio_initstructure;
gpio_initstructure.GPIO_Mode = GPIO_Mode_AF;
gpio_initstructure.GPIO_OType = GPIO_OType_PP;
gpio_initstructure.GPIO_PuPd = GPIO_PuPd_UP;
gpio_initstructure.GPIO_Speed = GPIO_Speed_2MHz;
#ifdef BSP_USING_USART1
gpio_initstructure.GPIO_Pin = UART1_GPIO_RX | UART1_GPIO_TX;
GPIO_PinAFConfig(UART1_GPIO, UART1_TX_PIN_SOURCE, GPIO_AF_USART1);
GPIO_PinAFConfig(UART1_GPIO, UART1_RX_PIN_SOURCE, GPIO_AF_USART1);
GPIO_Init(UART1_GPIO, &gpio_initstructure);
#endif
#ifdef BSP_USING_USART2
gpio_initstructure.GPIO_Pin = UART2_GPIO_RX | UART2_GPIO_TX;
GPIO_PinAFConfig(UART2_GPIO, UART2_TX_PIN_SOURCE, GPIO_AF_USART2);
GPIO_PinAFConfig(UART2_GPIO, UART2_RX_PIN_SOURCE, GPIO_AF_USART2);
GPIO_Init(UART2_GPIO, &gpio_initstructure);
#endif
#ifdef BSP_USING_USART3
gpio_initstructure.GPIO_Pin = UART3_GPIO_TX | UART3_GPIO_RX;
GPIO_PinAFConfig(UART3_GPIO, UART3_TX_PIN_SOURCE, GPIO_AF_USART3);
GPIO_PinAFConfig(UART3_GPIO, UART3_RX_PIN_SOURCE, GPIO_AF_USART3);
GPIO_Init(UART3_GPIO, &gpio_initstructure);
#endif
#ifdef BSP_USING_UART4
gpio_initstructure.GPIO_Pin = UART4_GPIO_TX | UART4_GPIO_RX;
GPIO_PinAFConfig(UART4_GPIO, UART4_TX_PIN_SOURCE, GPIO_AF_UART4);
GPIO_PinAFConfig(UART4_GPIO, UART4_RX_PIN_SOURCE, GPIO_AF_UART4);
GPIO_Init(UART4_GPIO, &gpio_initstructure);
#endif
#ifdef BSP_USING_UART5
gpio_initstructure.GPIO_Pin = UART5_GPIO_TX;
GPIO_PinAFConfig(UART5_TX, UART5_TX_PIN_SOURCE, GPIO_AF_UART5);
GPIO_Init(UART5_TX, &gpio_initstructure);
gpio_initstructure.GPIO_Pin = UART5_GPIO_RX;
GPIO_PinAFConfig(UART5_RX, UART5_RX_PIN_SOURCE, GPIO_AF_UART5);
GPIO_Init(UART5_RX, &gpio_initstructure);
#endif
}
static void NVIC_Configuration(IRQn_Type irq)
{
NVIC_InitTypeDef NVIC_InitStructure;
NVIC_InitStructure.NVIC_IRQChannel = irq;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
static void DmaUartConfig(struct Stm32UsartDma *dma, USART_TypeDef *uart_device, uint32_t SettingRecvLen, void *mem_base_addr)
{
DMA_InitTypeDef DMA_InitStructure;
dma->SettingRecvLen = SettingRecvLen;
DMA_DeInit(dma->RxStream);
while (DMA_GetCmdStatus(dma->RxStream) != DISABLE);
DMA_InitStructure.DMA_Channel = dma->RxCh;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) &(uart_device->DR);
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)mem_base_addr;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_BufferSize = dma->SettingRecvLen;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(dma->RxStream, &DMA_InitStructure);
}
static void DMAConfiguration(struct SerialHardwareDevice *serial_dev, USART_TypeDef *uart_device)
{
struct Stm32Usart *serial = CONTAINER_OF(serial_dev->haldev.owner_bus, struct Stm32Usart, serial_bus);
struct Stm32UsartDma *dma = &serial->dma;
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_dev->private_data;
NVIC_InitTypeDef NVIC_InitStructure;
USART_ITConfig(uart_device, USART_IT_IDLE , ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);
DmaUartConfig(dma, uart_device, serial_cfg->data_cfg.serial_buffer_size, serial_dev->serial_fifo.serial_rx->serial_rx_buffer);
DMA_ClearFlag(dma->RxStream, dma->RxFlag);
DMA_ITConfig(dma->RxStream, DMA_IT_TC, ENABLE);
USART_DMACmd(uart_device, USART_DMAReq_Rx, ENABLE);
DMA_Cmd(dma->RxStream, ENABLE);
NVIC_InitStructure.NVIC_IRQChannel = dma->RxIrqCh;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
static void SerialCfgParamCheck(struct SerialCfgParam *serial_cfg_default, struct SerialCfgParam *serial_cfg_new)
{
struct SerialDataCfg *data_cfg_default = &serial_cfg_default->data_cfg;
struct SerialDataCfg *data_cfg_new = &serial_cfg_new->data_cfg;
if((data_cfg_default->serial_baud_rate != data_cfg_new->serial_baud_rate) && (data_cfg_new->serial_baud_rate)) {
data_cfg_default->serial_baud_rate = data_cfg_new->serial_baud_rate;
}
if((data_cfg_default->serial_bit_order != data_cfg_new->serial_bit_order) && (data_cfg_new->serial_bit_order)) {
data_cfg_default->serial_bit_order = data_cfg_new->serial_bit_order;
}
if((data_cfg_default->serial_buffer_size != data_cfg_new->serial_buffer_size) && (data_cfg_new->serial_buffer_size)) {
data_cfg_default->serial_buffer_size = data_cfg_new->serial_buffer_size;
}
if((data_cfg_default->serial_data_bits != data_cfg_new->serial_data_bits) && (data_cfg_new->serial_data_bits)) {
data_cfg_default->serial_data_bits = data_cfg_new->serial_data_bits;
}
if((data_cfg_default->serial_invert_mode != data_cfg_new->serial_invert_mode) && (data_cfg_new->serial_invert_mode)) {
data_cfg_default->serial_invert_mode = data_cfg_new->serial_invert_mode;
}
if((data_cfg_default->serial_parity_mode != data_cfg_new->serial_parity_mode) && (data_cfg_new->serial_parity_mode)) {
data_cfg_default->serial_parity_mode = data_cfg_new->serial_parity_mode;
}
if((data_cfg_default->serial_stop_bits != data_cfg_new->serial_stop_bits) && (data_cfg_new->serial_stop_bits)) {
data_cfg_default->serial_stop_bits = data_cfg_new->serial_stop_bits;
}
}
static uint32 Stm32SerialInit(struct SerialDriver *serial_drv, struct BusConfigureInfo *configure_info)
{
NULL_PARAM_CHECK(serial_drv);
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_drv->private_data;
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
if (configure_info->private_data) {
struct SerialCfgParam *serial_cfg_new = (struct SerialCfgParam *)configure_info->private_data;
SerialCfgParamCheck(serial_cfg, serial_cfg_new);
}
USART_InitTypeDef USART_InitStructure;
USART_InitStructure.USART_BaudRate = serial_cfg->data_cfg.serial_baud_rate;
if (serial_cfg->data_cfg.serial_data_bits == DATA_BITS_8) {
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
} else if (serial_cfg->data_cfg.serial_data_bits == DATA_BITS_9) {
USART_InitStructure.USART_WordLength = USART_WordLength_9b;
}
if (serial_cfg->data_cfg.serial_stop_bits == STOP_BITS_1){
USART_InitStructure.USART_StopBits = USART_StopBits_1;
} else if (serial_cfg->data_cfg.serial_stop_bits == STOP_BITS_2) {
USART_InitStructure.USART_StopBits = USART_StopBits_2;
}
if (serial_cfg->data_cfg.serial_parity_mode == PARITY_NONE) {
USART_InitStructure.USART_Parity = USART_Parity_No;
} else if (serial_cfg->data_cfg.serial_parity_mode == PARITY_ODD) {
USART_InitStructure.USART_Parity = USART_Parity_Odd;
} else if (serial_cfg->data_cfg.serial_parity_mode == PARITY_EVEN) {
USART_InitStructure.USART_Parity = USART_Parity_Even;
}
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_Init(serial_hw_cfg->uart_device, &USART_InitStructure);
USART_Cmd(serial_hw_cfg->uart_device, ENABLE);
return EOK;
}
static uint32 Stm32SerialConfigure(struct SerialDriver *serial_drv, int serial_operation_cmd)
{
NULL_PARAM_CHECK(serial_drv);
struct SerialHardwareDevice *serial_dev = (struct SerialHardwareDevice *)serial_drv->driver.owner_bus->owner_haldev;
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_drv->private_data;
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
struct SerialDevParam *serial_dev_param = (struct SerialDevParam *)serial_dev->haldev.private_data;
switch (serial_operation_cmd)
{
case OPER_CLR_INT:
UART_DISABLE_IRQ(serial_hw_cfg->irq);
USART_ITConfig(serial_hw_cfg->uart_device, USART_IT_RXNE, DISABLE);
break;
case OPER_SET_INT:
UART_ENABLE_IRQ(serial_hw_cfg->irq);
USART_ITConfig(serial_hw_cfg->uart_device, USART_IT_RXNE, ENABLE);
break;
case OPER_CONFIG :
if (SIGN_OPER_DMA_RX == serial_dev_param->serial_set_mode){
DMAConfiguration(serial_dev, serial_hw_cfg->uart_device);
}
}
return EOK;
}
static int Stm32SerialPutchar(struct SerialHardwareDevice *serial_dev, char c)
{
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_dev->private_data;
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
while (!(serial_hw_cfg->uart_device->SR & USART_FLAG_TXE));
serial_hw_cfg->uart_device->DR = c;
return EOK;
}
static int Stm32SerialGetchar(struct SerialHardwareDevice *serial_dev)
{
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_dev->private_data;
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
int ch = -1;
if (serial_hw_cfg->uart_device->SR & USART_FLAG_RXNE) {
ch = serial_hw_cfg->uart_device->DR & 0xff;
}
return ch;
}
static void DmaUartRxIdleIsr(struct SerialHardwareDevice *serial_dev, struct Stm32UsartDma *dma, USART_TypeDef *uart_device)
{
x_base level = CriticalAreaLock();
x_size_t recv_total_index = dma->SettingRecvLen - DMA_GetCurrDataCounter(dma->RxStream);
x_size_t recv_len = recv_total_index - dma->LastRecvIndex;
dma->LastRecvIndex = recv_total_index;
CriticalAreaUnLock(level);
if (recv_len) SerialSetIsr(serial_dev, SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
USART_ReceiveData(uart_device);
}
static void DmaRxDoneIsr(struct Stm32Usart *serial, struct SerialDriver *serial_drv, struct SerialHardwareDevice *serial_dev)
{
struct Stm32UsartDma *dma = &serial->dma;
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_drv->private_data;
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
if (DMA_GetFlagStatus(dma->RxStream, dma->RxFlag) != RESET) {
x_base level = CriticalAreaLock();
x_size_t recv_len = dma->SettingRecvLen - dma->LastRecvIndex;
dma->LastRecvIndex = 0;
CriticalAreaUnLock(level);
if (recv_len) SerialSetIsr(serial_dev, SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
DMA_ClearFlag(dma->RxStream, dma->RxFlag);
}
}
static void UartIsr(struct Stm32Usart *serial, struct SerialDriver *serial_drv, struct SerialHardwareDevice *serial_dev)
{
struct Stm32UsartDma *dma = &serial->dma;
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_drv->private_data;
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
if (USART_GetITStatus(serial_hw_cfg->uart_device, USART_IT_RXNE) != RESET) {
SerialSetIsr(serial_dev, SERIAL_EVENT_RX_IND);
USART_ClearITPendingBit(serial_hw_cfg->uart_device, USART_IT_RXNE);
}
if (USART_GetITStatus(serial_hw_cfg->uart_device, USART_IT_IDLE) != RESET) {
DmaUartRxIdleIsr(serial_dev, dma, serial_hw_cfg->uart_device);
}
if (USART_GetITStatus(serial_hw_cfg->uart_device, USART_IT_TC) != RESET) {
USART_ClearITPendingBit(serial_hw_cfg->uart_device, USART_IT_TC);
}
if (USART_GetFlagStatus(serial_hw_cfg->uart_device, USART_FLAG_ORE) == SET) {
USART_ReceiveData(serial_hw_cfg->uart_device);
}
}
#ifdef BSP_USING_USART1
struct Stm32Usart serial_1;
struct SerialDriver serial_driver_1;
struct SerialHardwareDevice serial_device_1;
static const struct Stm32UsartDma usart_dma_1 =
{
DMA2_Stream5,
DMA_Channel_4,
DMA_FLAG_TCIF5,
DMA2_Stream5_IRQn,
0,
0,
};
void USART1_IRQHandler(int irq_num, void *arg)
{
UartIsr(&serial_1, &serial_driver_1, &serial_device_1);
}
DECLARE_HW_IRQ(USART1_IRQn, USART1_IRQHandler, NONE);
void DMA2_Stream5_IRQHandler(int irq_num, void *arg) {
DmaRxDoneIsr(&serial_1, &serial_driver_1, &serial_device_1);
}
DECLARE_HW_IRQ(DMA2_Stream5_IRQn, DMA2_Stream5_IRQHandler, NONE);
#endif
#ifdef BSP_USING_USART2
struct Stm32Usart serial_2;
struct SerialDriver serial_driver_2;
struct SerialHardwareDevice serial_device_2;
static const struct Stm32UsartDma usart_dma_2 =
{
DMA1_Stream5,
DMA_Channel_4,
DMA_FLAG_TCIF5,
DMA1_Stream5_IRQn,
0,
0,
};
void USART2_IRQHandler(int irq_num, void *arg)
{
UartIsr(&serial_2, &serial_driver_2, &serial_device_2);
}
DECLARE_HW_IRQ(USART2_IRQn, USART2_IRQHandler, NONE);
void DMA1_Stream5_IRQHandler(int irq_num, void *arg) {
DmaRxDoneIsr(&serial_2, &serial_driver_2, &serial_device_2);
}
DECLARE_HW_IRQ(DMA1_Stream5_IRQn, DMA1_Stream5_IRQHandler, NONE);
#endif
#ifdef BSP_USING_USART3
struct Stm32Usart serial_3;
struct SerialDriver serial_driver_3;
struct SerialHardwareDevice serial_device_3;
static const struct Stm32UsartDma usart_dma_3 =
{
DMA1_Stream1,
DMA_Channel_4,
DMA_FLAG_TCIF1,
DMA1_Stream1_IRQn,
0,
0,
};
void USART3_IRQHandler(int irq_num, void *arg)
{
UartIsr(&serial_3, &serial_driver_3, &serial_device_3);
}
DECLARE_HW_IRQ(USART3_IRQn, USART3_IRQHandler, NONE);
void DMA1_Stream1_IRQHandler(int irq_num, void *arg) {
DmaRxDoneIsr(&serial_3, &serial_driver_3, &serial_device_3);
}
DECLARE_HW_IRQ(DMA1_Stream1_IRQn, DMA1_Stream1_IRQHandler, NONE);
#endif
#ifdef BSP_USING_UART4
struct Stm32Usart serial_4;
struct SerialDriver serial_driver_4;
struct SerialHardwareDevice serial_device_4;
static const struct Stm32UsartDma uart_dma_4 =
{
DMA1_Stream2,
DMA_Channel_4,
DMA_FLAG_TCIF2,
DMA1_Stream2_IRQn,
0,
0,
};
void UART4_IRQHandler(int irq_num, void *arg)
{
UartIsr(&serial_4, &serial_driver_4, &serial_device_4);
}
DECLARE_HW_IRQ(UART4_IRQn, UART4_IRQHandler, NONE);
void DMA1_Stream2_IRQHandler(int irq_num, void *arg) {
DmaRxDoneIsr(&serial_4, &serial_driver_4, &serial_device_4);
}
DECLARE_HW_IRQ(DMA1_Stream2_IRQn, DMA1_Stream2_IRQHandler, NONE);
#endif
#ifdef BSP_USING_UART5
struct Stm32Usart serial_5;
struct SerialDriver serial_driver_5;
struct SerialHardwareDevice serial_device_5;
static const struct Stm32UsartDma uart_dma_5 =
{
DMA1_Stream0,
DMA_Channel_4,
DMA_FLAG_TCIF0,
DMA1_Stream0_IRQn,
0,
0,
};
void UART5_IRQHandler(int irq_num, void *arg)
{
UartIsr(&serial_5, &serial_driver_5, &serial_device_5);
}
DECLARE_HW_IRQ(UART5_IRQn, UART5_IRQHandler, NONE);
void DMA1_Stream0_IRQHandler(int irq_num, void *arg) {
DmaRxDoneIsr(&serial_5, &serial_driver_5, &serial_device_5);
}
DECLARE_HW_IRQ(DMA1_Stream0_IRQn, DMA1_Stream0_IRQHandler, NONE);
#endif
static uint32 Stm32SerialDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
{
NULL_PARAM_CHECK(drv);
NULL_PARAM_CHECK(configure_info);
x_err_t ret = EOK;
int serial_operation_cmd;
struct SerialDriver *serial_drv = (struct SerialDriver *)drv;
switch (configure_info->configure_cmd)
{
case OPE_INT:
ret = Stm32SerialInit(serial_drv, configure_info);
break;
case OPE_CFG:
serial_operation_cmd = *(int *)configure_info->private_data;
ret = Stm32SerialConfigure(serial_drv, serial_operation_cmd);
break;
default:
break;
}
return ret;
}
static const struct SerialDataCfg data_cfg_init =
{
.serial_baud_rate = BAUD_RATE_115200,
.serial_data_bits = DATA_BITS_8,
.serial_stop_bits = STOP_BITS_1,
.serial_parity_mode = PARITY_NONE,
.serial_bit_order = BIT_ORDER_LSB,
.serial_invert_mode = NRZ_NORMAL,
.serial_buffer_size = SERIAL_RB_BUFSZ,
};
/*manage the serial device operations*/
static const struct SerialDrvDone drv_done =
{
.init = Stm32SerialInit,
.configure = Stm32SerialConfigure,
};
/*manage the serial device hal operations*/
static struct SerialHwDevDone hwdev_done =
{
.put_char = Stm32SerialPutchar,
.get_char = Stm32SerialGetchar,
};
static int BoardSerialBusInit(struct SerialBus *serial_bus, struct SerialDriver *serial_driver, const char *bus_name, const char *drv_name)
{
x_err_t ret = EOK;
/*Init the serial bus */
ret = SerialBusInit(serial_bus, bus_name);
if (EOK != ret) {
KPrintf("hw_serial_init SerialBusInit error %d\n", ret);
return ERROR;
}
/*Init the serial driver*/
ret = SerialDriverInit(serial_driver, drv_name);
if (EOK != ret) {
KPrintf("hw_serial_init SerialDriverInit error %d\n", ret);
return ERROR;
}
/*Attach the serial driver to the serial bus*/
ret = SerialDriverAttachToBus(drv_name, bus_name);
if (EOK != ret) {
KPrintf("hw_serial_init SerialDriverAttachToBus error %d\n", ret);
return ERROR;
}
return ret;
}
/*Attach the serial device to the serial bus*/
static int BoardSerialDevBend(struct SerialHardwareDevice *serial_device, void *serial_param, const char *bus_name, const char *dev_name)
{
x_err_t ret = EOK;
ret = SerialDeviceRegister(serial_device, serial_param, dev_name);
if (EOK != ret) {
KPrintf("hw_serial_init SerialDeviceInit device %s error %d\n", dev_name, ret);
return ERROR;
}
ret = SerialDeviceAttachToBus(dev_name, bus_name);
if (EOK != ret) {
KPrintf("hw_serial_init SerialDeviceAttachToBus device %s error %d\n", dev_name, ret);
return ERROR;
}
return ret;
}
int InitHwUsart(void)
{
x_err_t ret = EOK;
RCCConfiguration();
GPIOConfiguration();
#ifdef BSP_USING_USART1
static struct SerialCfgParam serial_cfg_1;
memset(&serial_cfg_1, 0, sizeof(struct SerialCfgParam));
static struct UsartHwCfg serial_hw_cfg_1;
memset(&serial_hw_cfg_1, 0, sizeof(struct UsartHwCfg));
static struct SerialDevParam serial_dev_param_1;
memset(&serial_dev_param_1, 0, sizeof(struct SerialDevParam));
serial_1.dma = usart_dma_1;
serial_driver_1.drv_done = &drv_done;
serial_driver_1.configure = &Stm32SerialDrvConfigure;
serial_device_1.hwdev_done = &hwdev_done;
serial_cfg_1.data_cfg = data_cfg_init;
serial_hw_cfg_1.uart_device = USART1;
serial_hw_cfg_1.irq = USART1_IRQn;
serial_cfg_1.hw_cfg.private_data = (void *)&serial_hw_cfg_1;
serial_driver_1.private_data = (void *)&serial_cfg_1;
serial_dev_param_1.serial_work_mode = SIGN_OPER_INT_RX;
serial_device_1.haldev.private_data = (void *)&serial_dev_param_1;
NVIC_Configuration(serial_hw_cfg_1.irq);
ret = BoardSerialBusInit(&serial_1.serial_bus, &serial_driver_1, SERIAL_BUS_NAME_1, SERIAL_DRV_NAME_1);
if (EOK != ret) {
KPrintf("InitHwUsart usart1 error ret %u\n", ret);
return ERROR;
}
ret = BoardSerialDevBend(&serial_device_1, (void *)&serial_cfg_1, SERIAL_BUS_NAME_1, SERIAL_1_DEVICE_NAME_0);
if (EOK != ret) {
KPrintf("InitHwUsart usart1 error ret %u\n", ret);
return ERROR;
}
#endif
#ifdef BSP_USING_USART2
static struct SerialCfgParam serial_cfg_2;
memset(&serial_cfg_2, 0, sizeof(struct SerialCfgParam));
static struct UsartHwCfg serial_hw_cfg_2;
memset(&serial_hw_cfg_2, 0, sizeof(struct UsartHwCfg));
static struct SerialDevParam serial_dev_param_2;
memset(&serial_dev_param_2, 0, sizeof(struct SerialDevParam));
serial_2.dma = usart_dma_2;
serial_driver_2.drv_done = &drv_done;
serial_driver_2.configure = &Stm32SerialDrvConfigure;
serial_device_2.hwdev_done = &hwdev_done;
serial_cfg_2.data_cfg = data_cfg_init;
serial_hw_cfg_2.uart_device = USART2;
serial_hw_cfg_2.irq = USART2_IRQn;
serial_cfg_2.hw_cfg.private_data = (void *)&serial_hw_cfg_2;
serial_driver_2.private_data = (void *)&serial_cfg_2;
serial_dev_param_2.serial_work_mode = SIGN_OPER_INT_RX;
serial_device_2.haldev.private_data = (void *)&serial_dev_param_2;
NVIC_Configuration(serial_hw_cfg_2.irq);
ret = BoardSerialBusInit(&serial_2.serial_bus, &serial_driver_2, SERIAL_BUS_NAME_2, SERIAL_DRV_NAME_2);
if (EOK != ret) {
KPrintf("InitHwUsart usart2 error ret %u\n", ret);
return ERROR;
}
ret = BoardSerialDevBend(&serial_device_2, (void *)&serial_cfg_2, SERIAL_BUS_NAME_2, SERIAL_2_DEVICE_NAME_0);
if (EOK != ret) {
KPrintf("InitHwUsart usart2 error ret %u\n", ret);
return ERROR;
}
#endif
#ifdef BSP_USING_USART3
static struct SerialCfgParam serial_cfg_3;
memset(&serial_cfg_3, 0, sizeof(struct SerialCfgParam));
static struct UsartHwCfg serial_hw_cfg_3;
memset(&serial_hw_cfg_3, 0, sizeof(struct UsartHwCfg));
static struct SerialDevParam serial_dev_param_3;
memset(&serial_dev_param_3, 0, sizeof(struct SerialDevParam));
serial_3.dma = usart_dma_3;
serial_driver_3.drv_done = &drv_done;
serial_driver_3.configure = &Stm32SerialDrvConfigure;
serial_device_3.hwdev_done = &hwdev_done;
serial_cfg_3.data_cfg = data_cfg_init;
serial_hw_cfg_3.uart_device = USART3;
serial_hw_cfg_3.irq = USART3_IRQn;
serial_cfg_3.hw_cfg.private_data = (void *)&serial_hw_cfg_3;
serial_driver_3.private_data = (void *)&serial_cfg_3;
serial_dev_param_3.serial_work_mode = SIGN_OPER_INT_RX;
serial_device_3.haldev.private_data = (void *)&serial_dev_param_3;
NVIC_Configuration(serial_hw_cfg_3.irq);
ret = BoardSerialBusInit(&serial_3.serial_bus, &serial_driver_3, SERIAL_BUS_NAME_3, SERIAL_DRV_NAME_3);
if (EOK != ret) {
KPrintf("InitHwUsart usart3 error ret %u\n", ret);
return ERROR;
}
ret = BoardSerialDevBend(&serial_device_3, (void *)&serial_cfg_3, SERIAL_BUS_NAME_3, SERIAL_3_DEVICE_NAME_0);
if (EOK != ret) {
KPrintf("InitHwUsart usart3 error ret %u\n", ret);
return ERROR;
}
#endif
#ifdef BSP_USING_UART4
static struct SerialCfgParam serial_cfg_4;
memset(&serial_cfg_4, 0, sizeof(struct SerialCfgParam));
static struct UsartHwCfg serial_hw_cfg_4;
memset(&serial_hw_cfg_4, 0, sizeof(struct UsartHwCfg));
static struct SerialDevParam serial_dev_param_4;
memset(&serial_dev_param_4, 0, sizeof(struct SerialDevParam));
serial_4.dma = uart_dma_4;
serial_driver_4.drv_done = &drv_done;
serial_driver_4.configure = &Stm32SerialDrvConfigure;
serial_device_4.hwdev_done = &hwdev_done;
serial_cfg_4.data_cfg = data_cfg_init;
serial_hw_cfg_4.uart_device = UART4;
serial_hw_cfg_4.irq = UART4_IRQn;
serial_cfg_4.hw_cfg.private_data = (void *)&serial_hw_cfg_4;
serial_driver_4.private_data = (void *)&serial_cfg_4;
serial_dev_param_4.serial_work_mode = SIGN_OPER_INT_RX;
serial_device_4.haldev.private_data = (void *)&serial_dev_param_4;
NVIC_Configuration(serial_hw_cfg_4.irq);
ret = BoardSerialBusInit(&serial_4.serial_bus, &serial_driver_4, SERIAL_BUS_NAME_4, SERIAL_DRV_NAME_4);
if (EOK != ret) {
KPrintf("InitHwUsart usart4 error ret %u\n", ret);
return ERROR;
}
ret = BoardSerialDevBend(&serial_device_4, (void *)&serial_cfg_4, SERIAL_BUS_NAME_4, SERIAL_4_DEVICE_NAME_0);
if (EOK != ret) {
KPrintf("InitHwUsart usart4 error ret %u\n", ret);
return ERROR;
}
#endif
#ifdef BSP_USING_UART5
static struct SerialCfgParam serial_cfg_5;
memset(&serial_cfg_5, 0, sizeof(struct SerialCfgParam));
static struct UsartHwCfg serial_hw_cfg_5;
memset(&serial_hw_cfg_5, 0, sizeof(struct UsartHwCfg));
static struct SerialDevParam serial_dev_param_5;
memset(&serial_dev_param_5, 0, sizeof(struct SerialDevParam));
serial_5.dma = uart_dma_5;
serial_driver_5.drv_done = &drv_done;
serial_driver_5.configure = &Stm32SerialDrvConfigure;
serial_device_5.hwdev_done = &hwdev_done;
serial_cfg_5.data_cfg = data_cfg_init;
serial_hw_cfg_5.uart_device = UART5;
serial_hw_cfg_5.irq = UART5_IRQn;
serial_cfg_5.hw_cfg.private_data = (void *)&serial_hw_cfg_5;
serial_driver_5.private_data = (void *)&serial_cfg_5;
serial_dev_param_5.serial_work_mode = SIGN_OPER_INT_RX;
serial_device_5.haldev.private_data = (void *)&serial_dev_param_5;
NVIC_Configuration(serial_hw_cfg_5.irq);
ret = BoardSerialBusInit(&serial_5.serial_bus, &serial_driver_5, SERIAL_BUS_NAME_5, SERIAL_DRV_NAME_5);
if (EOK != ret) {
KPrintf("InitHwUsart usart5 error ret %u\n", ret);
return ERROR;
}
ret = BoardSerialDevBend(&serial_device_5, (void *)&serial_cfg_5, SERIAL_BUS_NAME_5, SERIAL_5_DEVICE_NAME_0);
if (EOK != ret) {
KPrintf("InitHwUsart usart5 error ret %u\n", ret);
return ERROR;
}
#endif
return ret;
}

858
Ubiquitous/XiUOS/board/cortex-m4-emulator/.history/third_party_driver/uart/connect_usart_20210825135244.c Normal file
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/*
* Copyright (c) 2020 RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
*/
/**
* @file connect_usart.c
* @brief support stm32f407-st-discovery-board usart function and register to bus framework
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021-04-25
*/
/*************************************************
File name: connect_uart.c
Description: support stm32f407-st-discovery-board usart configure and uart bus register function
Others: take RT-Thread v4.0.2/bsp/stm32/libraries/HAL_Drivers/drv_usart.c for references
https://github.com/RT-Thread/rt-thread/tree/v4.0.2
History:
1. Date: 2021-04-25
Author: AIIT XUOS Lab
Modification:
1. support stm32f407-st-discovery-board usart configure, write and read
2. support stm32f407-st-discovery-board usart bus device and driver register
*************************************************/
#include "stm32f4xx.h"
#include "board.h"
#include "misc.h"
#include "connect_usart.h"
#include "hardware_gpio.h"
#include "hardware_rcc.h"
/* UART GPIO define. */
#define UART1_GPIO_TX GPIO_Pin_6
#define UART1_TX_PIN_SOURCE GPIO_PinSource6
#define UART1_GPIO_RX GPIO_Pin_7
#define UART1_RX_PIN_SOURCE GPIO_PinSource7
#define UART1_GPIO GPIOB
#define UART1_GPIO_RCC RCC_AHB1Periph_GPIOB
#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1
#define UART2_GPIO_TX GPIO_Pin_2
#define UART2_TX_PIN_SOURCE GPIO_PinSource2
#define UART2_GPIO_RX GPIO_Pin_3
#define UART2_RX_PIN_SOURCE GPIO_PinSource3
#define UART2_GPIO GPIOA
#define UART2_GPIO_RCC RCC_AHB1Periph_GPIOA
#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
#define UART3_GPIO_TX GPIO_Pin_8
#define UART3_TX_PIN_SOURCE GPIO_PinSource8
#define UART3_GPIO_RX GPIO_Pin_9
#define UART3_RX_PIN_SOURCE GPIO_PinSource9
#define UART3_GPIO GPIOD
#define UART3_GPIO_RCC RCC_AHB1Periph_GPIOD
#define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3
#define UART4_GPIO_TX GPIO_Pin_10
#define UART4_TX_PIN_SOURCE GPIO_PinSource10
#define UART4_GPIO_RX GPIO_Pin_11
#define UART4_RX_PIN_SOURCE GPIO_PinSource11
#define UART4_GPIO GPIOC
#define UART4_GPIO_RCC RCC_AHB1Periph_GPIOC
#define RCC_APBPeriph_UART4 RCC_APB1Periph_UART4
#define UART5_GPIO_TX GPIO_Pin_12
#define UART5_TX_PIN_SOURCE GPIO_PinSource12
#define UART5_GPIO_RX GPIO_Pin_2
#define UART5_RX_PIN_SOURCE GPIO_PinSource2
#define UART5_TX GPIOC
#define UART5_RX GPIOD
#define UART5_GPIO_RCC_TX RCC_AHB1Periph_GPIOC
#define UART5_GPIO_RCC_RX RCC_AHB1Periph_GPIOD
#define RCC_APBPeriph_UART5 RCC_APB1Periph_UART5
#define UART_ENABLE_IRQ(n) NVIC_EnableIRQ((n))
#define UART_DISABLE_IRQ(n) NVIC_DisableIRQ((n))
static void RCCConfiguration(void)
{
#ifdef BSP_USING_USART1
RCC_AHB1PeriphClockCmd(UART1_GPIO_RCC, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APBPeriph_UART1, ENABLE);
#endif
#ifdef BSP_USING_USART2
RCC_AHB1PeriphClockCmd(UART2_GPIO_RCC, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART2, ENABLE);
#endif
#ifdef BSP_USING_USART3
RCC_AHB1PeriphClockCmd(UART3_GPIO_RCC, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART3, ENABLE);
#endif
#ifdef BSP_USING_UART4
RCC_AHB1PeriphClockCmd(UART4_GPIO_RCC, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART4, ENABLE);
#endif
#ifdef BSP_USING_UART5
RCC_AHB1PeriphClockCmd(UART5_GPIO_RCC_TX | UART5_GPIO_RCC_RX, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART5, ENABLE);
#endif
}
static void GPIOConfiguration(void)
{
GPIO_InitTypeDef gpio_initstructure;
gpio_initstructure.GPIO_Mode = GPIO_Mode_AF;
gpio_initstructure.GPIO_OType = GPIO_OType_PP;
gpio_initstructure.GPIO_PuPd = GPIO_PuPd_UP;
gpio_initstructure.GPIO_Speed = GPIO_Speed_2MHz;
#ifdef BSP_USING_USART1
gpio_initstructure.GPIO_Pin = UART1_GPIO_RX | UART1_GPIO_TX;
GPIO_PinAFConfig(UART1_GPIO, UART1_TX_PIN_SOURCE, GPIO_AF_USART1);
GPIO_PinAFConfig(UART1_GPIO, UART1_RX_PIN_SOURCE, GPIO_AF_USART1);
GPIO_Init(UART1_GPIO, &gpio_initstructure);
#endif
#ifdef BSP_USING_USART2
gpio_initstructure.GPIO_Pin = UART2_GPIO_RX | UART2_GPIO_TX;
GPIO_PinAFConfig(UART2_GPIO, UART2_TX_PIN_SOURCE, GPIO_AF_USART2);
GPIO_PinAFConfig(UART2_GPIO, UART2_RX_PIN_SOURCE, GPIO_AF_USART2);
GPIO_Init(UART2_GPIO, &gpio_initstructure);
#endif
#ifdef BSP_USING_USART3
gpio_initstructure.GPIO_Pin = UART3_GPIO_TX | UART3_GPIO_RX;
GPIO_PinAFConfig(UART3_GPIO, UART3_TX_PIN_SOURCE, GPIO_AF_USART3);
GPIO_PinAFConfig(UART3_GPIO, UART3_RX_PIN_SOURCE, GPIO_AF_USART3);
GPIO_Init(UART3_GPIO, &gpio_initstructure);
#endif
#ifdef BSP_USING_UART4
gpio_initstructure.GPIO_Pin = UART4_GPIO_TX | UART4_GPIO_RX;
GPIO_PinAFConfig(UART4_GPIO, UART4_TX_PIN_SOURCE, GPIO_AF_UART4);
GPIO_PinAFConfig(UART4_GPIO, UART4_RX_PIN_SOURCE, GPIO_AF_UART4);
GPIO_Init(UART4_GPIO, &gpio_initstructure);
#endif
#ifdef BSP_USING_UART5
gpio_initstructure.GPIO_Pin = UART5_GPIO_TX;
GPIO_PinAFConfig(UART5_TX, UART5_TX_PIN_SOURCE, GPIO_AF_UART5);
GPIO_Init(UART5_TX, &gpio_initstructure);
gpio_initstructure.GPIO_Pin = UART5_GPIO_RX;
GPIO_PinAFConfig(UART5_RX, UART5_RX_PIN_SOURCE, GPIO_AF_UART5);
GPIO_Init(UART5_RX, &gpio_initstructure);
#endif
}
static void NVIC_Configuration(IRQn_Type irq)
{
NVIC_InitTypeDef NVIC_InitStructure;
NVIC_InitStructure.NVIC_IRQChannel = irq;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
static void DmaUartConfig(struct Stm32UsartDma *dma, USART_TypeDef *uart_device, uint32_t SettingRecvLen, void *mem_base_addr)
{
DMA_InitTypeDef DMA_InitStructure;
dma->SettingRecvLen = SettingRecvLen;
DMA_DeInit(dma->RxStream);
while (DMA_GetCmdStatus(dma->RxStream) != DISABLE);
DMA_InitStructure.DMA_Channel = dma->RxCh;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) &(uart_device->DR);
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)mem_base_addr;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_BufferSize = dma->SettingRecvLen;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(dma->RxStream, &DMA_InitStructure);
}
static void DMAConfiguration(struct SerialHardwareDevice *serial_dev, USART_TypeDef *uart_device)
{
struct Stm32Usart *serial = CONTAINER_OF(serial_dev->haldev.owner_bus, struct Stm32Usart, serial_bus);
struct Stm32UsartDma *dma = &serial->dma;
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_dev->private_data;
NVIC_InitTypeDef NVIC_InitStructure;
USART_ITConfig(uart_device, USART_IT_IDLE , ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);
DmaUartConfig(dma, uart_device, serial_cfg->data_cfg.serial_buffer_size, serial_dev->serial_fifo.serial_rx->serial_rx_buffer);
DMA_ClearFlag(dma->RxStream, dma->RxFlag);
DMA_ITConfig(dma->RxStream, DMA_IT_TC, ENABLE);
USART_DMACmd(uart_device, USART_DMAReq_Rx, ENABLE);
DMA_Cmd(dma->RxStream, ENABLE);
NVIC_InitStructure.NVIC_IRQChannel = dma->RxIrqCh;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
static void SerialCfgParamCheck(struct SerialCfgParam *serial_cfg_default, struct SerialCfgParam *serial_cfg_new)
{
struct SerialDataCfg *data_cfg_default = &serial_cfg_default->data_cfg;
struct SerialDataCfg *data_cfg_new = &serial_cfg_new->data_cfg;
if((data_cfg_default->serial_baud_rate != data_cfg_new->serial_baud_rate) && (data_cfg_new->serial_baud_rate)) {
data_cfg_default->serial_baud_rate = data_cfg_new->serial_baud_rate;
}
if((data_cfg_default->serial_bit_order != data_cfg_new->serial_bit_order) && (data_cfg_new->serial_bit_order)) {
data_cfg_default->serial_bit_order = data_cfg_new->serial_bit_order;
}
if((data_cfg_default->serial_buffer_size != data_cfg_new->serial_buffer_size) && (data_cfg_new->serial_buffer_size)) {
data_cfg_default->serial_buffer_size = data_cfg_new->serial_buffer_size;
}
if((data_cfg_default->serial_data_bits != data_cfg_new->serial_data_bits) && (data_cfg_new->serial_data_bits)) {
data_cfg_default->serial_data_bits = data_cfg_new->serial_data_bits;
}
if((data_cfg_default->serial_invert_mode != data_cfg_new->serial_invert_mode) && (data_cfg_new->serial_invert_mode)) {
data_cfg_default->serial_invert_mode = data_cfg_new->serial_invert_mode;
}
if((data_cfg_default->serial_parity_mode != data_cfg_new->serial_parity_mode) && (data_cfg_new->serial_parity_mode)) {
data_cfg_default->serial_parity_mode = data_cfg_new->serial_parity_mode;
}
if((data_cfg_default->serial_stop_bits != data_cfg_new->serial_stop_bits) && (data_cfg_new->serial_stop_bits)) {
data_cfg_default->serial_stop_bits = data_cfg_new->serial_stop_bits;
}
}
static uint32 Stm32SerialInit(struct SerialDriver *serial_drv, struct BusConfigureInfo *configure_info)
{
NULL_PARAM_CHECK(serial_drv);
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_drv->private_data;
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
if (configure_info->private_data) {
struct SerialCfgParam *serial_cfg_new = (struct SerialCfgParam *)configure_info->private_data;
SerialCfgParamCheck(serial_cfg, serial_cfg_new);
}
USART_InitTypeDef USART_InitStructure;
USART_InitStructure.USART_BaudRate = serial_cfg->data_cfg.serial_baud_rate;
if (serial_cfg->data_cfg.serial_data_bits == DATA_BITS_8) {
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
} else if (serial_cfg->data_cfg.serial_data_bits == DATA_BITS_9) {
USART_InitStructure.USART_WordLength = USART_WordLength_9b;
}
if (serial_cfg->data_cfg.serial_stop_bits == STOP_BITS_1){
USART_InitStructure.USART_StopBits = USART_StopBits_1;
} else if (serial_cfg->data_cfg.serial_stop_bits == STOP_BITS_2) {
USART_InitStructure.USART_StopBits = USART_StopBits_2;
}
if (serial_cfg->data_cfg.serial_parity_mode == PARITY_NONE) {
USART_InitStructure.USART_Parity = USART_Parity_No;
} else if (serial_cfg->data_cfg.serial_parity_mode == PARITY_ODD) {
USART_InitStructure.USART_Parity = USART_Parity_Odd;
} else if (serial_cfg->data_cfg.serial_parity_mode == PARITY_EVEN) {
USART_InitStructure.USART_Parity = USART_Parity_Even;
}
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_Init(serial_hw_cfg->uart_device, &USART_InitStructure);
USART_Cmd(serial_hw_cfg->uart_device, ENABLE);
return EOK;
}
static uint32 Stm32SerialConfigure(struct SerialDriver *serial_drv, int serial_operation_cmd)
{
NULL_PARAM_CHECK(serial_drv);
struct SerialHardwareDevice *serial_dev = (struct SerialHardwareDevice *)serial_drv->driver.owner_bus->owner_haldev;
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_drv->private_data;
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
struct SerialDevParam *serial_dev_param = (struct SerialDevParam *)serial_dev->haldev.private_data;
switch (serial_operation_cmd)
{
case OPER_CLR_INT:
UART_DISABLE_IRQ(serial_hw_cfg->irq);
USART_ITConfig(serial_hw_cfg->uart_device, USART_IT_RXNE, DISABLE);
break;
case OPER_SET_INT:
UART_ENABLE_IRQ(serial_hw_cfg->irq);
USART_ITConfig(serial_hw_cfg->uart_device, USART_IT_RXNE, ENABLE);
break;
case OPER_CONFIG :
if (SIGN_OPER_DMA_RX == serial_dev_param->serial_set_mode){
DMAConfiguration(serial_dev, serial_hw_cfg->uart_device);
}
}
return EOK;
}
static int Stm32SerialPutchar(struct SerialHardwareDevice *serial_dev, char c)
{
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_dev->private_data;
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
while (!(serial_hw_cfg->uart_device->SR & USART_FLAG_TXE));
serial_hw_cfg->uart_device->DR = c;
return EOK;
}
static int Stm32SerialGetchar(struct SerialHardwareDevice *serial_dev)
{
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_dev->private_data;
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
int ch = -1;
if (serial_hw_cfg->uart_device->SR & USART_FLAG_RXNE) {
ch = serial_hw_cfg->uart_device->DR & 0xff;
}
return ch;
}
static void DmaUartRxIdleIsr(struct SerialHardwareDevice *serial_dev, struct Stm32UsartDma *dma, USART_TypeDef *uart_device)
{
x_base level = CriticalAreaLock();
x_size_t recv_total_index = dma->SettingRecvLen - DMA_GetCurrDataCounter(dma->RxStream);
x_size_t recv_len = recv_total_index - dma->LastRecvIndex;
dma->LastRecvIndex = recv_total_index;
CriticalAreaUnLock(level);
if (recv_len) SerialSetIsr(serial_dev, SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
USART_ReceiveData(uart_device);
}
static void DmaRxDoneIsr(struct Stm32Usart *serial, struct SerialDriver *serial_drv, struct SerialHardwareDevice *serial_dev)
{
struct Stm32UsartDma *dma = &serial->dma;
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_drv->private_data;
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
if (DMA_GetFlagStatus(dma->RxStream, dma->RxFlag) != RESET) {
x_base level = CriticalAreaLock();
x_size_t recv_len = dma->SettingRecvLen - dma->LastRecvIndex;
dma->LastRecvIndex = 0;
CriticalAreaUnLock(level);
if (recv_len) SerialSetIsr(serial_dev, SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
DMA_ClearFlag(dma->RxStream, dma->RxFlag);
}
}
static void UartIsr(struct Stm32Usart *serial, struct SerialDriver *serial_drv, struct SerialHardwareDevice *serial_dev)
{
struct Stm32UsartDma *dma = &serial->dma;
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_drv->private_data;
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
if (USART_GetITStatus(serial_hw_cfg->uart_device, USART_IT_RXNE) != RESET) {
SerialSetIsr(serial_dev, SERIAL_EVENT_RX_IND);
USART_ClearITPendingBit(serial_hw_cfg->uart_device, USART_IT_RXNE);
}
if (USART_GetITStatus(serial_hw_cfg->uart_device, USART_IT_IDLE) != RESET) {
DmaUartRxIdleIsr(serial_dev, dma, serial_hw_cfg->uart_device);
}
if (USART_GetITStatus(serial_hw_cfg->uart_device, USART_IT_TC) != RESET) {
USART_ClearITPendingBit(serial_hw_cfg->uart_device, USART_IT_TC);
}
if (USART_GetFlagStatus(serial_hw_cfg->uart_device, USART_FLAG_ORE) == SET) {
USART_ReceiveData(serial_hw_cfg->uart_device);
}
}
#ifdef BSP_USING_USART1
struct Stm32Usart serial_1;
struct SerialDriver serial_driver_1;
struct SerialHardwareDevice serial_device_1;
static const struct Stm32UsartDma usart_dma_1 =
{
DMA2_Stream5,
DMA_Channel_4,
DMA_FLAG_TCIF5,
DMA2_Stream5_IRQn,
0,
0,
};
void USART1_IRQHandler(int irq_num, void *arg)
{
UartIsr(&serial_1, &serial_driver_1, &serial_device_1);
}
DECLARE_HW_IRQ(USART1_IRQn, USART1_IRQHandler, NONE);
void DMA2_Stream5_IRQHandler(int irq_num, void *arg) {
DmaRxDoneIsr(&serial_1, &serial_driver_1, &serial_device_1);
}
DECLARE_HW_IRQ(DMA2_Stream5_IRQn, DMA2_Stream5_IRQHandler, NONE);
#endif
#ifdef BSP_USING_USART2
struct Stm32Usart serial_2;
struct SerialDriver serial_driver_2;
struct SerialHardwareDevice serial_device_2;
static const struct Stm32UsartDma usart_dma_2 =
{
DMA1_Stream5,
DMA_Channel_4,
DMA_FLAG_TCIF5,
DMA1_Stream5_IRQn,
0,
0,
};
void USART2_IRQHandler(int irq_num, void *arg)
{
UartIsr(&serial_2, &serial_driver_2, &serial_device_2);
}
DECLARE_HW_IRQ(USART2_IRQn, USART2_IRQHandler, NONE);
void DMA1_Stream5_IRQHandler(int irq_num, void *arg) {
DmaRxDoneIsr(&serial_2, &serial_driver_2, &serial_device_2);
}
DECLARE_HW_IRQ(DMA1_Stream5_IRQn, DMA1_Stream5_IRQHandler, NONE);
#endif
#ifdef BSP_USING_USART3
struct Stm32Usart serial_3;
struct SerialDriver serial_driver_3;
struct SerialHardwareDevice serial_device_3;
static const struct Stm32UsartDma usart_dma_3 =
{
DMA1_Stream1,
DMA_Channel_4,
DMA_FLAG_TCIF1,
DMA1_Stream1_IRQn,
0,
0,
};
void USART3_IRQHandler(int irq_num, void *arg)
{
UartIsr(&serial_3, &serial_driver_3, &serial_device_3);
}
DECLARE_HW_IRQ(USART3_IRQn, USART3_IRQHandler, NONE);
void DMA1_Stream1_IRQHandler(int irq_num, void *arg) {
DmaRxDoneIsr(&serial_3, &serial_driver_3, &serial_device_3);
}
DECLARE_HW_IRQ(DMA1_Stream1_IRQn, DMA1_Stream1_IRQHandler, NONE);
#endif
#ifdef BSP_USING_UART4
struct Stm32Usart serial_4;
struct SerialDriver serial_driver_4;
struct SerialHardwareDevice serial_device_4;
static const struct Stm32UsartDma uart_dma_4 =
{
DMA1_Stream2,
DMA_Channel_4,
DMA_FLAG_TCIF2,
DMA1_Stream2_IRQn,
0,
0,
};
void UART4_IRQHandler(int irq_num, void *arg)
{
UartIsr(&serial_4, &serial_driver_4, &serial_device_4);
}
DECLARE_HW_IRQ(UART4_IRQn, UART4_IRQHandler, NONE);
void DMA1_Stream2_IRQHandler(int irq_num, void *arg) {
DmaRxDoneIsr(&serial_4, &serial_driver_4, &serial_device_4);
}
DECLARE_HW_IRQ(DMA1_Stream2_IRQn, DMA1_Stream2_IRQHandler, NONE);
#endif
#ifdef BSP_USING_UART5
struct Stm32Usart serial_5;
struct SerialDriver serial_driver_5;
struct SerialHardwareDevice serial_device_5;
static const struct Stm32UsartDma uart_dma_5 =
{
DMA1_Stream0,
DMA_Channel_4,
DMA_FLAG_TCIF0,
DMA1_Stream0_IRQn,
0,
0,
};
void UART5_IRQHandler(int irq_num, void *arg)
{
UartIsr(&serial_5, &serial_driver_5, &serial_device_5);
}
DECLARE_HW_IRQ(UART5_IRQn, UART5_IRQHandler, NONE);
void DMA1_Stream0_IRQHandler(int irq_num, void *arg) {
DmaRxDoneIsr(&serial_5, &serial_driver_5, &serial_device_5);
}
DECLARE_HW_IRQ(DMA1_Stream0_IRQn, DMA1_Stream0_IRQHandler, NONE);
#endif
static uint32 Stm32SerialDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
{
NULL_PARAM_CHECK(drv);
NULL_PARAM_CHECK(configure_info);
x_err_t ret = EOK;
int serial_operation_cmd;
struct SerialDriver *serial_drv = (struct SerialDriver *)drv;
switch (configure_info->configure_cmd)
{
case OPE_INT:
ret = Stm32SerialInit(serial_drv, configure_info);
break;
case OPE_CFG:
serial_operation_cmd = *(int *)configure_info->private_data;
ret = Stm32SerialConfigure(serial_drv, serial_operation_cmd);
break;
default:
break;
}
return ret;
}
static const struct SerialDataCfg data_cfg_init =
{
.serial_baud_rate = BAUD_RATE_115200,
.serial_data_bits = DATA_BITS_8,
.serial_stop_bits = STOP_BITS_1,
.serial_parity_mode = PARITY_NONE,
.serial_bit_order = BIT_ORDER_LSB,
.serial_invert_mode = NRZ_NORMAL,
.serial_buffer_size = SERIAL_RB_BUFSZ,
};
/*manage the serial device operations*/
static const struct SerialDrvDone drv_done =
{
.init = Stm32SerialInit,
.configure = Stm32SerialConfigure,
};
/*manage the serial device hal operations*/
static struct SerialHwDevDone hwdev_done =
{
.put_char = Stm32SerialPutchar,
.get_char = Stm32SerialGetchar,
};
static int BoardSerialBusInit(struct SerialBus *serial_bus, struct SerialDriver *serial_driver, const char *bus_name, const char *drv_name)
{
x_err_t ret = EOK;
/*Init the serial bus */
ret = SerialBusInit(serial_bus, bus_name);
if (EOK != ret) {
KPrintf("hw_serial_init SerialBusInit error %d\n", ret);
return ERROR;
}
/*Init the serial driver*/
ret = SerialDriverInit(serial_driver, drv_name);
if (EOK != ret) {
KPrintf("hw_serial_init SerialDriverInit error %d\n", ret);
return ERROR;
}
/*Attach the serial driver to the serial bus*/
ret = SerialDriverAttachToBus(drv_name, bus_name);
if (EOK != ret) {
KPrintf("hw_serial_init SerialDriverAttachToBus error %d\n", ret);
return ERROR;
}
return ret;
}
/*Attach the serial device to the serial bus*/
static int BoardSerialDevBend(struct SerialHardwareDevice *serial_device, void *serial_param, const char *bus_name, const char *dev_name)
{
x_err_t ret = EOK;
ret = SerialDeviceRegister(serial_device, serial_param, dev_name);
if (EOK != ret) {
KPrintf("hw_serial_init SerialDeviceInit device %s error %d\n", dev_name, ret);
return ERROR;
}
ret = SerialDeviceAttachToBus(dev_name, bus_name);
if (EOK != ret) {
KPrintf("hw_serial_init SerialDeviceAttachToBus device %s error %d\n", dev_name, ret);
return ERROR;
}
return ret;
}
int InitHwUsart(void)
{
x_err_t ret = EOK;
RCCConfiguration();
GPIOConfiguration();
#ifdef BSP_USING_USART1
static struct SerialCfgParam serial_cfg_1;
memset(&serial_cfg_1, 0, sizeof(struct SerialCfgParam));
static struct UsartHwCfg serial_hw_cfg_1;
memset(&serial_hw_cfg_1, 0, sizeof(struct UsartHwCfg));
static struct SerialDevParam serial_dev_param_1;
memset(&serial_dev_param_1, 0, sizeof(struct SerialDevParam));
serial_1.dma = usart_dma_1;
serial_driver_1.drv_done = &drv_done;
serial_driver_1.configure = &Stm32SerialDrvConfigure;
serial_device_1.hwdev_done = &hwdev_done;
serial_cfg_1.data_cfg = data_cfg_init;
serial_hw_cfg_1.uart_device = USART1;
serial_hw_cfg_1.irq = USART1_IRQn;
serial_cfg_1.hw_cfg.private_data = (void *)&serial_hw_cfg_1;
serial_driver_1.private_data = (void *)&serial_cfg_1;
serial_dev_param_1.serial_work_mode = SIGN_OPER_INT_RX;
serial_device_1.haldev.private_data = (void *)&serial_dev_param_1;
NVIC_Configuration(serial_hw_cfg_1.irq);
ret = BoardSerialBusInit(&serial_1.serial_bus, &serial_driver_1, SERIAL_BUS_NAME_1, SERIAL_DRV_NAME_1);
if (EOK != ret) {
KPrintf("InitHwUsart usart1 error ret %u\n", ret);
return ERROR;
}
ret = BoardSerialDevBend(&serial_device_1, (void *)&serial_cfg_1, SERIAL_BUS_NAME_1, SERIAL_1_DEVICE_NAME_0);
if (EOK != ret) {
KPrintf("InitHwUsart usart1 error ret %u\n", ret);
return ERROR;
}
#endif
#ifdef BSP_USING_USART2
static struct SerialCfgParam serial_cfg_2;
memset(&serial_cfg_2, 0, sizeof(struct SerialCfgParam));
static struct UsartHwCfg serial_hw_cfg_2;
memset(&serial_hw_cfg_2, 0, sizeof(struct UsartHwCfg));
static struct SerialDevParam serial_dev_param_2;
memset(&serial_dev_param_2, 0, sizeof(struct SerialDevParam));
serial_2.dma = usart_dma_2;
serial_driver_2.drv_done = &drv_done;
serial_driver_2.configure = &Stm32SerialDrvConfigure;
serial_device_2.hwdev_done = &hwdev_done;
serial_cfg_2.data_cfg = data_cfg_init;
serial_hw_cfg_2.uart_device = USART2;
serial_hw_cfg_2.irq = USART2_IRQn;
serial_cfg_2.hw_cfg.private_data = (void *)&serial_hw_cfg_2;
serial_driver_2.private_data = (void *)&serial_cfg_2;
serial_dev_param_2.serial_work_mode = SIGN_OPER_INT_RX;
serial_device_2.haldev.private_data = (void *)&serial_dev_param_2;
NVIC_Configuration(serial_hw_cfg_2.irq);
ret = BoardSerialBusInit(&serial_2.serial_bus, &serial_driver_2, SERIAL_BUS_NAME_2, SERIAL_DRV_NAME_2);
if (EOK != ret) {
KPrintf("InitHwUsart usart2 error ret %u\n", ret);
return ERROR;
}
ret = BoardSerialDevBend(&serial_device_2, (void *)&serial_cfg_2, SERIAL_BUS_NAME_2, SERIAL_2_DEVICE_NAME_0);
if (EOK != ret) {
KPrintf("InitHwUsart usart2 error ret %u\n", ret);
return ERROR;
}
#endif
#ifdef BSP_USING_USART3
static struct SerialCfgParam serial_cfg_3;
memset(&serial_cfg_3, 0, sizeof(struct SerialCfgParam));
static struct UsartHwCfg serial_hw_cfg_3;
memset(&serial_hw_cfg_3, 0, sizeof(struct UsartHwCfg));
static struct SerialDevParam serial_dev_param_3;
memset(&serial_dev_param_3, 0, sizeof(struct SerialDevParam));
serial_3.dma = usart_dma_3;
serial_driver_3.drv_done = &drv_done;
serial_driver_3.configure = &Stm32SerialDrvConfigure;
serial_device_3.hwdev_done = &hwdev_done;
serial_cfg_3.data_cfg = data_cfg_init;
serial_hw_cfg_3.uart_device = USART3;
serial_hw_cfg_3.irq = USART3_IRQn;
serial_cfg_3.hw_cfg.private_data = (void *)&serial_hw_cfg_3;
serial_driver_3.private_data = (void *)&serial_cfg_3;
serial_dev_param_3.serial_work_mode = SIGN_OPER_INT_RX;
serial_device_3.haldev.private_data = (void *)&serial_dev_param_3;
NVIC_Configuration(serial_hw_cfg_3.irq);
ret = BoardSerialBusInit(&serial_3.serial_bus, &serial_driver_3, SERIAL_BUS_NAME_3, SERIAL_DRV_NAME_3);
if (EOK != ret) {
KPrintf("InitHwUsart usart3 error ret %u\n", ret);
return ERROR;
}
ret = BoardSerialDevBend(&serial_device_3, (void *)&serial_cfg_3, SERIAL_BUS_NAME_3, SERIAL_3_DEVICE_NAME_0);
if (EOK != ret) {
KPrintf("InitHwUsart usart3 error ret %u\n", ret);
return ERROR;
}
#endif
#ifdef BSP_USING_UART4
static struct SerialCfgParam serial_cfg_4;
memset(&serial_cfg_4, 0, sizeof(struct SerialCfgParam));
static struct UsartHwCfg serial_hw_cfg_4;
memset(&serial_hw_cfg_4, 0, sizeof(struct UsartHwCfg));
static struct SerialDevParam serial_dev_param_4;
memset(&serial_dev_param_4, 0, sizeof(struct SerialDevParam));
serial_4.dma = uart_dma_4;
serial_driver_4.drv_done = &drv_done;
serial_driver_4.configure = &Stm32SerialDrvConfigure;
serial_device_4.hwdev_done = &hwdev_done;
serial_cfg_4.data_cfg = data_cfg_init;
serial_hw_cfg_4.uart_device = UART4;
serial_hw_cfg_4.irq = UART4_IRQn;
serial_cfg_4.hw_cfg.private_data = (void *)&serial_hw_cfg_4;
serial_driver_4.private_data = (void *)&serial_cfg_4;
serial_dev_param_4.serial_work_mode = SIGN_OPER_INT_RX;
serial_device_4.haldev.private_data = (void *)&serial_dev_param_4;
NVIC_Configuration(serial_hw_cfg_4.irq);
ret = BoardSerialBusInit(&serial_4.serial_bus, &serial_driver_4, SERIAL_BUS_NAME_4, SERIAL_DRV_NAME_4);
if (EOK != ret) {
KPrintf("InitHwUsart usart4 error ret %u\n", ret);
return ERROR;
}
ret = BoardSerialDevBend(&serial_device_4, (void *)&serial_cfg_4, SERIAL_BUS_NAME_4, SERIAL_4_DEVICE_NAME_0);
if (EOK != ret) {
KPrintf("InitHwUsart usart4 error ret %u\n", ret);
return ERROR;
}
#endif
#ifdef BSP_USING_UART5
static struct SerialCfgParam serial_cfg_5;
memset(&serial_cfg_5, 0, sizeof(struct SerialCfgParam));
static struct UsartHwCfg serial_hw_cfg_5;
memset(&serial_hw_cfg_5, 0, sizeof(struct UsartHwCfg));
static struct SerialDevParam serial_dev_param_5;
memset(&serial_dev_param_5, 0, sizeof(struct SerialDevParam));
serial_5.dma = uart_dma_5;
serial_driver_5.drv_done = &drv_done;
serial_driver_5.configure = &Stm32SerialDrvConfigure;
serial_device_5.hwdev_done = &hwdev_done;
serial_cfg_5.data_cfg = data_cfg_init;
serial_hw_cfg_5.uart_device = UART5;
serial_hw_cfg_5.irq = UART5_IRQn;
serial_cfg_5.hw_cfg.private_data = (void *)&serial_hw_cfg_5;
serial_driver_5.private_data = (void *)&serial_cfg_5;
serial_dev_param_5.serial_work_mode = SIGN_OPER_INT_RX;
serial_device_5.haldev.private_data = (void *)&serial_dev_param_5;
NVIC_Configuration(serial_hw_cfg_5.irq);
ret = BoardSerialBusInit(&serial_5.serial_bus, &serial_driver_5, SERIAL_BUS_NAME_5, SERIAL_DRV_NAME_5);
if (EOK != ret) {
KPrintf("InitHwUsart usart5 error ret %u\n", ret);
return ERROR;
}
ret = BoardSerialDevBend(&serial_device_5, (void *)&serial_cfg_5, SERIAL_BUS_NAME_5, SERIAL_5_DEVICE_NAME_0);
if (EOK != ret) {
KPrintf("InitHwUsart usart5 error ret %u\n", ret);
return ERROR;
}
#endif
return ret;
}

858
Ubiquitous/XiUOS/board/cortex-m4-emulator/.history/third_party_driver/uart/connect_usart_20210825135326.c Normal file
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/*
* Copyright (c) 2020 RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
*/
/**
* @file connect_usart.c
* @brief support stm32f407-st-discovery-board usart function and register to bus framework
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021-04-25
*/
/*************************************************
File name: connect_uart.c
Description: support stm32f407-st-discovery-board usart configure and uart bus register function
Others: take RT-Thread v4.0.2/bsp/stm32/libraries/HAL_Drivers/drv_usart.c for references
https://github.com/RT-Thread/rt-thread/tree/v4.0.2
History:
1. Date: 2021-04-25
Author: AIIT XUOS Lab
Modification:
1. support stm32f407-st-discovery-board usart configure, write and read
2. support stm32f407-st-discovery-board usart bus device and driver register
*************************************************/
#include "stm32f4xx.h"
#include "board.h"
#include "misc.h"
#include "connect_usart.h"
#include "hardware_gpio.h"
#include "hardware_rcc.h"
/* UART GPIO define. */
#define UART1_GPIO_TX GPIO_Pin_6
#define UART1_TX_PIN_SOURCE GPIO_PinSource6
#define UART1_GPIO_RX GPIO_Pin_7
#define UART1_RX_PIN_SOURCE GPIO_PinSource7
#define UART1_GPIO GPIOB
#define UART1_GPIO_RCC RCC_AHB1Periph_GPIOB
#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1
#define UART2_GPIO_TX GPIO_Pin_2
#define UART2_TX_PIN_SOURCE GPIO_PinSource2
#define UART2_GPIO_RX GPIO_Pin_3
#define UART2_RX_PIN_SOURCE GPIO_PinSource3
#define UART2_GPIO GPIOA
#define UART2_GPIO_RCC RCC_AHB1Periph_GPIOA
#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
#define UART3_GPIO_TX GPIO_Pin_8
#define UART3_TX_PIN_SOURCE GPIO_PinSource8
#define UART3_GPIO_RX GPIO_Pin_9
#define UART3_RX_PIN_SOURCE GPIO_PinSource9
#define UART3_GPIO GPIOD
#define UART3_GPIO_RCC RCC_AHB1Periph_GPIOD
#define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3
#define UART4_GPIO_TX GPIO_Pin_10
#define UART4_TX_PIN_SOURCE GPIO_PinSource10
#define UART4_GPIO_RX GPIO_Pin_11
#define UART4_RX_PIN_SOURCE GPIO_PinSource11
#define UART4_GPIO GPIOC
#define UART4_GPIO_RCC RCC_AHB1Periph_GPIOC
#define RCC_APBPeriph_UART4 RCC_APB1Periph_UART4
#define UART5_GPIO_TX GPIO_Pin_12
#define UART5_TX_PIN_SOURCE GPIO_PinSource12
#define UART5_GPIO_RX GPIO_Pin_2
#define UART5_RX_PIN_SOURCE GPIO_PinSource2
#define UART5_TX GPIOC
#define UART5_RX GPIOD
#define UART5_GPIO_RCC_TX RCC_AHB1Periph_GPIOC
#define UART5_GPIO_RCC_RX RCC_AHB1Periph_GPIOD
#define RCC_APBPeriph_UART5 RCC_APB1Periph_UART5
#define UART_ENABLE_IRQ(n) NVIC_EnableIRQ((n))
#define UART_DISABLE_IRQ(n) NVIC_DisableIRQ((n))
static void RCCConfiguration(void)
{
#ifdef BSP_USING_USART1
RCC_AHB1PeriphClockCmd(UART1_GPIO_RCC, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APBPeriph_UART1, ENABLE);
#endif
#ifdef BSP_USING_USART2
RCC_AHB1PeriphClockCmd(UART2_GPIO_RCC, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART2, ENABLE);
#endif
#ifdef BSP_USING_USART3
RCC_AHB1PeriphClockCmd(UART3_GPIO_RCC, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART3, ENABLE);
#endif
#ifdef BSP_USING_UART4
RCC_AHB1PeriphClockCmd(UART4_GPIO_RCC, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART4, ENABLE);
#endif
#ifdef BSP_USING_UART5
RCC_AHB1PeriphClockCmd(UART5_GPIO_RCC_TX | UART5_GPIO_RCC_RX, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART5, ENABLE);
#endif
}
static void GPIOConfiguration(void)
{
GPIO_InitTypeDef gpio_initstructure;
gpio_initstructure.GPIO_Mode = GPIO_Mode_AF;
gpio_initstructure.GPIO_OType = GPIO_OType_PP;
gpio_initstructure.GPIO_PuPd = GPIO_PuPd_UP;
gpio_initstructure.GPIO_Speed = GPIO_Speed_2MHz;
#ifdef BSP_USING_USART1
gpio_initstructure.GPIO_Pin = UART1_GPIO_RX | UART1_GPIO_TX;
GPIO_PinAFConfig(UART1_GPIO, UART1_TX_PIN_SOURCE, GPIO_AF_USART1);
GPIO_PinAFConfig(UART1_GPIO, UART1_RX_PIN_SOURCE, GPIO_AF_USART1);
GPIO_Init(UART1_GPIO, &gpio_initstructure);
#endif
#ifdef BSP_USING_USART2
gpio_initstructure.GPIO_Pin = UART2_GPIO_RX | UART2_GPIO_TX;
GPIO_PinAFConfig(UART2_GPIO, UART2_TX_PIN_SOURCE, GPIO_AF_USART2);
GPIO_PinAFConfig(UART2_GPIO, UART2_RX_PIN_SOURCE, GPIO_AF_USART2);
GPIO_Init(UART2_GPIO, &gpio_initstructure);
#endif
#ifdef BSP_USING_USART3
gpio_initstructure.GPIO_Pin = UART3_GPIO_TX | UART3_GPIO_RX;
GPIO_PinAFConfig(UART3_GPIO, UART3_TX_PIN_SOURCE, GPIO_AF_USART3);
GPIO_PinAFConfig(UART3_GPIO, UART3_RX_PIN_SOURCE, GPIO_AF_USART3);
GPIO_Init(UART3_GPIO, &gpio_initstructure);
#endif
#ifdef BSP_USING_UART4
gpio_initstructure.GPIO_Pin = UART4_GPIO_TX | UART4_GPIO_RX;
GPIO_PinAFConfig(UART4_GPIO, UART4_TX_PIN_SOURCE, GPIO_AF_UART4);
GPIO_PinAFConfig(UART4_GPIO, UART4_RX_PIN_SOURCE, GPIO_AF_UART4);
GPIO_Init(UART4_GPIO, &gpio_initstructure);
#endif
#ifdef BSP_USING_UART5
gpio_initstructure.GPIO_Pin = UART5_GPIO_TX;
GPIO_PinAFConfig(UART5_TX, UART5_TX_PIN_SOURCE, GPIO_AF_UART5);
GPIO_Init(UART5_TX, &gpio_initstructure);
gpio_initstructure.GPIO_Pin = UART5_GPIO_RX;
GPIO_PinAFConfig(UART5_RX, UART5_RX_PIN_SOURCE, GPIO_AF_UART5);
GPIO_Init(UART5_RX, &gpio_initstructure);
#endif
}
static void NVIC_Configuration(IRQn_Type irq)
{
NVIC_InitTypeDef NVIC_InitStructure;
NVIC_InitStructure.NVIC_IRQChannel = irq;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
static void DmaUartConfig(struct Stm32UsartDma *dma, USART_TypeDef *uart_device, uint32_t SettingRecvLen, void *mem_base_addr)
{
DMA_InitTypeDef DMA_InitStructure;
dma->SettingRecvLen = SettingRecvLen;
DMA_DeInit(dma->RxStream);
while (DMA_GetCmdStatus(dma->RxStream) != DISABLE);
DMA_InitStructure.DMA_Channel = dma->RxCh;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) &(uart_device->DR);
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)mem_base_addr;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_BufferSize = dma->SettingRecvLen;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(dma->RxStream, &DMA_InitStructure);
}
static void DMAConfiguration(struct SerialHardwareDevice *serial_dev, USART_TypeDef *uart_device)
{
struct Stm32Usart *serial = CONTAINER_OF(serial_dev->haldev.owner_bus, struct Stm32Usart, serial_bus);
struct Stm32UsartDma *dma = &serial->dma;
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_dev->private_data;
NVIC_InitTypeDef NVIC_InitStructure;
USART_ITConfig(uart_device, USART_IT_IDLE , ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);
DmaUartConfig(dma, uart_device, serial_cfg->data_cfg.serial_buffer_size, serial_dev->serial_fifo.serial_rx->serial_rx_buffer);
DMA_ClearFlag(dma->RxStream, dma->RxFlag);
DMA_ITConfig(dma->RxStream, DMA_IT_TC, ENABLE);
USART_DMACmd(uart_device, USART_DMAReq_Rx, ENABLE);
DMA_Cmd(dma->RxStream, ENABLE);
NVIC_InitStructure.NVIC_IRQChannel = dma->RxIrqCh;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
static void SerialCfgParamCheck(struct SerialCfgParam *serial_cfg_default, struct SerialCfgParam *serial_cfg_new)
{
struct SerialDataCfg *data_cfg_default = &serial_cfg_default->data_cfg;
struct SerialDataCfg *data_cfg_new = &serial_cfg_new->data_cfg;
if((data_cfg_default->serial_baud_rate != data_cfg_new->serial_baud_rate) && (data_cfg_new->serial_baud_rate)) {
data_cfg_default->serial_baud_rate = data_cfg_new->serial_baud_rate;
}
if((data_cfg_default->serial_bit_order != data_cfg_new->serial_bit_order) && (data_cfg_new->serial_bit_order)) {
data_cfg_default->serial_bit_order = data_cfg_new->serial_bit_order;
}
if((data_cfg_default->serial_buffer_size != data_cfg_new->serial_buffer_size) && (data_cfg_new->serial_buffer_size)) {
data_cfg_default->serial_buffer_size = data_cfg_new->serial_buffer_size;
}
if((data_cfg_default->serial_data_bits != data_cfg_new->serial_data_bits) && (data_cfg_new->serial_data_bits)) {
data_cfg_default->serial_data_bits = data_cfg_new->serial_data_bits;
}
if((data_cfg_default->serial_invert_mode != data_cfg_new->serial_invert_mode) && (data_cfg_new->serial_invert_mode)) {
data_cfg_default->serial_invert_mode = data_cfg_new->serial_invert_mode;
}
if((data_cfg_default->serial_parity_mode != data_cfg_new->serial_parity_mode) && (data_cfg_new->serial_parity_mode)) {
data_cfg_default->serial_parity_mode = data_cfg_new->serial_parity_mode;
}
if((data_cfg_default->serial_stop_bits != data_cfg_new->serial_stop_bits) && (data_cfg_new->serial_stop_bits)) {
data_cfg_default->serial_stop_bits = data_cfg_new->serial_stop_bits;
}
}
static uint32 Stm32SerialInit(struct SerialDriver *serial_drv, struct BusConfigureInfo *configure_info)
{
NULL_PARAM_CHECK(serial_drv);
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_drv->private_data;
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
if (configure_info->private_data) {
struct SerialCfgParam *serial_cfg_new = (struct SerialCfgParam *)configure_info->private_data;
SerialCfgParamCheck(serial_cfg, serial_cfg_new);
}
USART_InitTypeDef USART_InitStructure;
USART_InitStructure.USART_BaudRate = serial_cfg->data_cfg.serial_baud_rate;
if (serial_cfg->data_cfg.serial_data_bits == DATA_BITS_8) {
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
} else if (serial_cfg->data_cfg.serial_data_bits == DATA_BITS_9) {
USART_InitStructure.USART_WordLength = USART_WordLength_9b;
}
if (serial_cfg->data_cfg.serial_stop_bits == STOP_BITS_1){
USART_InitStructure.USART_StopBits = USART_StopBits_1;
} else if (serial_cfg->data_cfg.serial_stop_bits == STOP_BITS_2) {
USART_InitStructure.USART_StopBits = USART_StopBits_2;
}
if (serial_cfg->data_cfg.serial_parity_mode == PARITY_NONE) {
USART_InitStructure.USART_Parity = USART_Parity_No;
} else if (serial_cfg->data_cfg.serial_parity_mode == PARITY_ODD) {
USART_InitStructure.USART_Parity = USART_Parity_Odd;
} else if (serial_cfg->data_cfg.serial_parity_mode == PARITY_EVEN) {
USART_InitStructure.USART_Parity = USART_Parity_Even;
}
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_Init(serial_hw_cfg->uart_device, &USART_InitStructure);
USART_Cmd(serial_hw_cfg->uart_device, ENABLE);
return EOK;
}
static uint32 Stm32SerialConfigure(struct SerialDriver *serial_drv, int serial_operation_cmd)
{
NULL_PARAM_CHECK(serial_drv);
struct SerialHardwareDevice *serial_dev = (struct SerialHardwareDevice *)serial_drv->driver.owner_bus->owner_haldev;
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_drv->private_data;
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
struct SerialDevParam *serial_dev_param = (struct SerialDevParam *)serial_dev->haldev.private_data;
switch (serial_operation_cmd)
{
case OPER_CLR_INT:
UART_DISABLE_IRQ(serial_hw_cfg->irq);
USART_ITConfig(serial_hw_cfg->uart_device, USART_IT_RXNE, DISABLE);
break;
case OPER_SET_INT:
UART_ENABLE_IRQ(serial_hw_cfg->irq);
USART_ITConfig(serial_hw_cfg->uart_device, USART_IT_RXNE, ENABLE);
break;
case OPER_CONFIG :
if (SIGN_OPER_DMA_RX == serial_dev_param->serial_set_mode){
DMAConfiguration(serial_dev, serial_hw_cfg->uart_device);
}
}
return EOK;
}
static int Stm32SerialPutchar(struct SerialHardwareDevice *serial_dev, char c)
{
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_dev->private_data;
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
while (!(serial_hw_cfg->uart_device->SR & USART_FLAG_TXE));
serial_hw_cfg->uart_device->DR = c;
return EOK;
}
static int Stm32SerialGetchar(struct SerialHardwareDevice *serial_dev)
{
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_dev->private_data;
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
int ch = -1;
if (serial_hw_cfg->uart_device->SR & USART_FLAG_RXNE) {
ch = serial_hw_cfg->uart_device->DR & 0xff;
}
return ch;
}
static void DmaUartRxIdleIsr(struct SerialHardwareDevice *serial_dev, struct Stm32UsartDma *dma, USART_TypeDef *uart_device)
{
x_base level = CriticalAreaLock();
x_size_t recv_total_index = dma->SettingRecvLen - DMA_GetCurrDataCounter(dma->RxStream);
x_size_t recv_len = recv_total_index - dma->LastRecvIndex;
dma->LastRecvIndex = recv_total_index;
CriticalAreaUnLock(level);
if (recv_len) SerialSetIsr(serial_dev, SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
USART_ReceiveData(uart_device);
}
static void DmaRxDoneIsr(struct Stm32Usart *serial, struct SerialDriver *serial_drv, struct SerialHardwareDevice *serial_dev)
{
struct Stm32UsartDma *dma = &serial->dma;
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_drv->private_data;
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
if (DMA_GetFlagStatus(dma->RxStream, dma->RxFlag) != RESET) {
x_base level = CriticalAreaLock();
x_size_t recv_len = dma->SettingRecvLen - dma->LastRecvIndex;
dma->LastRecvIndex = 0;
CriticalAreaUnLock(level);
if (recv_len) SerialSetIsr(serial_dev, SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
DMA_ClearFlag(dma->RxStream, dma->RxFlag);
}
}
static void UartIsr(struct Stm32Usart *serial, struct SerialDriver *serial_drv, struct SerialHardwareDevice *serial_dev)
{
struct Stm32UsartDma *dma = &serial->dma;
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_drv->private_data;
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
if (USART_GetITStatus(serial_hw_cfg->uart_device, USART_IT_RXNE) != RESET) {
SerialSetIsr(serial_dev, SERIAL_EVENT_RX_IND);
USART_ClearITPendingBit(serial_hw_cfg->uart_device, USART_IT_RXNE);
}
if (USART_GetITStatus(serial_hw_cfg->uart_device, USART_IT_IDLE) != RESET) {
DmaUartRxIdleIsr(serial_dev, dma, serial_hw_cfg->uart_device);
}
if (USART_GetITStatus(serial_hw_cfg->uart_device, USART_IT_TC) != RESET) {
USART_ClearITPendingBit(serial_hw_cfg->uart_device, USART_IT_TC);
}
if (USART_GetFlagStatus(serial_hw_cfg->uart_device, USART_FLAG_ORE) == SET) {
USART_ReceiveData(serial_hw_cfg->uart_device);
}
}
#ifdef BSP_USING_USART1
struct Stm32Usart serial_1;
struct SerialDriver serial_driver_1;
struct SerialHardwareDevice serial_device_1;
static const struct Stm32UsartDma usart_dma_1 =
{
DMA2_Stream5,
DMA_Channel_4,
DMA_FLAG_TCIF5,
DMA2_Stream5_IRQn,
0,
0,
};
void USART1_IRQHandler(int irq_num, void *arg)
{
UartIsr(&serial_1, &serial_driver_1, &serial_device_1);
}
DECLARE_HW_IRQ(USART1_IRQn, USART1_IRQHandler, NONE);
void DMA2_Stream5_IRQHandler(int irq_num, void *arg) {
DmaRxDoneIsr(&serial_1, &serial_driver_1, &serial_device_1);
}
DECLARE_HW_IRQ(DMA2_Stream5_IRQn, DMA2_Stream5_IRQHandler, NONE);
#endif
#ifdef BSP_USING_USART2
struct Stm32Usart serial_2;
struct SerialDriver serial_driver_2;
struct SerialHardwareDevice serial_device_2;
static const struct Stm32UsartDma usart_dma_2 =
{
DMA1_Stream5,
DMA_Channel_4,
DMA_FLAG_TCIF5,
DMA1_Stream5_IRQn,
0,
0,
};
void USART2_IRQHandler(int irq_num, void *arg)
{
UartIsr(&serial_2, &serial_driver_2, &serial_device_2);
}
DECLARE_HW_IRQ(USART2_IRQn, USART2_IRQHandler, NONE);
void DMA1_Stream5_IRQHandler(int irq_num, void *arg) {
DmaRxDoneIsr(&serial_2, &serial_driver_2, &serial_device_2);
}
DECLARE_HW_IRQ(DMA1_Stream5_IRQn, DMA1_Stream5_IRQHandler, NONE);
#endif
#ifdef BSP_USING_USART3
struct Stm32Usart serial_3;
struct SerialDriver serial_driver_3;
struct SerialHardwareDevice serial_device_3;
static const struct Stm32UsartDma usart_dma_3 =
{
DMA1_Stream1,
DMA_Channel_4,
DMA_FLAG_TCIF1,
DMA1_Stream1_IRQn,
0,
0,
};
void USART3_IRQHandler(int irq_num, void *arg)
{
UartIsr(&serial_3, &serial_driver_3, &serial_device_3);
}
DECLARE_HW_IRQ(USART3_IRQn, USART3_IRQHandler, NONE);
void DMA1_Stream1_IRQHandler(int irq_num, void *arg) {
DmaRxDoneIsr(&serial_3, &serial_driver_3, &serial_device_3);
}
DECLARE_HW_IRQ(DMA1_Stream1_IRQn, DMA1_Stream1_IRQHandler, NONE);
#endif
#ifdef BSP_USING_UART4
struct Stm32Usart serial_4;
struct SerialDriver serial_driver_4;
struct SerialHardwareDevice serial_device_4;
static const struct Stm32UsartDma uart_dma_4 =
{
DMA1_Stream2,
DMA_Channel_4,
DMA_FLAG_TCIF2,
DMA1_Stream2_IRQn,
0,
0,
};
void UART4_IRQHandler(int irq_num, void *arg)
{
UartIsr(&serial_4, &serial_driver_4, &serial_device_4);
}
DECLARE_HW_IRQ(UART4_IRQn, UART4_IRQHandler, NONE);
void DMA1_Stream2_IRQHandler(int irq_num, void *arg) {
DmaRxDoneIsr(&serial_4, &serial_driver_4, &serial_device_4);
}
DECLARE_HW_IRQ(DMA1_Stream2_IRQn, DMA1_Stream2_IRQHandler, NONE);
#endif
#ifdef BSP_USING_UART5
struct Stm32Usart serial_5;
struct SerialDriver serial_driver_5;
struct SerialHardwareDevice serial_device_5;
static const struct Stm32UsartDma uart_dma_5 =
{
DMA1_Stream0,
DMA_Channel_4,
DMA_FLAG_TCIF0,
DMA1_Stream0_IRQn,
0,
0,
};
void UART5_IRQHandler(int irq_num, void *arg)
{
UartIsr(&serial_5, &serial_driver_5, &serial_device_5);
}
DECLARE_HW_IRQ(UART5_IRQn, UART5_IRQHandler, NONE);
void DMA1_Stream0_IRQHandler(int irq_num, void *arg) {
DmaRxDoneIsr(&serial_5, &serial_driver_5, &serial_device_5);
}
DECLARE_HW_IRQ(DMA1_Stream0_IRQn, DMA1_Stream0_IRQHandler, NONE);
#endif
static uint32 Stm32SerialDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
{
NULL_PARAM_CHECK(drv);
NULL_PARAM_CHECK(configure_info);
x_err_t ret = EOK;
int serial_operation_cmd;
struct SerialDriver *serial_drv = (struct SerialDriver *)drv;
switch (configure_info->configure_cmd)
{
case OPE_INT:
ret = Stm32SerialInit(serial_drv, configure_info);
break;
case OPE_CFG:
serial_operation_cmd = *(int *)configure_info->private_data;
ret = Stm32SerialConfigure(serial_drv, serial_operation_cmd);
break;
default:
break;
}
return ret;
}
static const struct SerialDataCfg data_cfg_init =
{
.serial_baud_rate = BAUD_RATE_115200,
.serial_data_bits = DATA_BITS_8,
.serial_stop_bits = STOP_BITS_1,
.serial_parity_mode = PARITY_NONE,
.serial_bit_order = BIT_ORDER_LSB,
.serial_invert_mode = NRZ_NORMAL,
.serial_buffer_size = SERIAL_RB_BUFSZ,
};
/*manage the serial device operations*/
static const struct SerialDrvDone drv_done =
{
.init = Stm32SerialInit,
.configure = Stm32SerialConfigure,
};
/*manage the serial device hal operations*/
static struct SerialHwDevDone hwdev_done =
{
.put_char = Stm32SerialPutchar,
.get_char = Stm32SerialGetchar,
};
static int BoardSerialBusInit(struct SerialBus *serial_bus, struct SerialDriver *serial_driver, const char *bus_name, const char *drv_name)
{
x_err_t ret = EOK;
/*Init the serial bus */
ret = SerialBusInit(serial_bus, bus_name);
if (EOK != ret) {
KPrintf("hw_serial_init SerialBusInit error %d\n", ret);
return ERROR;
}
/*Init the serial driver*/
ret = SerialDriverInit(serial_driver, drv_name);
if (EOK != ret) {
KPrintf("hw_serial_init SerialDriverInit error %d\n", ret);
return ERROR;
}
/*Attach the serial driver to the serial bus*/
ret = SerialDriverAttachToBus(drv_name, bus_name);
if (EOK != ret) {
KPrintf("hw_serial_init SerialDriverAttachToBus error %d\n", ret);
return ERROR;
}
return ret;
}
/*Attach the serial device to the serial bus*/
static int BoardSerialDevBend(struct SerialHardwareDevice *serial_device, void *serial_param, const char *bus_name, const char *dev_name)
{
x_err_t ret = EOK;
ret = SerialDeviceRegister(serial_device, serial_param, dev_name);
if (EOK != ret) {
KPrintf("hw_serial_init SerialDeviceInit device %s error %d\n", dev_name, ret);
return ERROR;
}
ret = SerialDeviceAttachToBus(dev_name, bus_name);
if (EOK != ret) {
KPrintf("hw_serial_init SerialDeviceAttachToBus device %s error %d\n", dev_name, ret);
return ERROR;
}
return ret;
}
int InitHwUsart(void)
{
x_err_t ret = EOK;
RCCConfiguration();
GPIOConfiguration();
#ifdef BSP_USING_USART1
static struct SerialCfgParam serial_cfg_1;
memset(&serial_cfg_1, 0, sizeof(struct SerialCfgParam));
static struct UsartHwCfg serial_hw_cfg_1;
memset(&serial_hw_cfg_1, 0, sizeof(struct UsartHwCfg));
static struct SerialDevParam serial_dev_param_1;
memset(&serial_dev_param_1, 0, sizeof(struct SerialDevParam));
serial_1.dma = usart_dma_1;
serial_driver_1.drv_done = &drv_done;
serial_driver_1.configure = &Stm32SerialDrvConfigure;
serial_device_1.hwdev_done = &hwdev_done;
serial_cfg_1.data_cfg = data_cfg_init;
serial_hw_cfg_1.uart_device = USART1;
serial_hw_cfg_1.irq = USART1_IRQn;
serial_cfg_1.hw_cfg.private_data = (void *)&serial_hw_cfg_1;
serial_driver_1.private_data = (void *)&serial_cfg_1;
serial_dev_param_1.serial_work_mode = SIGN_OPER_INT_RX;
serial_device_1.haldev.private_data = (void *)&serial_dev_param_1;
NVIC_Configuration(serial_hw_cfg_1.irq);
ret = BoardSerialBusInit(&serial_1.serial_bus, &serial_driver_1, SERIAL_BUS_NAME_1, SERIAL_DRV_NAME_1);
if (EOK != ret) {
KPrintf("InitHwUsart usart1 error ret %u\n", ret);
return ERROR;
}
ret = BoardSerialDevBend(&serial_device_1, (void *)&serial_cfg_1, SERIAL_BUS_NAME_1, SERIAL_1_DEVICE_NAME_0);
if (EOK != ret) {
KPrintf("InitHwUsart usart1 error ret %u\n", ret);
return ERROR;
}
#endif
#ifdef BSP_USING_USART2
static struct SerialCfgParam serial_cfg_2;
memset(&serial_cfg_2, 0, sizeof(struct SerialCfgParam));
static struct UsartHwCfg serial_hw_cfg_2;
memset(&serial_hw_cfg_2, 0, sizeof(struct UsartHwCfg));
static struct SerialDevParam serial_dev_param_2;
memset(&serial_dev_param_2, 0, sizeof(struct SerialDevParam));
serial_2.dma = usart_dma_2;
serial_driver_2.drv_done = &drv_done;
serial_driver_2.configure = &Stm32SerialDrvConfigure;
serial_device_2.hwdev_done = &hwdev_done;
serial_cfg_2.data_cfg = data_cfg_init;
serial_hw_cfg_2.uart_device = USART2;
serial_hw_cfg_2.irq = USART2_IRQn;
serial_cfg_2.hw_cfg.private_data = (void *)&serial_hw_cfg_2;
serial_driver_2.private_data = (void *)&serial_cfg_2;
serial_dev_param_2.serial_work_mode = SIGN_OPER_INT_RX;
serial_device_2.haldev.private_data = (void *)&serial_dev_param_2;
NVIC_Configuration(serial_hw_cfg_2.irq);
ret = BoardSerialBusInit(&serial_2.serial_bus, &serial_driver_2, SERIAL_BUS_NAME_2, SERIAL_DRV_NAME_2);
if (EOK != ret) {
KPrintf("InitHwUsart usart2 error ret %u\n", ret);
return ERROR;
}
ret = BoardSerialDevBend(&serial_device_2, (void *)&serial_cfg_2, SERIAL_BUS_NAME_2, SERIAL_2_DEVICE_NAME_0);
if (EOK != ret) {
KPrintf("InitHwUsart usart2 error ret %u\n", ret);
return ERROR;
}
#endif
#ifdef BSP_USING_USART3
static struct SerialCfgParam serial_cfg_3;
memset(&serial_cfg_3, 0, sizeof(struct SerialCfgParam));
static struct UsartHwCfg serial_hw_cfg_3;
memset(&serial_hw_cfg_3, 0, sizeof(struct UsartHwCfg));
static struct SerialDevParam serial_dev_param_3;
memset(&serial_dev_param_3, 0, sizeof(struct SerialDevParam));
serial_3.dma = usart_dma_3;
serial_driver_3.drv_done = &drv_done;
serial_driver_3.configure = &Stm32SerialDrvConfigure;
serial_device_3.hwdev_done = &hwdev_done;
serial_cfg_3.data_cfg = data_cfg_init;
serial_hw_cfg_3.uart_device = USART3;
serial_hw_cfg_3.irq = USART3_IRQn;
serial_cfg_3.hw_cfg.private_data = (void *)&serial_hw_cfg_3;
serial_driver_3.private_data = (void *)&serial_cfg_3;
serial_dev_param_3.serial_work_mode = SIGN_OPER_INT_RX;
serial_device_3.haldev.private_data = (void *)&serial_dev_param_3;
NVIC_Configuration(serial_hw_cfg_3.irq);
ret = BoardSerialBusInit(&serial_3.serial_bus, &serial_driver_3, SERIAL_BUS_NAME_3, SERIAL_DRV_NAME_3);
if (EOK != ret) {
KPrintf("InitHwUsart usart3 error ret %u\n", ret);
return ERROR;
}
ret = BoardSerialDevBend(&serial_device_3, (void *)&serial_cfg_3, SERIAL_BUS_NAME_3, SERIAL_3_DEVICE_NAME_0);
if (EOK != ret) {
KPrintf("InitHwUsart usart3 error ret %u\n", ret);
return ERROR;
}
#endif
#ifdef BSP_USING_UART4
static struct SerialCfgParam serial_cfg_4;
memset(&serial_cfg_4, 0, sizeof(struct SerialCfgParam));
static struct UsartHwCfg serial_hw_cfg_4;
memset(&serial_hw_cfg_4, 0, sizeof(struct UsartHwCfg));
static struct SerialDevParam serial_dev_param_4;
memset(&serial_dev_param_4, 0, sizeof(struct SerialDevParam));
serial_4.dma = uart_dma_4;
serial_driver_4.drv_done = &drv_done;
serial_driver_4.configure = &Stm32SerialDrvConfigure;
serial_device_4.hwdev_done = &hwdev_done;
serial_cfg_4.data_cfg = data_cfg_init;
serial_hw_cfg_4.uart_device = UART4;
serial_hw_cfg_4.irq = UART4_IRQn;
serial_cfg_4.hw_cfg.private_data = (void *)&serial_hw_cfg_4;
serial_driver_4.private_data = (void *)&serial_cfg_4;
serial_dev_param_4.serial_work_mode = SIGN_OPER_INT_RX;
serial_device_4.haldev.private_data = (void *)&serial_dev_param_4;
NVIC_Configuration(serial_hw_cfg_4.irq);
ret = BoardSerialBusInit(&serial_4.serial_bus, &serial_driver_4, SERIAL_BUS_NAME_4, SERIAL_DRV_NAME_4);
if (EOK != ret) {
KPrintf("InitHwUsart usart4 error ret %u\n", ret);
return ERROR;
}
ret = BoardSerialDevBend(&serial_device_4, (void *)&serial_cfg_4, SERIAL_BUS_NAME_4, SERIAL_4_DEVICE_NAME_0);
if (EOK != ret) {
KPrintf("InitHwUsart usart4 error ret %u\n", ret);
return ERROR;
}
#endif
#ifdef BSP_USING_UART5
static struct SerialCfgParam serial_cfg_5;
memset(&serial_cfg_5, 0, sizeof(struct SerialCfgParam));
static struct UsartHwCfg serial_hw_cfg_5;
memset(&serial_hw_cfg_5, 0, sizeof(struct UsartHwCfg));
static struct SerialDevParam serial_dev_param_5;
memset(&serial_dev_param_5, 0, sizeof(struct SerialDevParam));
serial_5.dma = uart_dma_5;
serial_driver_5.drv_done = &drv_done;
serial_driver_5.configure = &Stm32SerialDrvConfigure;
serial_device_5.hwdev_done = &hwdev_done;
serial_cfg_5.data_cfg = data_cfg_init;
serial_hw_cfg_5.uart_device = UART5;
serial_hw_cfg_5.irq = UART5_IRQn;
serial_cfg_5.hw_cfg.private_data = (void *)&serial_hw_cfg_5;
serial_driver_5.private_data = (void *)&serial_cfg_5;
serial_dev_param_5.serial_work_mode = SIGN_OPER_INT_RX;
serial_device_5.haldev.private_data = (void *)&serial_dev_param_5;
NVIC_Configuration(serial_hw_cfg_5.irq);
ret = BoardSerialBusInit(&serial_5.serial_bus, &serial_driver_5, SERIAL_BUS_NAME_5, SERIAL_DRV_NAME_5);
if (EOK != ret) {
KPrintf("InitHwUsart usart5 error ret %u\n", ret);
return ERROR;
}
ret = BoardSerialDevBend(&serial_device_5, (void *)&serial_cfg_5, SERIAL_BUS_NAME_5, SERIAL_5_DEVICE_NAME_0);
if (EOK != ret) {
KPrintf("InitHwUsart usart5 error ret %u\n", ret);
return ERROR;
}
#endif
return ret;
}

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#ifndef XS_CONFIG_H__
#define XS_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* XiUOS Project Configuration */
#define BOARD_STM32F407_EVB
#define ARCH_ARM
/* stm32f407-st-discovery feature */
#define BSP_USING_DMA
#define BSP_USING_GPIO
#define PIN_BUS_NAME "pin"
#define PIN_DRIVER_NAME "pin_drv"
#define PIN_DEVICE_NAME "pin_dev"
#define BSP_USING_UART
#define BSP_USING_USART1
#define SERIAL_BUS_NAME_1 "usart1"
#define SERIAL_DRV_NAME_1 "usart1_drv"
#define SERIAL_1_DEVICE_NAME_0 "usart1_dev1"
#define BSP_USING_USART2
#define SERIAL_BUS_NAME_2 "usart2"
#define SERIAL_DRV_NAME_2 "usart2_drv"
#define SERIAL_2_DEVICE_NAME_0 "usart2_dev2"
#define BSP_USING_USART3
#define SERIAL_BUS_NAME_3 "usart3"
#define SERIAL_DRV_NAME_3 "usart3_drv"
#define SERIAL_3_DEVICE_NAME_0 "usart3_dev3"
#define BSP_USING_WDT
#define WDT_BUS_NAME "wdt"
#define WDT_DRIVER_NAME "wdt_drv"
#define WDT_DEVICE_NAME "wdt_dev"
/* config default board resources */
/* config board app name */
#define BOARD_APP_NAME "/XiUOS_stm32f407-st-discovery_app.bin"
/* config board service table */
#define SERVICE_TABLE_ADDRESS 0x20000000
/* config hardware resources for connection */
/* Hardware feature */
#define RESOURCES_SERIAL
#define SERIAL_USING_DMA
#define SERIAL_RB_BUFSZ 128
#define RESOURCES_PIN
#define RESOURCES_WDT
/* Kernel feature */
/* separate compile(choose none for compile once) */
#define APP_STARTUP_FROM_FLASH
/* Memory Management */
#define MEM_ALIGN_SIZE 8
#define MM_PAGE_SIZE 4096
/* Using small memory allocator */
#define KERNEL_SMALL_MEM_ALLOC
#define SMALL_NUMBER_32B 64
#define SMALL_NUMBER_64B 32
/* Task feature */
#define USER_APPLICATION
/* Inter-Task communication */
#define KERNEL_SEMAPHORE
#define KERNEL_MUTEX
#define KERNEL_EVENT
#define KERNEL_MESSAGEQUEUE
#define KERNEL_SOFTTIMER
#define SCHED_POLICY_RR_REMAINSLICE
#define KTASK_PRIORITY_32
#define KTASK_PRIORITY_MAX 32
#define TICK_PER_SECOND 1000
#define KERNEL_STACK_OVERFLOW_CHECK
#define IDLE_KTASK_STACKSIZE 256
#define ZOMBIE_KTASK_STACKSIZE 2048
/* Kernel Console */
#define KERNEL_CONSOLE
#define KERNEL_BANNER
#define KERNEL_CONSOLEBUF_SIZE 128
/* Kernel Hook */
/* Command shell */
#define TOOL_SHELL
#define SHELL_ENTER_CR
#define SHELL_ENTER_LF
#define SHELL_ENTER_CR_AND_LF
/* Set shell user control */
#define SHELL_DEFAULT_USER "letter"
#define SHELL_DEFAULT_USER_PASSWORD ""
#define SHELL_LOCK_TIMEOUT 10000
/* Set shell config param */
#define SHELL_TASK_STACK_SIZE 4096
#define SHELL_TASK_PRIORITY 20
#define SHELL_MAX_NUMBER 5
#define SHELL_PARAMETER_MAX_NUMBER 8
#define SHELL_HISTORY_MAX_NUMBER 5
#define SHELL_PRINT_BUFFER 128
#define SHELL_HELP_SHOW_PERMISSION
/* Kernel data structure Manage */
#define KERNEL_QUEUEMANAGE
#define KERNEL_WORKQUEUE
#define WORKQUEUE_KTASK_STACKSIZE 512
#define WORKQUEUE_KTASK_PRIORITY 23
#define QUEUE_MAX 16
#define KERNEL_WAITQUEUE
#define KERNEL_DATAQUEUE
/* Kernel components init */
#define KERNEL_COMPONENTS_INIT
#define ENV_INIT_KTASK_STACK_SIZE 8192
#define KERNEL_USER_MAIN
#define NAME_NUM_MAX 32
/* hash table config */
#define ID_HTABLE_SIZE 16
#define ID_NUM_MAX 128
/* File system */
#define FS_VFS
#define VFS_USING_WORKDIR
#define FS_VFS_DEVFS
#define FS_VFS_FATFS
/* APP Framework */
/* Perception */
/* connection */
/* Intelligence */
/* Control */
/* Lib */
#define LIB
#define LIB_POSIX
/* C++ features */
#define LIB_NEWLIB
/* Security */
/* Applications */
/* config stack size and priority of main task */
#define MAIN_KTASK_STACK_SIZE 2048
#define MAIN_KTASK_PRIORITY 10
#endif

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#ifndef XS_CONFIG_H__
#define XS_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* XiUOS Project Configuration */
#define BOARD_CORTEX_M4_EVB
#define ARCH_ARM
/* stm32f407-st-discovery feature */
#define BSP_USING_DMA
#define BSP_USING_GPIO
#define PIN_BUS_NAME "pin"
#define PIN_DRIVER_NAME "pin_drv"
#define PIN_DEVICE_NAME "pin_dev"
#define BSP_USING_UART
#define BSP_USING_USART1
#define SERIAL_BUS_NAME_1 "usart1"
#define SERIAL_DRV_NAME_1 "usart1_drv"
#define SERIAL_1_DEVICE_NAME_0 "usart1_dev1"
#define BSP_USING_USART2
#define SERIAL_BUS_NAME_2 "usart2"
#define SERIAL_DRV_NAME_2 "usart2_drv"
#define SERIAL_2_DEVICE_NAME_0 "usart2_dev2"
#define BSP_USING_USART3
#define SERIAL_BUS_NAME_3 "usart3"
#define SERIAL_DRV_NAME_3 "usart3_drv"
#define SERIAL_3_DEVICE_NAME_0 "usart3_dev3"
#define BSP_USING_WDT
#define WDT_BUS_NAME "wdt"
#define WDT_DRIVER_NAME "wdt_drv"
#define WDT_DEVICE_NAME "wdt_dev"
/* config default board resources */
/* config board app name */
#define BOARD_APP_NAME "/XiUOS_stm32f407-st-discovery_app.bin"
/* config board service table */
#define SERVICE_TABLE_ADDRESS 0x20000000
/* config hardware resources for connection */
/* Hardware feature */
#define RESOURCES_SERIAL
#define SERIAL_USING_DMA
#define SERIAL_RB_BUFSZ 128
#define RESOURCES_PIN
#define RESOURCES_WDT
/* Kernel feature */
/* separate compile(choose none for compile once) */
#define APP_STARTUP_FROM_FLASH
/* Memory Management */
#define MEM_ALIGN_SIZE 8
#define MM_PAGE_SIZE 4096
/* Using small memory allocator */
#define KERNEL_SMALL_MEM_ALLOC
#define SMALL_NUMBER_32B 64
#define SMALL_NUMBER_64B 32
/* Task feature */
#define USER_APPLICATION
/* Inter-Task communication */
#define KERNEL_SEMAPHORE
#define KERNEL_MUTEX
#define KERNEL_EVENT
#define KERNEL_MESSAGEQUEUE
#define KERNEL_SOFTTIMER
#define SCHED_POLICY_RR_REMAINSLICE
#define KTASK_PRIORITY_32
#define KTASK_PRIORITY_MAX 32
#define TICK_PER_SECOND 1000
#define KERNEL_STACK_OVERFLOW_CHECK
#define IDLE_KTASK_STACKSIZE 256
#define ZOMBIE_KTASK_STACKSIZE 2048
/* Kernel Console */
#define KERNEL_CONSOLE
#define KERNEL_BANNER
#define KERNEL_CONSOLEBUF_SIZE 128
/* Kernel Hook */
/* Command shell */
#define TOOL_SHELL
#define SHELL_ENTER_CR
#define SHELL_ENTER_LF
#define SHELL_ENTER_CR_AND_LF
/* Set shell user control */
#define SHELL_DEFAULT_USER "letter"
#define SHELL_DEFAULT_USER_PASSWORD ""
#define SHELL_LOCK_TIMEOUT 10000
/* Set shell config param */
#define SHELL_TASK_STACK_SIZE 4096
#define SHELL_TASK_PRIORITY 20
#define SHELL_MAX_NUMBER 5
#define SHELL_PARAMETER_MAX_NUMBER 8
#define SHELL_HISTORY_MAX_NUMBER 5
#define SHELL_PRINT_BUFFER 128
#define SHELL_HELP_SHOW_PERMISSION
/* Kernel data structure Manage */
#define KERNEL_QUEUEMANAGE
#define KERNEL_WORKQUEUE
#define WORKQUEUE_KTASK_STACKSIZE 512
#define WORKQUEUE_KTASK_PRIORITY 23
#define QUEUE_MAX 16
#define KERNEL_WAITQUEUE
#define KERNEL_DATAQUEUE
/* Kernel components init */
#define KERNEL_COMPONENTS_INIT
#define ENV_INIT_KTASK_STACK_SIZE 8192
#define KERNEL_USER_MAIN
#define NAME_NUM_MAX 32
/* hash table config */
#define ID_HTABLE_SIZE 16
#define ID_NUM_MAX 128
/* File system */
#define FS_VFS
#define VFS_USING_WORKDIR
#define FS_VFS_DEVFS
#define FS_VFS_FATFS
/* APP Framework */
/* Perception */
/* connection */
/* Intelligence */
/* Control */
/* Lib */
#define LIB
#define LIB_POSIX
/* C++ features */
#define LIB_NEWLIB
/* Security */
/* Applications */
/* config stack size and priority of main task */
#define MAIN_KTASK_STACK_SIZE 2048
#define MAIN_KTASK_PRIORITY 10
#endif

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#ifndef XS_CONFIG_H__
#define XS_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* XiUOS Project Configuration */
#define BOARD_CORTEX_M4_EVB
#define ARCH_ARM
/* stm32f407-st-discovery feature */
#define BSP_USING_DMA
#define BSP_USING_GPIO
#define PIN_BUS_NAME "pin"
#define PIN_DRIVER_NAME "pin_drv"
#define PIN_DEVICE_NAME "pin_dev"
#define BSP_USING_UART
#define BSP_USING_USART1
#define SERIAL_BUS_NAME_1 "usart1"
#define SERIAL_DRV_NAME_1 "usart1_drv"
#define SERIAL_1_DEVICE_NAME_0 "usart1_dev1"
#define BSP_USING_USART2
#define SERIAL_BUS_NAME_2 "usart2"
#define SERIAL_DRV_NAME_2 "usart2_drv"
#define SERIAL_2_DEVICE_NAME_0 "usart2_dev2"
#define BSP_USING_USART3
#define SERIAL_BUS_NAME_3 "usart3"
#define SERIAL_DRV_NAME_3 "usart3_drv"
#define SERIAL_3_DEVICE_NAME_0 "usart3_dev3"
#define BSP_USING_WDT
#define WDT_BUS_NAME "wdt"
#define WDT_DRIVER_NAME "wdt_drv"
#define WDT_DEVICE_NAME "wdt_dev"
/* config default board resources */
/* config board app name */
#define BOARD_APP_NAME "/XiUOS_stm32f407-st-discovery_app.bin"
/* config board service table */
#define SERVICE_TABLE_ADDRESS 0x20000000
/* config hardware resources for connection */
/* Hardware feature */
#define RESOURCES_SERIAL
#define SERIAL_USING_DMA
#define SERIAL_RB_BUFSZ 128
#define RESOURCES_PIN
#define RESOURCES_WDT
/* Kernel feature */
/* separate compile(choose none for compile once) */
#define APP_STARTUP_FROM_FLASH
/* Memory Management */
#define MEM_ALIGN_SIZE 8
#define MM_PAGE_SIZE 4096
/* Using small memory allocator */
#define KERNEL_SMALL_MEM_ALLOC
#define SMALL_NUMBER_32B 64
#define SMALL_NUMBER_64B 32
/* Task feature */
#define USER_APPLICATION
/* Inter-Task communication */
#define KERNEL_SEMAPHORE
#define KERNEL_MUTEX
#define KERNEL_EVENT
#define KERNEL_MESSAGEQUEUE
#define KERNEL_SOFTTIMER
#define SCHED_POLICY_RR_REMAINSLICE
#define KTASK_PRIORITY_32
#define KTASK_PRIORITY_MAX 32
#define TICK_PER_SECOND 1000
#define KERNEL_STACK_OVERFLOW_CHECK
#define IDLE_KTASK_STACKSIZE 256
#define ZOMBIE_KTASK_STACKSIZE 2048
/* Kernel Console */
#define KERNEL_CONSOLE
#define KERNEL_BANNER
#define KERNEL_CONSOLEBUF_SIZE 128
/* Kernel Hook */
/* Command shell */
#define TOOL_SHELL
#define SHELL_ENTER_CR
#define SHELL_ENTER_LF
#define SHELL_ENTER_CR_AND_LF
/* Set shell user control */
#define SHELL_DEFAULT_USER "letter"
#define SHELL_DEFAULT_USER_PASSWORD ""
#define SHELL_LOCK_TIMEOUT 10000
/* Set shell config param */
#define SHELL_TASK_STACK_SIZE 4096
#define SHELL_TASK_PRIORITY 20
#define SHELL_MAX_NUMBER 5
#define SHELL_PARAMETER_MAX_NUMBER 8
#define SHELL_HISTORY_MAX_NUMBER 5
#define SHELL_PRINT_BUFFER 128
#define SHELL_HELP_SHOW_PERMISSION
/* Kernel data structure Manage */
#define KERNEL_QUEUEMANAGE
#define KERNEL_WORKQUEUE
#define WORKQUEUE_KTASK_STACKSIZE 512
#define WORKQUEUE_KTASK_PRIORITY 23
#define QUEUE_MAX 16
#define KERNEL_WAITQUEUE
#define KERNEL_DATAQUEUE
/* Kernel components init */
#define KERNEL_COMPONENTS_INIT
#define ENV_INIT_KTASK_STACK_SIZE 8192
#define KERNEL_USER_MAIN
#define NAME_NUM_MAX 32
/* hash table config */
#define ID_HTABLE_SIZE 16
#define ID_NUM_MAX 128
/* File system */
#define FS_VFS
#define VFS_USING_WORKDIR
#define FS_VFS_DEVFS
#define FS_VFS_FATFS
/* APP Framework */
/* Perception */
/* connection */
/* Intelligence */
/* Control */
/* Lib */
#define LIB
#define LIB_POSIX
/* C++ features */
#define LIB_NEWLIB
/* Security */
/* Applications */
/* config stack size and priority of main task */
#define MAIN_KTASK_STACK_SIZE 2048
#define MAIN_KTASK_PRIORITY 10
#endif

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#ifndef XS_CONFIG_H__
#define XS_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* XiUOS Project Configuration */
#define BOARD_CORTEX_M4_EVB
#define ARCH_ARM
/* stm32f407-st-discovery feature */
#define BSP_USING_DMA
#define BSP_USING_GPIO
#define PIN_BUS_NAME "pin"
#define PIN_DRIVER_NAME "pin_drv"
#define PIN_DEVICE_NAME "pin_dev"
#define BSP_USING_UART
#define BSP_USING_USART1
#define SERIAL_BUS_NAME_1 "usart1"
#define SERIAL_DRV_NAME_1 "usart1_drv"
#define SERIAL_1_DEVICE_NAME_0 "usart1_dev1"
#define BSP_USING_USART2
#define SERIAL_BUS_NAME_2 "usart2"
#define SERIAL_DRV_NAME_2 "usart2_drv"
#define SERIAL_2_DEVICE_NAME_0 "usart2_dev2"
#define BSP_USING_USART3
#define SERIAL_BUS_NAME_3 "usart3"
#define SERIAL_DRV_NAME_3 "usart3_drv"
#define SERIAL_3_DEVICE_NAME_0 "usart3_dev3"
#define BSP_USING_WDT
#define WDT_BUS_NAME "wdt"
#define WDT_DRIVER_NAME "wdt_drv"
#define WDT_DEVICE_NAME "wdt_dev"
/* config default board resources */
/* config board app name */
#define BOARD_APP_NAME "/XiUOS_cortex-m4-emulator_app.bin"
/* config board service table */
#define SERVICE_TABLE_ADDRESS 0x20000000
/* config hardware resources for connection */
/* Hardware feature */
#define RESOURCES_SERIAL
#define SERIAL_USING_DMA
#define SERIAL_RB_BUFSZ 128
#define RESOURCES_PIN
#define RESOURCES_WDT
/* Kernel feature */
/* separate compile(choose none for compile once) */
#define APP_STARTUP_FROM_FLASH
/* Memory Management */
#define MEM_ALIGN_SIZE 8
#define MM_PAGE_SIZE 4096
/* Using small memory allocator */
#define KERNEL_SMALL_MEM_ALLOC
#define SMALL_NUMBER_32B 64
#define SMALL_NUMBER_64B 32
/* Task feature */
#define USER_APPLICATION
/* Inter-Task communication */
#define KERNEL_SEMAPHORE
#define KERNEL_MUTEX
#define KERNEL_EVENT
#define KERNEL_MESSAGEQUEUE
#define KERNEL_SOFTTIMER
#define SCHED_POLICY_RR_REMAINSLICE
#define KTASK_PRIORITY_32
#define KTASK_PRIORITY_MAX 32
#define TICK_PER_SECOND 1000
#define KERNEL_STACK_OVERFLOW_CHECK
#define IDLE_KTASK_STACKSIZE 256
#define ZOMBIE_KTASK_STACKSIZE 2048
/* Kernel Console */
#define KERNEL_CONSOLE
#define KERNEL_BANNER
#define KERNEL_CONSOLEBUF_SIZE 128
/* Kernel Hook */
/* Command shell */
#define TOOL_SHELL
#define SHELL_ENTER_CR
#define SHELL_ENTER_LF
#define SHELL_ENTER_CR_AND_LF
/* Set shell user control */
#define SHELL_DEFAULT_USER "letter"
#define SHELL_DEFAULT_USER_PASSWORD ""
#define SHELL_LOCK_TIMEOUT 10000
/* Set shell config param */
#define SHELL_TASK_STACK_SIZE 4096
#define SHELL_TASK_PRIORITY 20
#define SHELL_MAX_NUMBER 5
#define SHELL_PARAMETER_MAX_NUMBER 8
#define SHELL_HISTORY_MAX_NUMBER 5
#define SHELL_PRINT_BUFFER 128
#define SHELL_HELP_SHOW_PERMISSION
/* Kernel data structure Manage */
#define KERNEL_QUEUEMANAGE
#define KERNEL_WORKQUEUE
#define WORKQUEUE_KTASK_STACKSIZE 512
#define WORKQUEUE_KTASK_PRIORITY 23
#define QUEUE_MAX 16
#define KERNEL_WAITQUEUE
#define KERNEL_DATAQUEUE
/* Kernel components init */
#define KERNEL_COMPONENTS_INIT
#define ENV_INIT_KTASK_STACK_SIZE 8192
#define KERNEL_USER_MAIN
#define NAME_NUM_MAX 32
/* hash table config */
#define ID_HTABLE_SIZE 16
#define ID_NUM_MAX 128
/* File system */
#define FS_VFS
#define VFS_USING_WORKDIR
#define FS_VFS_DEVFS
#define FS_VFS_FATFS
/* APP Framework */
/* Perception */
/* connection */
/* Intelligence */
/* Control */
/* Lib */
#define LIB
#define LIB_POSIX
/* C++ features */
#define LIB_NEWLIB
/* Security */
/* Applications */
/* config stack size and priority of main task */
#define MAIN_KTASK_STACK_SIZE 2048
#define MAIN_KTASK_PRIORITY 10
#endif

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#ifndef XS_CONFIG_H__
#define XS_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* XiUOS Project Configuration */
#define BOARD_CORTEX_M4_EVB
#define ARCH_ARM
/* stm32f407-st-discovery feature */
#define BSP_USING_DMA
#define BSP_USING_GPIO
#define PIN_BUS_NAME "pin"
#define PIN_DRIVER_NAME "pin_drv"
#define PIN_DEVICE_NAME "pin_dev"
#define BSP_USING_UART
#define BSP_USING_USART1
#define SERIAL_BUS_NAME_1 "usart1"
#define SERIAL_DRV_NAME_1 "usart1_drv"
#define SERIAL_1_DEVICE_NAME_0 "usart1_dev1"
#define BSP_USING_USART2
#define SERIAL_BUS_NAME_2 "usart2"
#define SERIAL_DRV_NAME_2 "usart2_drv"
#define SERIAL_2_DEVICE_NAME_0 "usart2_dev2"
#define BSP_USING_USART3
#define SERIAL_BUS_NAME_3 "usart3"
#define SERIAL_DRV_NAME_3 "usart3_drv"
#define SERIAL_3_DEVICE_NAME_0 "usart3_dev3"
#define BSP_USING_WDT
#define WDT_BUS_NAME "wdt"
#define WDT_DRIVER_NAME "wdt_drv"
#define WDT_DEVICE_NAME "wdt_dev"
/* config default board resources */
/* config board app name */
#define BOARD_APP_NAME "/XiUOS_cortex-m4-emulator_app.bin"
/* config board service table */
#define SERVICE_TABLE_ADDRESS 0x20000000
/* config hardware resources for connection */
/* Hardware feature */
#define RESOURCES_SERIAL
#define SERIAL_USING_DMA
#define SERIAL_RB_BUFSZ 128
#define RESOURCES_PIN
#define RESOURCES_WDT
/* Kernel feature */
/* separate compile(choose none for compile once) */
#define APP_STARTUP_FROM_FLASH
/* Memory Management */
#define MEM_ALIGN_SIZE 8
#define MM_PAGE_SIZE 4096
/* Using small memory allocator */
#define KERNEL_SMALL_MEM_ALLOC
#define SMALL_NUMBER_32B 64
#define SMALL_NUMBER_64B 32
/* Task feature */
#define USER_APPLICATION
/* Inter-Task communication */
#define KERNEL_SEMAPHORE
#define KERNEL_MUTEX
#define KERNEL_EVENT
#define KERNEL_MESSAGEQUEUE
#define KERNEL_SOFTTIMER
#define SCHED_POLICY_RR_REMAINSLICE
#define KTASK_PRIORITY_32
#define KTASK_PRIORITY_MAX 32
#define TICK_PER_SECOND 1000
#define KERNEL_STACK_OVERFLOW_CHECK
#define IDLE_KTASK_STACKSIZE 256
#define ZOMBIE_KTASK_STACKSIZE 2048
/* Kernel Console */
#define KERNEL_CONSOLE
#define KERNEL_BANNER
#define KERNEL_CONSOLEBUF_SIZE 128
/* Kernel Hook */
/* Command shell */
#define TOOL_SHELL
#define SHELL_ENTER_CR
#define SHELL_ENTER_LF
#define SHELL_ENTER_CR_AND_LF
/* Set shell user control */
#define SHELL_DEFAULT_USER "letter"
#define SHELL_DEFAULT_USER_PASSWORD ""
#define SHELL_LOCK_TIMEOUT 10000
/* Set shell config param */
#define SHELL_TASK_STACK_SIZE 4096
#define SHELL_TASK_PRIORITY 20
#define SHELL_MAX_NUMBER 5
#define SHELL_PARAMETER_MAX_NUMBER 8
#define SHELL_HISTORY_MAX_NUMBER 5
#define SHELL_PRINT_BUFFER 128
#define SHELL_HELP_SHOW_PERMISSION
/* Kernel data structure Manage */
#define KERNEL_QUEUEMANAGE
#define KERNEL_WORKQUEUE
#define WORKQUEUE_KTASK_STACKSIZE 512
#define WORKQUEUE_KTASK_PRIORITY 23
#define QUEUE_MAX 16
#define KERNEL_WAITQUEUE
#define KERNEL_DATAQUEUE
/* Kernel components init */
#define KERNEL_COMPONENTS_INIT
#define ENV_INIT_KTASK_STACK_SIZE 8192
#define KERNEL_USER_MAIN
#define NAME_NUM_MAX 32
/* hash table config */
#define ID_HTABLE_SIZE 16
#define ID_NUM_MAX 128
/* File system */
#define FS_VFS
#define VFS_USING_WORKDIR
#define FS_VFS_DEVFS
#define FS_VFS_FATFS
/* APP Framework */
/* Perception */
/* connection */
/* Intelligence */
/* Control */
/* Lib */
#define LIB
#define LIB_POSIX
/* C++ features */
#define LIB_NEWLIB
/* Security */
/* Applications */
/* config stack size and priority of main task */
#define MAIN_KTASK_STACK_SIZE 2048
#define MAIN_KTASK_PRIORITY 10
#endif

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#ifndef XS_CONFIG_H__
#define XS_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* XiUOS Project Configuration */
#define BOARD_CORTEX_M4_EVB
#define ARCH_ARM
/* BOARD_CORTEX_M4_EVB feature */
#define BSP_USING_DMA
#define BSP_USING_GPIO
#define PIN_BUS_NAME "pin"
#define PIN_DRIVER_NAME "pin_drv"
#define PIN_DEVICE_NAME "pin_dev"
#define BSP_USING_UART
#define BSP_USING_USART1
#define SERIAL_BUS_NAME_1 "usart1"
#define SERIAL_DRV_NAME_1 "usart1_drv"
#define SERIAL_1_DEVICE_NAME_0 "usart1_dev1"
#define BSP_USING_USART2
#define SERIAL_BUS_NAME_2 "usart2"
#define SERIAL_DRV_NAME_2 "usart2_drv"
#define SERIAL_2_DEVICE_NAME_0 "usart2_dev2"
#define BSP_USING_USART3
#define SERIAL_BUS_NAME_3 "usart3"
#define SERIAL_DRV_NAME_3 "usart3_drv"
#define SERIAL_3_DEVICE_NAME_0 "usart3_dev3"
#define BSP_USING_WDT
#define WDT_BUS_NAME "wdt"
#define WDT_DRIVER_NAME "wdt_drv"
#define WDT_DEVICE_NAME "wdt_dev"
/* config default board resources */
/* config board app name */
#define BOARD_APP_NAME "/XiUOS_cortex-m4-emulator_app.bin"
/* config board service table */
#define SERVICE_TABLE_ADDRESS 0x20000000
/* config hardware resources for connection */
/* Hardware feature */
#define RESOURCES_SERIAL
#define SERIAL_USING_DMA
#define SERIAL_RB_BUFSZ 128
#define RESOURCES_PIN
#define RESOURCES_WDT
/* Kernel feature */
/* separate compile(choose none for compile once) */
#define APP_STARTUP_FROM_FLASH
/* Memory Management */
#define MEM_ALIGN_SIZE 8
#define MM_PAGE_SIZE 4096
/* Using small memory allocator */
#define KERNEL_SMALL_MEM_ALLOC
#define SMALL_NUMBER_32B 64
#define SMALL_NUMBER_64B 32
/* Task feature */
#define USER_APPLICATION
/* Inter-Task communication */
#define KERNEL_SEMAPHORE
#define KERNEL_MUTEX
#define KERNEL_EVENT
#define KERNEL_MESSAGEQUEUE
#define KERNEL_SOFTTIMER
#define SCHED_POLICY_RR_REMAINSLICE
#define KTASK_PRIORITY_32
#define KTASK_PRIORITY_MAX 32
#define TICK_PER_SECOND 1000
#define KERNEL_STACK_OVERFLOW_CHECK
#define IDLE_KTASK_STACKSIZE 256
#define ZOMBIE_KTASK_STACKSIZE 2048
/* Kernel Console */
#define KERNEL_CONSOLE
#define KERNEL_BANNER
#define KERNEL_CONSOLEBUF_SIZE 128
/* Kernel Hook */
/* Command shell */
#define TOOL_SHELL
#define SHELL_ENTER_CR
#define SHELL_ENTER_LF
#define SHELL_ENTER_CR_AND_LF
/* Set shell user control */
#define SHELL_DEFAULT_USER "letter"
#define SHELL_DEFAULT_USER_PASSWORD ""
#define SHELL_LOCK_TIMEOUT 10000
/* Set shell config param */
#define SHELL_TASK_STACK_SIZE 4096
#define SHELL_TASK_PRIORITY 20
#define SHELL_MAX_NUMBER 5
#define SHELL_PARAMETER_MAX_NUMBER 8
#define SHELL_HISTORY_MAX_NUMBER 5
#define SHELL_PRINT_BUFFER 128
#define SHELL_HELP_SHOW_PERMISSION
/* Kernel data structure Manage */
#define KERNEL_QUEUEMANAGE
#define KERNEL_WORKQUEUE
#define WORKQUEUE_KTASK_STACKSIZE 512
#define WORKQUEUE_KTASK_PRIORITY 23
#define QUEUE_MAX 16
#define KERNEL_WAITQUEUE
#define KERNEL_DATAQUEUE
/* Kernel components init */
#define KERNEL_COMPONENTS_INIT
#define ENV_INIT_KTASK_STACK_SIZE 8192
#define KERNEL_USER_MAIN
#define NAME_NUM_MAX 32
/* hash table config */
#define ID_HTABLE_SIZE 16
#define ID_NUM_MAX 128
/* File system */
#define FS_VFS
#define VFS_USING_WORKDIR
#define FS_VFS_DEVFS
#define FS_VFS_FATFS
/* APP Framework */
/* Perception */
/* connection */
/* Intelligence */
/* Control */
/* Lib */
#define LIB
#define LIB_POSIX
/* C++ features */
#define LIB_NEWLIB
/* Security */
/* Applications */
/* config stack size and priority of main task */
#define MAIN_KTASK_STACK_SIZE 2048
#define MAIN_KTASK_PRIORITY 10
#endif

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#ifndef XS_CONFIG_H__
#define XS_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* XiUOS Project Configuration */
#define BOARD_CORTEX_M4_EVB
#define ARCH_ARM
/* BOARD_CORTEX_M4_EVB feature */
#define BSP_USING_DMA
#define BSP_USING_GPIO
#define PIN_BUS_NAME "pin"
#define PIN_DRIVER_NAME "pin_drv"
#define PIN_DEVICE_NAME "pin_dev"
#define BSP_USING_UART
#define BSP_USING_USART1
#define SERIAL_BUS_NAME_1 "usart1"
#define SERIAL_DRV_NAME_1 "usart1_drv"
#define SERIAL_1_DEVICE_NAME_0 "usart1_dev1"
#define BSP_USING_USART2
#define SERIAL_BUS_NAME_2 "usart2"
#define SERIAL_DRV_NAME_2 "usart2_drv"
#define SERIAL_2_DEVICE_NAME_0 "usart2_dev2"
#define BSP_USING_USART3
#define SERIAL_BUS_NAME_3 "usart3"
#define SERIAL_DRV_NAME_3 "usart3_drv"
#define SERIAL_3_DEVICE_NAME_0 "usart3_dev3"
#define BSP_USING_WDT
#define WDT_BUS_NAME "wdt"
#define WDT_DRIVER_NAME "wdt_drv"
#define WDT_DEVICE_NAME "wdt_dev"
/* config default board resources */
/* config board app name */
#define BOARD_APP_NAME "/XiUOS_cortex-m4-emulator_app.bin"
/* config board service table */
#define SERVICE_TABLE_ADDRESS 0x20000000
/* config hardware resources for connection */
/* Hardware feature */
#define RESOURCES_SERIAL
#define SERIAL_USING_DMA
#define SERIAL_RB_BUFSZ 128
#define RESOURCES_PIN
#define RESOURCES_WDT
/* Kernel feature */
/* separate compile(choose none for compile once) */
#define APP_STARTUP_FROM_FLASH
/* Memory Management */
#define MEM_ALIGN_SIZE 8
#define MM_PAGE_SIZE 4096
/* Using small memory allocator */
#define KERNEL_SMALL_MEM_ALLOC
#define SMALL_NUMBER_32B 64
#define SMALL_NUMBER_64B 32
/* Task feature */
#define USER_APPLICATION
/* Inter-Task communication */
#define KERNEL_SEMAPHORE
#define KERNEL_MUTEX
#define KERNEL_EVENT
#define KERNEL_MESSAGEQUEUE
#define KERNEL_SOFTTIMER
#define SCHED_POLICY_RR_REMAINSLICE
#define KTASK_PRIORITY_32
#define KTASK_PRIORITY_MAX 32
#define TICK_PER_SECOND 1000
#define KERNEL_STACK_OVERFLOW_CHECK
#define IDLE_KTASK_STACKSIZE 256
#define ZOMBIE_KTASK_STACKSIZE 2048
/* Kernel Console */
#define KERNEL_CONSOLE
#define KERNEL_BANNER
#define KERNEL_CONSOLEBUF_SIZE 128
/* Kernel Hook */
/* Command shell */
#define TOOL_SHELL
#define SHELL_ENTER_CR
#define SHELL_ENTER_LF
#define SHELL_ENTER_CR_AND_LF
/* Set shell user control */
#define SHELL_DEFAULT_USER "letter"
#define SHELL_DEFAULT_USER_PASSWORD ""
#define SHELL_LOCK_TIMEOUT 10000
/* Set shell config param */
#define SHELL_TASK_STACK_SIZE 4096
#define SHELL_TASK_PRIORITY 20
#define SHELL_MAX_NUMBER 5
#define SHELL_PARAMETER_MAX_NUMBER 8
#define SHELL_HISTORY_MAX_NUMBER 5
#define SHELL_PRINT_BUFFER 128
#define SHELL_HELP_SHOW_PERMISSION
/* Kernel data structure Manage */
#define KERNEL_QUEUEMANAGE
#define KERNEL_WORKQUEUE
#define WORKQUEUE_KTASK_STACKSIZE 512
#define WORKQUEUE_KTASK_PRIORITY 23
#define QUEUE_MAX 16
#define KERNEL_WAITQUEUE
#define KERNEL_DATAQUEUE
/* Kernel components init */
#define KERNEL_COMPONENTS_INIT
#define ENV_INIT_KTASK_STACK_SIZE 8192
#define KERNEL_USER_MAIN
#define NAME_NUM_MAX 32
/* hash table config */
#define ID_HTABLE_SIZE 16
#define ID_NUM_MAX 128
/* File system */
#define FS_VFS
#define VFS_USING_WORKDIR
#define FS_VFS_DEVFS
#define FS_VFS_FATFS
/* APP Framework */
/* Perception */
/* connection */
/* Intelligence */
/* Control */
/* Lib */
#define LIB
#define LIB_POSIX
/* C++ features */
#define LIB_NEWLIB
/* Security */
/* Applications */
/* config stack size and priority of main task */
#define MAIN_KTASK_STACK_SIZE 2048
#define MAIN_KTASK_PRIORITY 10
#endif

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#ifndef XS_CONFIG_H__
#define XS_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* XiUOS Project Configuration */
#define BOARD_CORTEX_M4_EVB
#define ARCH_ARM
/* BOARD_CORTEX_M4_EVB feature */
#define BSP_USING_DMA
#define BSP_USING_GPIO
#define PIN_BUS_NAME "pin"
#define PIN_DRIVER_NAME "pin_drv"
#define PIN_DEVICE_NAME "pin_dev"
#define BSP_USING_UART
#define BSP_USING_USART1
#define SERIAL_BUS_NAME_1 "usart1"
#define SERIAL_DRV_NAME_1 "usart1_drv"
#define SERIAL_1_DEVICE_NAME_0 "usart1_dev1"
#define BSP_USING_USART2
#define SERIAL_BUS_NAME_2 "usart2"
#define SERIAL_DRV_NAME_2 "usart2_drv"
#define SERIAL_2_DEVICE_NAME_0 "usart2_dev2"
#define BSP_USING_USART3
#define SERIAL_BUS_NAME_3 "usart3"
#define SERIAL_DRV_NAME_3 "usart3_drv"
#define SERIAL_3_DEVICE_NAME_0 "usart3_dev3"
#define BSP_USING_WDT
#define WDT_BUS_NAME "wdt"
#define WDT_DRIVER_NAME "wdt_drv"
#define WDT_DEVICE_NAME "wdt_dev"
/* config default board resources */
/* config board app name */
#define BOARD_APP_NAME "/XiUOS_cortex-m4-emulator_app.bin"
/* config board service table */
#define SERVICE_TABLE_ADDRESS 0x20000000
/* config hardware resources for connection */
/* Hardware feature */
#define RESOURCES_SERIAL
#define SERIAL_USING_DMA
#define SERIAL_RB_BUFSZ 128
#define RESOURCES_PIN
#define RESOURCES_WDT
/* Kernel feature */
/* separate compile(choose none for compile once) */
#define APP_STARTUP_FROM_FLASH
/* Memory Management */
#define MEM_ALIGN_SIZE 8
#define MM_PAGE_SIZE 4096
/* Using small memory allocator */
#define KERNEL_SMALL_MEM_ALLOC
#define SMALL_NUMBER_32B 64
#define SMALL_NUMBER_64B 32
/* Task feature */
#define USER_APPLICATION
/* Inter-Task communication */
#define KERNEL_SEMAPHORE
#define KERNEL_MUTEX
#define KERNEL_EVENT
#define KERNEL_MESSAGEQUEUE
#define KERNEL_SOFTTIMER
#define SCHED_POLICY_RR_REMAINSLICE
#define KTASK_PRIORITY_32
#define KTASK_PRIORITY_MAX 32
#define TICK_PER_SECOND 1000
#define KERNEL_STACK_OVERFLOW_CHECK
#define IDLE_KTASK_STACKSIZE 256
#define ZOMBIE_KTASK_STACKSIZE 2048
/* Kernel Console */
#define KERNEL_CONSOLE
#define KERNEL_BANNER
#define KERNEL_CONSOLEBUF_SIZE 128
/* Kernel Hook */
/* Command shell */
#define TOOL_SHELL
#define SHELL_ENTER_CR
#define SHELL_ENTER_LF
#define SHELL_ENTER_CR_AND_LF
/* Set shell user control */
#define SHELL_DEFAULT_USER "letter"
#define SHELL_DEFAULT_USER_PASSWORD ""
#define SHELL_LOCK_TIMEOUT 10000
/* Set shell config param */
#define SHELL_TASK_STACK_SIZE 4096
#define SHELL_TASK_PRIORITY 20
#define SHELL_MAX_NUMBER 5
#define SHELL_PARAMETER_MAX_NUMBER 8
#define SHELL_HISTORY_MAX_NUMBER 5
#define SHELL_PRINT_BUFFER 128
#define SHELL_HELP_SHOW_PERMISSION
/* Kernel data structure Manage */
#define KERNEL_QUEUEMANAGE
#define KERNEL_WORKQUEUE
#define WORKQUEUE_KTASK_STACKSIZE 512
#define WORKQUEUE_KTASK_PRIORITY 23
#define QUEUE_MAX 16
#define KERNEL_WAITQUEUE
#define KERNEL_DATAQUEUE
/* Kernel components init */
#define KERNEL_COMPONENTS_INIT
#define ENV_INIT_KTASK_STACK_SIZE 8192
#define KERNEL_USER_MAIN
#define NAME_NUM_MAX 32
/* hash table config */
#define ID_HTABLE_SIZE 16
#define ID_NUM_MAX 128
/* File system */
#define FS_VFS
#define VFS_USING_WORKDIR
#define FS_VFS_DEVFS
#define FS_VFS_FATFS
/* APP Framework */
/* Perception */
/* connection */
/* Intelligence */
/* Control */
/* Lib */
#define LIB
#define LIB_POSIX
/* C++ features */
#define LIB_NEWLIB
/* Security */
/* Applications */
/* config stack size and priority of main task */
#define MAIN_KTASK_STACK_SIZE 2048
#define MAIN_KTASK_PRIORITY 10
#endif

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#ifndef XS_CONFIG_H__
#define XS_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* XiUOS Project Configuration */
#define BOARD_CORTEX_M4_EVB
#define ARCH_ARM
/* BOARD_CORTEX_M4_EVB feature */
#define BSP_USING_DMA
#define BSP_USING_GPIO
#define PIN_BUS_NAME "pin"
#define PIN_DRIVER_NAME "pin_drv"
#define PIN_DEVICE_NAME "pin_dev"
#define BSP_USING_UART
#define BSP_USING_USART1
#define SERIAL_BUS_NAME_1 "usart1"
#define SERIAL_DRV_NAME_1 "usart1_drv"
#define SERIAL_1_DEVICE_NAME_0 "usart1_dev1"
#define BSP_USING_USART2
#define SERIAL_BUS_NAME_2 "usart2"
#define SERIAL_DRV_NAME_2 "usart2_drv"
#define SERIAL_2_DEVICE_NAME_0 "usart2_dev2"
#define BSP_USING_USART3
#define SERIAL_BUS_NAME_3 "usart3"
#define SERIAL_DRV_NAME_3 "usart3_drv"
#define SERIAL_3_DEVICE_NAME_0 "usart3_dev3"
#define BSP_USING_WDT
#define WDT_BUS_NAME "wdt"
#define WDT_DRIVER_NAME "wdt_drv"
#define WDT_DEVICE_NAME "wdt_dev"
/* config default board resources */
/* config board app name */
#define BOARD_APP_NAME "/XiUOS_cortex-m4-emulator_app.bin"
/* config board service table */
#define SERVICE_TABLE_ADDRESS 0x20000000
/* config hardware resources for connection */
/* Hardware feature */
#define RESOURCES_SERIAL
#define SERIAL_USING_DMA
#define SERIAL_RB_BUFSZ 128
#define RESOURCES_PIN
#define RESOURCES_WDT
/* Kernel feature */
/* separate compile(choose none for compile once) */
#define APP_STARTUP_FROM_FLASH
/* Memory Management */
#define MEM_ALIGN_SIZE 8
#define MM_PAGE_SIZE 4096
/* Using small memory allocator */
#define KERNEL_SMALL_MEM_ALLOC
#define SMALL_NUMBER_32B 64
#define SMALL_NUMBER_64B 32
/* Task feature */
#define USER_APPLICATION
/* Inter-Task communication */
#define KERNEL_SEMAPHORE
#define KERNEL_MUTEX
#define KERNEL_EVENT
#define KERNEL_MESSAGEQUEUE
#define KERNEL_SOFTTIMER
#define SCHED_POLICY_RR_REMAINSLICE
#define KTASK_PRIORITY_32
#define KTASK_PRIORITY_MAX 32
#define TICK_PER_SECOND 1000
#define KERNEL_STACK_OVERFLOW_CHECK
#define IDLE_KTASK_STACKSIZE 256
#define ZOMBIE_KTASK_STACKSIZE 2048
/* Kernel Console */
#define KERNEL_CONSOLE
#define KERNEL_BANNER
#define KERNEL_CONSOLEBUF_SIZE 128
/* Kernel Hook */
/* Command shell */
#define TOOL_SHELL
#define SHELL_ENTER_CR
#define SHELL_ENTER_LF
#define SHELL_ENTER_CR_AND_LF
/* Set shell user control */
#define SHELL_DEFAULT_USER "letter"
#define SHELL_DEFAULT_USER_PASSWORD ""
#define SHELL_LOCK_TIMEOUT 10000
/* Set shell config param */
#define SHELL_TASK_STACK_SIZE 4096
#define SHELL_TASK_PRIORITY 20
#define SHELL_MAX_NUMBER 5
#define SHELL_PARAMETER_MAX_NUMBER 8
#define SHELL_HISTORY_MAX_NUMBER 5
#define SHELL_PRINT_BUFFER 128
#define SHELL_HELP_SHOW_PERMISSION
/* Kernel data structure Manage */
#define KERNEL_QUEUEMANAGE
#define KERNEL_WORKQUEUE
#define WORKQUEUE_KTASK_STACKSIZE 512
#define WORKQUEUE_KTASK_PRIORITY 23
#define QUEUE_MAX 16
#define KERNEL_WAITQUEUE
#define KERNEL_DATAQUEUE
/* Kernel components init */
#define KERNEL_COMPONENTS_INIT
#define ENV_INIT_KTASK_STACK_SIZE 8192
#define KERNEL_USER_MAIN
#define NAME_NUM_MAX 32
/* hash table config */
#define ID_HTABLE_SIZE 16
#define ID_NUM_MAX 128
/* File system */
#define FS_VFS
#define VFS_USING_WORKDIR
#define FS_VFS_DEVFS
#define FS_VFS_FATFS
/* APP Framework */
/* Perception */
/* connection */
/* Intelligence */
/* Control */
/* Lib */
#define LIB
#define LIB_POSIX
/* C++ features */
#define LIB_NEWLIB
/* Security */
/* Applications */
/* config stack size and priority of main task */
#define MAIN_KTASK_STACK_SIZE 2048
#define MAIN_KTASK_PRIORITY 10
#endif

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#ifndef XS_CONFIG_H__
#define XS_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* XiUOS Project Configuration */
#define BOARD_CORTEX_M4_EVB
#define ARCH_ARM
/* BOARD_CORTEX_M4_EVB feature */
#define BSP_USING_DMA
#define BSP_USING_GPIO
#define PIN_BUS_NAME "pin"
#define PIN_DRIVER_NAME "pin_drv"
#define PIN_DEVICE_NAME "pin_dev"
#define BSP_USING_UART
#define BSP_USING_USART1
#define SERIAL_BUS_NAME_1 "usart1"
#define SERIAL_DRV_NAME_1 "usart1_drv"
#define SERIAL_1_DEVICE_NAME_0 "usart1_dev1"
#define BSP_USING_USART2
#define SERIAL_BUS_NAME_2 "usart2"
#define SERIAL_DRV_NAME_2 "usart2_drv"
#define SERIAL_2_DEVICE_NAME_0 "usart2_dev2"
#define BSP_USING_USART3
#define SERIAL_BUS_NAME_3 "usart3"
#define SERIAL_DRV_NAME_3 "usart3_drv"
#define SERIAL_3_DEVICE_NAME_0 "usart3_dev3"
#define BSP_USING_WDT
#define WDT_BUS_NAME "wdt"
#define WDT_DRIVER_NAME "wdt_drv"
#define WDT_DEVICE_NAME "wdt_dev"
/* config default board resources */
/* config board app name */
#define BOARD_APP_NAME "/XiUOS_cortex-m4-emulator_app.bin"
/* config board service table */
#define SERVICE_TABLE_ADDRESS 0x20000000
/* config hardware resources for connection */
/* Hardware feature */
#define RESOURCES_SERIAL
#define SERIAL_USING_DMA
#define SERIAL_RB_BUFSZ 128
#define RESOURCES_PIN
#define RESOURCES_WDT
/* Kernel feature */
/* separate compile(choose none for compile once) */
#define APP_STARTUP_FROM_FLASH
/* Memory Management */
#define MEM_ALIGN_SIZE 8
#define MM_PAGE_SIZE 4096
/* Using small memory allocator */
#define KERNEL_SMALL_MEM_ALLOC
#define SMALL_NUMBER_32B 64
#define SMALL_NUMBER_64B 32
/* Task feature */
#define USER_APPLICATION
/* Inter-Task communication */
#define KERNEL_SEMAPHORE
#define KERNEL_MUTEX
#define KERNEL_EVENT
#define KERNEL_MESSAGEQUEUE
#define KERNEL_SOFTTIMER
#define SCHED_POLICY_RR_REMAINSLICE
#define KTASK_PRIORITY_32
#define KTASK_PRIORITY_MAX 32
#define TICK_PER_SECOND 1000
#define KERNEL_STACK_OVERFLOW_CHECK
#define IDLE_KTASK_STACKSIZE 256
#define ZOMBIE_KTASK_STACKSIZE 2048
/* Kernel Console */
#define KERNEL_CONSOLE
#define KERNEL_BANNER
#define KERNEL_CONSOLEBUF_SIZE 128
/* Kernel Hook */
/* Command shell */
#define TOOL_SHELL
#define SHELL_ENTER_CR
#define SHELL_ENTER_LF
#define SHELL_ENTER_CR_AND_LF
/* Set shell user control */
#define SHELL_DEFAULT_USER "letter"
#define SHELL_DEFAULT_USER_PASSWORD ""
#define SHELL_LOCK_TIMEOUT 10000
/* Set shell config param */
#define SHELL_TASK_STACK_SIZE 4096
#define SHELL_TASK_PRIORITY 20
#define SHELL_MAX_NUMBER 5
#define SHELL_PARAMETER_MAX_NUMBER 8
#define SHELL_HISTORY_MAX_NUMBER 5
#define SHELL_PRINT_BUFFER 128
#define SHELL_HELP_SHOW_PERMISSION
/* Kernel data structure Manage */
#define KERNEL_QUEUEMANAGE
#define KERNEL_WORKQUEUE
#define WORKQUEUE_KTASK_STACKSIZE 512
#define WORKQUEUE_KTASK_PRIORITY 23
#define QUEUE_MAX 16
#define KERNEL_WAITQUEUE
#define KERNEL_DATAQUEUE
/* Kernel components init */
#define KERNEL_COMPONENTS_INIT
#define ENV_INIT_KTASK_STACK_SIZE 8192
#define KERNEL_USER_MAIN
#define NAME_NUM_MAX 32
/* hash table config */
#define ID_HTABLE_SIZE 16
#define ID_NUM_MAX 128
/* File system */
#define FS_VFS
#define VFS_USING_WORKDIR
#define FS_VFS_DEVFS
#define FS_VFS_FATFS
/* APP Framework */
/* Perception */
/* connection */
/* Intelligence */
/* Control */
/* Lib */
#define LIB
#define LIB_POSIX
/* C++ features */
#define LIB_NEWLIB
/* Security */
/* Applications */
/* config stack size and priority of main task */
#define MAIN_KTASK_STACK_SIZE 2048
#define MAIN_KTASK_PRIORITY 10
#endif

185
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#ifndef XS_CONFIG_H__
#define XS_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* XiUOS Project Configuration */
#define BOARD_CORTEX_M4_EVB
#define ARCH_ARM
/* BOARD_CORTEX_M4_EVB feature */
#define BSP_USING_DMA
#define BSP_USING_GPIO
#define PIN_BUS_NAME "pin"
#define PIN_DRIVER_NAME "pin_drv"
#define PIN_DEVICE_NAME "pin_dev"
#define BSP_USING_UART
#define BSP_USING_USART1
#define SERIAL_BUS_NAME_1 "usart1"
#define SERIAL_DRV_NAME_1 "usart1_drv"
#define SERIAL_1_DEVICE_NAME_0 "usart1_dev1"
#define BSP_USING_USART2
#define SERIAL_BUS_NAME_2 "usart2"
#define SERIAL_DRV_NAME_2 "usart2_drv"
#define SERIAL_2_DEVICE_NAME_0 "usart2_dev2"
#define BSP_USING_USART3
#define SERIAL_BUS_NAME_3 "usart3"
#define SERIAL_DRV_NAME_3 "usart3_drv"
#define SERIAL_3_DEVICE_NAME_0 "usart3_dev3"
#define BSP_USING_WDT
#define WDT_BUS_NAME "wdt"
#define WDT_DRIVER_NAME "wdt_drv"
#define WDT_DEVICE_NAME "wdt_dev"
/* config default board resources */
/* config board app name */
#define BOARD_APP_NAME "/XiUOS_cortex-m4-emulator_app.bin"
/* config board service table */
#define SERVICE_TABLE_ADDRESS 0x20000000
/* config hardware resources for connection */
/* Hardware feature */
#define RESOURCES_SERIAL
#define SERIAL_USING_DMA
#define SERIAL_RB_BUFSZ 128
#define RESOURCES_PIN
#define RESOURCES_WDT
/* Kernel feature */
/* separate compile(choose none for compile once) */
#define APP_STARTUP_FROM_FLASH
/* Memory Management */
#define MEM_ALIGN_SIZE 8
#define MM_PAGE_SIZE 4096
/* Using small memory allocator */
#define KERNEL_SMALL_MEM_ALLOC
#define SMALL_NUMBER_32B 64
#define SMALL_NUMBER_64B 32
/* Task feature */
#define USER_APPLICATION
/* Inter-Task communication */
#define KERNEL_SEMAPHORE
#define KERNEL_MUTEX
#define KERNEL_EVENT
#define KERNEL_MESSAGEQUEUE
#define KERNEL_SOFTTIMER
#define SCHED_POLICY_RR_REMAINSLICE
#define KTASK_PRIORITY_32
#define KTASK_PRIORITY_MAX 32
#define TICK_PER_SECOND 1000
#define KERNEL_STACK_OVERFLOW_CHECK
#define IDLE_KTASK_STACKSIZE 256
#define ZOMBIE_KTASK_STACKSIZE 2048
/* Kernel Console */
#define KERNEL_CONSOLE
#define KERNEL_BANNER
#define KERNEL_CONSOLEBUF_SIZE 128
/* Kernel Hook */
/* Command shell */
#define TOOL_SHELL
#define SHELL_ENTER_CR
#define SHELL_ENTER_LF
#define SHELL_ENTER_CR_AND_LF
/* Set shell user control */
#define SHELL_DEFAULT_USER "letter"
#define SHELL_DEFAULT_USER_PASSWORD ""
#define SHELL_LOCK_TIMEOUT 10000
/* Set shell config param */
#define SHELL_TASK_STACK_SIZE 4096
#define SHELL_TASK_PRIORITY 20
#define SHELL_MAX_NUMBER 5
#define SHELL_PARAMETER_MAX_NUMBER 8
#define SHELL_HISTORY_MAX_NUMBER 5
#define SHELL_PRINT_BUFFER 128
#define SHELL_HELP_SHOW_PERMISSION
/* Kernel data structure Manage */
#define KERNEL_QUEUEMANAGE
#define KERNEL_WORKQUEUE
#define WORKQUEUE_KTASK_STACKSIZE 512
#define WORKQUEUE_KTASK_PRIORITY 23
#define QUEUE_MAX 16
#define KERNEL_WAITQUEUE
#define KERNEL_DATAQUEUE
/* Kernel components init */
#define KERNEL_COMPONENTS_INIT
#define ENV_INIT_KTASK_STACK_SIZE 8192
#define KERNEL_USER_MAIN
#define NAME_NUM_MAX 32
/* hash table config */
#define ID_HTABLE_SIZE 16
#define ID_NUM_MAX 128
/* File system */
#define FS_VFS
#define VFS_USING_WORKDIR
#define FS_VFS_DEVFS
#define FS_VFS_FATFS
/* APP Framework */
/* Perception */
/* connection */
/* Intelligence */
/* Control */
/* Lib */
#define LIB
#define LIB_POSIX
/* C++ features */
#define LIB_NEWLIB
/* Security */
/* Applications */
/* config stack size and priority of main task */
#define MAIN_KTASK_STACK_SIZE 2048
#define MAIN_KTASK_PRIORITY 10
#endif

59
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mainmenu "XiUOS Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config KERNEL_DIR
string
option env="KERNEL_ROOT"
default "../.."
config BOARD_CORTEX_M4_EVB
bool
select ARCH_ARM
default y
source "$KERNEL_DIR/arch/Kconfig"
menu "cortex-m4-emulator feature"
source "$BSP_DIR/third_party_driver/Kconfig"
menu "config default board resources"
menu "config board app name"
config BOARD_APP_NAME
string "config board app name"
default "/XiUOS_cortex-m4-emulator_app.bin"
endmenu
menu "config board service table"
config SERVICE_TABLE_ADDRESS
hex "board service table address"
default 0x20000000
endmenu
menu "config hardware resources for connection"
if CONNECTION_COMMUNICATION_ETHERNET
config ETHERNET_UART_NAME
string "ethernet uart name"
default "/dev/usart3_dev3"
endif
if CONNECTION_COMMUNICATION_WIFI
config WIFI_UART_NAME
string "wifi uart name"
default "/dev/usart3_dev3"
endif
endmenu
endmenu
endmenu
menu "Hardware feature"
source "$KERNEL_DIR/resources/Kconfig"
endmenu
source "$KERNEL_DIR/Kconfig"

8
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SRC_FILES := board.c
SRC_DIR := third_party_driver
include $(KERNEL_ROOT)/compiler.mk

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# 从零开始构建矽璓工业物联操作系统：使用ARM架构的cortex-m4 emulator
[XiUOS](http://xuos.io/) (X Industrial Ubiquitous Operating System) 矽璓XiUOS是一款面向智慧车间的工业物联网操作系统，主要由一个极简的微型实时操作系统内核和其上的工业物联框架构成，通过高效管理工业物联网设备、支撑工业物联应用，在生产车间内实现智能化的“感知环境、联网传输、知悉识别、控制调整”，促进以工业设备和工业控制系统为核心的人、机、物深度互联，帮助提升生产线的数字化和智能化水平。
## 1. 简介
Q‎EMU 是一个通用的开源模拟器和虚拟化工具。目前Q‎EMU已经可以较完整的支持ARM cortex-m4架构。XiUOS同样支持运行在Q‎EMU上
| 硬件 | 描述 |
| -------- | ------------- |
| 芯片型号 | netduinoplus2 |
| 架构 | cortex-m4 |
| 主频 | 168MHz |
| 片内SRAM | 100+KB |
| 外设支持 | UART、GPIO |
## 2. 开发环境搭建
### 推荐使用：
**操作系统：** ubuntu18.04 [https://ubuntu.com/download/desktop](https://ubuntu.com/download/desktop)
更新`ubuntu 18.04`源的方法:（根据自身情况而定，可以不更改）
第一步:打开sources.list文件
```c
sudo vim /etc/apt/sources.list
```
第二步:将以下内容复制到sources.list文件
```c
deb http://mirrors.aliyun.com/ubuntu/ bionic main restricted universe multiverse
deb http://mirrors.aliyun.com/ubuntu/ bionic-security main restricted universe multiverse
deb http://mirrors.aliyun.com/ubuntu/ bionic-updates main restricted universe multiverse
deb http://mirrors.aliyun.com/ubuntu/ bionic-proposed main restricted universe multiverse
deb http://mirrors.aliyun.com/ubuntu/ bionic-backports main restricted universe multiverse
deb-src http://mirrors.aliyun.com/ubuntu/ bionic main restricted universe multiverse
deb-src http://mirrors.aliyun.com/ubuntu/ bionic-security main restricted universe multiverse
deb-src http://mirrors.aliyun.com/ubuntu/ bionic-updates main restricted universe multiverse
deb-src http://mirrors.aliyun.com/ubuntu/ bionic-proposed main restricted universe multiverse
deb-src http://mirrors.aliyun.com/ubuntu/ bionic-backports main restricted universe multiverse
```
第三步:更新源和系统软件
```c
sudo apt-get update
sudo apt-get upgrade
```
**开发工具推荐使用 VSCode ，VScode下载地址为：** VSCode [https://code.visualstudio.com/](https://code.visualstudio.com/)，推荐下载地址为 [http://vscode.cdn.azure.cn/stable/3c4e3df9e89829dce27b7b5c24508306b151f30d/code_1.55.2-1618307277_amd64.deb](http://vscode.cdn.azure.cn/stable/3c4e3df9e89829dce27b7b5c24508306b151f30d/code_1.55.2-1618307277_amd64.deb)
### 依赖包安装：
```
$ sudo apt install build-essential pkg-config git
$ sudo apt install gcc make libncurses5-dev openssl libssl-dev bison flex libelf-dev autoconf libtool gperf libc6-dev
```
**XiUOS操作系统源码下载：** XiUOS [https://forgeplus.trustie.net/projects/xuos/xiuos](https://forgeplus.trustie.net/projects/xuos/xiuos)
新建一个空文件夹并进入文件夹中，并下载源码，具体命令如下：
```c
mkdir test && cd test
git clone https://git.trustie.net/xuos/xiuos.git
```
打开源码文件包可以看到以下目录：
| 名称 | 说明 |
| ----------- | ---------- |
| application | 应用代码 |
| board | 板级支持包 |
| framework | 应用框架 |
| fs | 文件系统 |
| kernel | 内核源码 |
| resources | 驱动文件 |
| tool | 系统工具 |
使用VScode打开代码，具体操作步骤为：在源码文件夹下打开系统终端，输入`code .`即可打开VScode开发环境，如下图所示：
<div align= "center">
<img src = img/vscode.jpg width =1000>
</div>
### 裁减配置工具的下载
裁减配置工具：
**工具地址：** kconfig-frontends [https://forgeplus.trustie.net/projects/xuos/kconfig-frontends](https://forgeplus.trustie.net/projects/xuos/kconfig-frontends)，下载与安装的具体命令如下：
```c
mkdir kfrontends && cd kfrontends
git clone https://git.trustie.net/xuos/kconfig-frontends.git
```
下载源码后按以下步骤执行软件安装：
```c
cd kconfig-frontends
./xs_build.sh
```
### 编译工具链：
ARM： arm-none-eabi(`gcc version 6.3.1`)，默认安装到Ubuntu的/usr/bin/arm-none-eabi-，使用如下命令行下载和安装。
```shell
$ sudo apt install gcc-arm-none-eabi
```
## 3. 编译说明
### 编辑环境：`Ubuntu18.04`
### 编译工具链：`arm-none-eabi-gcc`
使用`VScode`打开工程的方法有多种，本文介绍一种快捷键，在项目目录下将`code .`输入linux系统命令终端即可打开目标项目
编译步骤：
1.在VScode命令终端中执行以下命令，生成配置文件
```c
make BOARD=cortex-m4-emulator menuconfig
```
2.在menuconfig界面配置需要关闭和开启的功能，按回车键进入下级菜单，按Y键选中需要开启的功能，按N键选中需要关闭的功能，配置结束后保存并退出（本例旨在演示简单的输出例程，所以没有需要配置的选项，双击快捷键ESC退出配置）
<div align= "center">
<img src = img/menuconfig.png width =1000>
</div>
退出时选择`yes`保存上面所配置的内容，如下图所示：
<div align= "center">
<img src = img/menuconfig1.png width =1000>
</div>
3.继续执行以下命令，进行编译
```
make BOARD=cortex-m4-emulator
```
4.如果编译正确无误，会产生XiUOS_cortex-m4-emulator.elf、XiUOS_cortex-m4-emulator.bin文件。
## 4. 运行
### 4.1 安装Q‎EMU
```
sudo apt install qemu-system-arm
```
### 4.2 运行结果
通过以下命令启动Q‎EMU并加载XiUOS ELF文件
```
qemu-system-arm -machine netduinoplus2 -nographic -kernel build/XiUOS_cortex-m4-emulator.elf
```
QEMU运行起来后将会在终端上看到信息打印输出
<div align= "center">
<img src = img/terminal.png width =1000>
</div>
### 4.3 调试
通过Q‎EMU可以方便的对XiUOS进行调试，首先安装gdb调试工具
```
sudo apt install gdb-multiarch
```
并通过以下命令启动Q‎EMU
```
qemu-system-arm -machine netduinoplus2 -nographic -kernel build/XiUOS_cortex-m4-emulator.elf -s -S
```
然后要重新开启另一个linux系统终端一个终端，执行`riscv-none-embed-gdb`命令
```
gdb-multiarch build/XiUOS_cortex-m4-emulator.elf -ex "target remote localhost:1234"
```

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/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file board.c
* @brief support cortex-m4-emulator-board init configure and start-up
* @version 1.0
* @author fudan
* @date 2021-08-26
*/
/*************************************************
File name: board.c
Description: support cortex-m4-emulator-board init configure and driver/task/... init
Others:
History:
1. Date: 2021-04-25
Author: AIIT XUOS Lab
Modification:
1. support cortex-m4-emulator-board InitBoardHardware
*************************************************/
#include <xiuos.h>
#include "hardware_rcc.h"
#include "board.h"
#include "connect_usart.h"
#include "misc.h"
#include <xs_service.h>
static void ClockConfiguration()
{
int cr,cfgr,pllcfgr;
int cr1,cfgr1,pllcfgr1;
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
PWR->CR |= PWR_CR_VOS;
RCC_HSEConfig(RCC_HSE_ON);
if (RCC_WaitForHSEStartUp() == SUCCESS)
{
RCC_HCLKConfig(RCC_SYSCLK_Div1);
RCC_PCLK2Config(RCC_HCLK_Div2);
RCC_PCLK1Config(RCC_HCLK_Div4);
RCC_PLLConfig(RCC_PLLSource_HSE, 8, 336, 2, 7);
RCC_PLLCmd(ENABLE);
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS;
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
}
SystemCoreClockUpdate();
}
void NVIC_Configuration(void)
{
#ifdef VECT_TAB_RAM
NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
#else
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
#endif
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
}
void SysTickConfiguration(void)
{
RCC_ClocksTypeDef rcc_clocks;
uint32 cnts;
RCC_GetClocksFreq(&rcc_clocks);
cnts = (uint32)rcc_clocks.HCLK_Frequency / TICK_PER_SECOND;
cnts = cnts / 8;
SysTick_Config(cnts);
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8);
}
void SysTick_Handler(int irqn, void *arg)
{
TickAndTaskTimesliceUpdate();
}
DECLARE_HW_IRQ(SysTick_IRQn, SysTick_Handler, NONE);
void InitBoardHardware()
{
int i = 0;
int ret = 0;
ClockConfiguration();
NVIC_Configuration();
SysTickConfiguration();
#ifdef BSP_USING_UART
Stm32HwUsartInit();
#endif
#ifdef KERNEL_CONSOLE
InstallConsole(KERNEL_CONSOLE_BUS_NAME, KERNEL_CONSOLE_DRV_NAME, KERNEL_CONSOLE_DEVICE_NAME);
RCC_ClocksTypeDef rcc_clocks;
RCC_GetClocksFreq(&rcc_clocks);
KPrintf("HCLK_Frequency %d, PCLK1_Frequency %d, PCLK2_Frequency %d, SYSCLK_Frequency %d\n", rcc_clocks.HCLK_Frequency, rcc_clocks.PCLK1_Frequency, rcc_clocks.PCLK2_Frequency, rcc_clocks.SYSCLK_Frequency);
KPrintf("\nconsole init completed.\n");
KPrintf("board initialization......\n");
#endif
InitBoardMemory((void*)MEMORY_START_ADDRESS, (void*)MEMORY_END_ADDRESS);
}

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/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file board.h
* @brief define cortex-m4-emulator-board init configure and start-up function
* @version 1.0
* @author AIIT fudan Lab
* @date 2021-04-25
*/
/*************************************************
File name: board.h
Description: define cortex-m4-emulator-board board init function and struct
Others:
History:
1. Date: 2021-08-25
Author: AIIT fudan Lab
Modification:
1. define cortex-m4-emulator-board InitBoardHardware
2. define cortex-m4-emulator-board data and bss struct
*************************************************/
#ifndef BOARD_H
#define BOARD_H
#include <stdint.h>
extern int __stack_end__;
extern unsigned int g_service_table_start;
extern unsigned int g_service_table_end;
#define SURPORT_MPU
#define MEMORY_START_ADDRESS (&__stack_end__)
#define MEM_OFFSET 128
#define MEMORY_END_ADDRESS (0x20000000 + MEM_OFFSET * 1024)
#ifdef SEPARATE_COMPILE
typedef int (*main_t)(int argc, char *argv[]);
typedef void (*exit_t)(void);
struct userspace_s
{
main_t us_entrypoint;
exit_t us_taskquit;
uintptr_t us_textstart;
uintptr_t us_textend;
uintptr_t us_datasource;
uintptr_t us_datastart;
uintptr_t us_dataend;
uintptr_t us_bssstart;
uintptr_t us_bssend;
uintptr_t us_heapend;
};
#define USERSPACE (( struct userspace_s *)(0x08080000))
#ifndef SERVICE_TABLE_ADDRESS
#define SERVICE_TABLE_ADDRESS (0x20000000)
#endif
#define USER_SRAM_SIZE 64
#define USER_MEMORY_START_ADDRESS (USERSPACE->us_bssend)
#define USER_MEMORY_END_ADDRESS (0x10000000 + USER_SRAM_SIZE * 1024)
#endif
void InitBoardHardware(void);
#endif

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export CROSS_COMPILE ?=/usr/bin/arm-none-eabi-
export CFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -fgnu89-inline -Wa,-mimplicit-it=thumb -Werror
export AFLAGS := -c -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -x assembler-with-cpp -Wa,-mimplicit-it=thumb -gdwarf-2
export LFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_cortex-m4-emulator.map,-cref,-u,Reset_Handler -T $(BSP_ROOT)/link.lds
export CXXFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -Werror
export APPLFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_app.map,-cref,-u, -T $(BSP_ROOT)/link_userspace.lds
export DEFINES := -DHAVE_CCONFIG_H -DSTM32F407xx -DUSE_HAL_DRIVER -DHAVE_SIGINFO
export USING_NEWLIB =1
export USING_VFS = 1
export USING_SPI = 1
export ARCH = arm
export USING_LORA = 1

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/* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
*
* $Date: 19. October 2015
* $Revision: V.1.4.5 a
*
* Project: CMSIS DSP Library
* Title: arm_common_tables.h
*
* Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
*
* Target Processor: Cortex-M4/Cortex-M3
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* -------------------------------------------------------------------- */
#ifndef _ARM_COMMON_TABLES_H
#define _ARM_COMMON_TABLES_H
#include "arm_math.h"
extern const uint16_t armBitRevTable[1024];
extern const q15_t armRecipTableQ15[64];
extern const q31_t armRecipTableQ31[64];
/* extern const q31_t realCoefAQ31[1024]; */
/* extern const q31_t realCoefBQ31[1024]; */
extern const float32_t twiddleCoef_16[32];
extern const float32_t twiddleCoef_32[64];
extern const float32_t twiddleCoef_64[128];
extern const float32_t twiddleCoef_128[256];
extern const float32_t twiddleCoef_256[512];
extern const float32_t twiddleCoef_512[1024];
extern const float32_t twiddleCoef_1024[2048];
extern const float32_t twiddleCoef_2048[4096];
extern const float32_t twiddleCoef_4096[8192];
#define twiddleCoef twiddleCoef_4096
extern const q31_t twiddleCoef_16_q31[24];
extern const q31_t twiddleCoef_32_q31[48];
extern const q31_t twiddleCoef_64_q31[96];
extern const q31_t twiddleCoef_128_q31[192];
extern const q31_t twiddleCoef_256_q31[384];
extern const q31_t twiddleCoef_512_q31[768];
extern const q31_t twiddleCoef_1024_q31[1536];
extern const q31_t twiddleCoef_2048_q31[3072];
extern const q31_t twiddleCoef_4096_q31[6144];
extern const q15_t twiddleCoef_16_q15[24];
extern const q15_t twiddleCoef_32_q15[48];
extern const q15_t twiddleCoef_64_q15[96];
extern const q15_t twiddleCoef_128_q15[192];
extern const q15_t twiddleCoef_256_q15[384];
extern const q15_t twiddleCoef_512_q15[768];
extern const q15_t twiddleCoef_1024_q15[1536];
extern const q15_t twiddleCoef_2048_q15[3072];
extern const q15_t twiddleCoef_4096_q15[6144];
extern const float32_t twiddleCoef_rfft_32[32];
extern const float32_t twiddleCoef_rfft_64[64];
extern const float32_t twiddleCoef_rfft_128[128];
extern const float32_t twiddleCoef_rfft_256[256];
extern const float32_t twiddleCoef_rfft_512[512];
extern const float32_t twiddleCoef_rfft_1024[1024];
extern const float32_t twiddleCoef_rfft_2048[2048];
extern const float32_t twiddleCoef_rfft_4096[4096];
/* floating-point bit reversal tables */
#define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20 )
#define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48 )
#define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56 )
#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 )
#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 )
#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 )
#define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800)
#define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808)
#define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032)
extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH];
/* fixed-point bit reversal tables */
#define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12 )
#define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24 )
#define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56 )
#define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112 )
#define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240 )
#define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480 )
#define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992 )
#define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
#define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH];
/* Tables for Fast Math Sine and Cosine */
extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1];
extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1];
extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1];
#endif /* ARM_COMMON_TABLES_H */

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