2021-04-28 17:49:18 +08:00
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/**
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******************************************************************************
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* @file system_stm32f4xx.c
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* @author MCD Application Team
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* @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
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*
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* This file provides two functions and one global variable to be called from
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* user application:
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* - SystemInit(): This function is called at startup just after reset and
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* before branch to main program. This call is made inside
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* the "startup_stm32f4xx.s" file.
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*
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* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
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* by the user application to setup the SysTick
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* timer or configure other parameters.
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*
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* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
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* be called whenever the core clock is changed
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* during program execution.
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*
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*
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT 2017 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/**
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2021-04-29 10:07:56 +08:00
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* @file system_init.c
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* @brief support SystemInit function
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2021-04-28 17:49:18 +08:00
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* @version 1.0
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* @author AIIT XUOS Lab
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2021-04-29 10:07:56 +08:00
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* @date 2021-04-29
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2021-04-28 17:49:18 +08:00
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*/
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2021-04-29 10:07:56 +08:00
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/*************************************************
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File name: system_init.c
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Description: support SystemInit function
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Others:
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History:
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1. Date: 2021-04-29
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Author: AIIT XUOS Lab
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Modification:
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1. take system_stm32f4xx.c for XiUOS
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*************************************************/
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2021-04-28 17:49:18 +08:00
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#include "stm32f4xx.h"
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#if !defined (HSE_VALUE)
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#define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */
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#endif /* HSE_VALUE */
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#if !defined (HSI_VALUE)
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#define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
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#endif /* HSI_VALUE */
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#define VECT_TAB_OFFSET 0x00
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void SystemInit(void)
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{
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SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));
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RCC->CR |= (uint32_t)0x00000001;
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RCC->CFGR = 0x00000000;
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RCC->CR &= (uint32_t)0xFEF6FFFF;
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RCC->PLLCFGR = 0x24003010;
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RCC->CR &= (uint32_t)0xFFFBFFFF;
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RCC->CIR = 0x00000000;
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#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
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SystemInitExtMemCtl();
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#endif
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#ifdef VECT_TAB_SRAM
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SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET;
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#else
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SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET;
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#endif
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}
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