diff --git a/Ubiquitous/RT_Thread/bsp/k210/.config b/Ubiquitous/RT_Thread/bsp/k210/.config
new file mode 100644
index 00000000..043507ae
--- /dev/null
+++ b/Ubiquitous/RT_Thread/bsp/k210/.config
@@ -0,0 +1,396 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# XIUOS Rt-thread Configuration
+#
+CONFIG_ROOT_DIR="../../../.."
+CONFIG_BSP_DIR="."
+CONFIG_RT_Thread_DIR="../.."
+CONFIG_RTT_DIR="../../rt-thread"
+CONFIG_BOARD_K210_EVB=y
+
+#
+# RT-Thread Kernel
+#
+CONFIG_RT_NAME_MAX=8
+# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
+CONFIG_RT_USING_SMP=y
+CONFIG_RT_CPUS_NR=2
+CONFIG_RT_ALIGN_SIZE=8
+# CONFIG_RT_THREAD_PRIORITY_8 is not set
+CONFIG_RT_THREAD_PRIORITY_32=y
+# CONFIG_RT_THREAD_PRIORITY_256 is not set
+CONFIG_RT_THREAD_PRIORITY_MAX=32
+CONFIG_RT_TICK_PER_SECOND=1000
+CONFIG_RT_USING_OVERFLOW_CHECK=y
+CONFIG_RT_USING_HOOK=y
+CONFIG_RT_USING_IDLE_HOOK=y
+CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
+CONFIG_IDLE_THREAD_STACK_SIZE=4096
+# CONFIG_RT_USING_TIMER_SOFT is not set
+
+#
+# kservice optimization
+#
+# CONFIG_RT_KSERVICE_USING_STDLIB is not set
+# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
+CONFIG_RT_DEBUG=y
+CONFIG_RT_DEBUG_COLOR=y
+CONFIG_RT_DEBUG_INIT_CONFIG=y
+CONFIG_RT_DEBUG_INIT=1
+# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
+# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
+# CONFIG_RT_DEBUG_IPC_CONFIG is not set
+# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
+# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
+# CONFIG_RT_DEBUG_MEM_CONFIG is not set
+# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
+# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
+# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
+
+#
+# Inter-Thread communication
+#
+CONFIG_RT_USING_SEMAPHORE=y
+CONFIG_RT_USING_MUTEX=y
+CONFIG_RT_USING_EVENT=y
+CONFIG_RT_USING_MAILBOX=y
+CONFIG_RT_USING_MESSAGEQUEUE=y
+CONFIG_RT_USING_SIGNALS=y
+
+#
+# Memory Management
+#
+CONFIG_RT_USING_MEMPOOL=y
+CONFIG_RT_USING_MEMHEAP=y
+# CONFIG_RT_USING_NOHEAP is not set
+# CONFIG_RT_USING_SMALL_MEM is not set
+CONFIG_RT_USING_SLAB=y
+# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set
+# CONFIG_RT_USING_USERHEAP is not set
+# CONFIG_RT_USING_MEMTRACE is not set
+CONFIG_RT_USING_HEAP=y
+
+#
+# Kernel Device Object
+#
+CONFIG_RT_USING_DEVICE=y
+# CONFIG_RT_USING_DEVICE_OPS is not set
+# CONFIG_RT_USING_INTERRUPT_INFO is not set
+CONFIG_RT_USING_CONSOLE=y
+CONFIG_RT_CONSOLEBUF_SIZE=128
+CONFIG_RT_CONSOLE_DEVICE_NAME="uarths"
+CONFIG_RT_VER_NUM=0x40004
+CONFIG_ARCH_CPU_64BIT=y
+# CONFIG_RT_USING_CPU_FFS is not set
+CONFIG_ARCH_RISCV=y
+CONFIG_ARCH_RISCV_FPU=y
+CONFIG_ARCH_RISCV_FPU_S=y
+CONFIG_ARCH_RISCV64=y
+# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
+
+#
+# RT-Thread Components
+#
+CONFIG_RT_USING_COMPONENTS_INIT=y
+CONFIG_RT_USING_USER_MAIN=y
+CONFIG_RT_MAIN_THREAD_STACK_SIZE=8192
+CONFIG_RT_MAIN_THREAD_PRIORITY=10
+
+#
+# C++ features
+#
+# CONFIG_RT_USING_CPLUSPLUS is not set
+
+#
+# Command shell
+#
+CONFIG_RT_USING_FINSH=y
+CONFIG_FINSH_THREAD_NAME="tshell"
+CONFIG_FINSH_USING_HISTORY=y
+CONFIG_FINSH_HISTORY_LINES=5
+CONFIG_FINSH_USING_SYMTAB=y
+CONFIG_FINSH_USING_DESCRIPTION=y
+# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
+CONFIG_FINSH_THREAD_PRIORITY=20
+CONFIG_FINSH_THREAD_STACK_SIZE=16384
+CONFIG_FINSH_CMD_SIZE=80
+# CONFIG_FINSH_USING_AUTH is not set
+CONFIG_FINSH_USING_MSH=y
+CONFIG_FINSH_USING_MSH_DEFAULT=y
+CONFIG_FINSH_USING_MSH_ONLY=y
+CONFIG_FINSH_ARG_MAX=10
+
+#
+# Device virtual file system
+#
+CONFIG_RT_USING_DFS=y
+CONFIG_DFS_USING_WORKDIR=y
+CONFIG_DFS_FILESYSTEMS_MAX=16
+CONFIG_DFS_FILESYSTEM_TYPES_MAX=16
+CONFIG_DFS_FD_MAX=64
+# CONFIG_RT_USING_DFS_MNTTABLE is not set
+CONFIG_RT_USING_DFS_ELMFAT=y
+
+#
+# elm-chan's FatFs, Generic FAT Filesystem Module
+#
+CONFIG_RT_DFS_ELM_CODE_PAGE=437
+CONFIG_RT_DFS_ELM_WORD_ACCESS=y
+# CONFIG_RT_DFS_ELM_USE_LFN_0 is not set
+# CONFIG_RT_DFS_ELM_USE_LFN_1 is not set
+# CONFIG_RT_DFS_ELM_USE_LFN_2 is not set
+CONFIG_RT_DFS_ELM_USE_LFN_3=y
+CONFIG_RT_DFS_ELM_USE_LFN=3
+CONFIG_RT_DFS_ELM_LFN_UNICODE_0=y
+# CONFIG_RT_DFS_ELM_LFN_UNICODE_1 is not set
+# CONFIG_RT_DFS_ELM_LFN_UNICODE_2 is not set
+# CONFIG_RT_DFS_ELM_LFN_UNICODE_3 is not set
+CONFIG_RT_DFS_ELM_LFN_UNICODE=0
+CONFIG_RT_DFS_ELM_MAX_LFN=255
+CONFIG_RT_DFS_ELM_DRIVES=2
+CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=4096
+# CONFIG_RT_DFS_ELM_USE_ERASE is not set
+CONFIG_RT_DFS_ELM_REENTRANT=y
+CONFIG_RT_USING_DFS_DEVFS=y
+# CONFIG_RT_USING_DFS_ROMFS is not set
+# CONFIG_RT_USING_DFS_RAMFS is not set
+# CONFIG_RT_USING_DFS_NFS is not set
+
+#
+# Device Drivers
+#
+CONFIG_RT_USING_DEVICE_IPC=y
+CONFIG_RT_PIPE_BUFSZ=512
+CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
+CONFIG_RT_SYSTEM_WORKQUEUE_STACKSIZE=2048
+CONFIG_RT_SYSTEM_WORKQUEUE_PRIORITY=23
+CONFIG_RT_USING_SERIAL=y
+CONFIG_RT_SERIAL_USING_DMA=y
+CONFIG_RT_SERIAL_RB_BUFSZ=64
+# CONFIG_RT_USING_CAN is not set
+# CONFIG_RT_USING_HWTIMER is not set
+# CONFIG_RT_USING_CPUTIME is not set
+# CONFIG_RT_USING_I2C is not set
+# CONFIG_RT_USING_PHY is not set
+CONFIG_RT_USING_PIN=y
+# CONFIG_RT_USING_ADC is not set
+# CONFIG_RT_USING_DAC is not set
+# CONFIG_RT_USING_PWM is not set
+# CONFIG_RT_USING_MTD_NOR is not set
+# CONFIG_RT_USING_MTD_NAND is not set
+# CONFIG_RT_USING_PM is not set
+# CONFIG_RT_USING_RTC is not set
+# CONFIG_RT_USING_SDIO is not set
+CONFIG_RT_USING_SPI=y
+# CONFIG_RT_USING_QSPI is not set
+CONFIG_RT_USING_SPI_MSD=y
+CONFIG_RT_USING_SFUD=y
+CONFIG_RT_SFUD_USING_SFDP=y
+CONFIG_RT_SFUD_USING_FLASH_INFO_TABLE=y
+# CONFIG_RT_SFUD_USING_QSPI is not set
+CONFIG_RT_SFUD_SPI_MAX_HZ=50000000
+CONFIG_RT_DEBUG_SFUD=y
+# CONFIG_RT_USING_ENC28J60 is not set
+# CONFIG_RT_USING_SPI_WIFI is not set
+# CONFIG_RT_USING_WDT is not set
+# CONFIG_RT_USING_AUDIO is not set
+# CONFIG_RT_USING_SENSOR is not set
+# CONFIG_RT_USING_TOUCH is not set
+# CONFIG_RT_USING_HWCRYPTO is not set
+# CONFIG_RT_USING_PULSE_ENCODER is not set
+# CONFIG_RT_USING_INPUT_CAPTURE is not set
+CONFIG_RT_USING_WIFI=y
+CONFIG_RT_WLAN_DEVICE_STA_NAME="wlan0"
+CONFIG_RT_WLAN_DEVICE_AP_NAME="wlan1"
+CONFIG_RT_WLAN_SSID_MAX_LENGTH=32
+CONFIG_RT_WLAN_PASSWORD_MAX_LENGTH=32
+CONFIG_RT_WLAN_DEV_EVENT_NUM=2
+CONFIG_RT_WLAN_MANAGE_ENABLE=y
+CONFIG_RT_WLAN_SCAN_WAIT_MS=10000
+CONFIG_RT_WLAN_CONNECT_WAIT_MS=10000
+CONFIG_RT_WLAN_SCAN_SORT=y
+CONFIG_RT_WLAN_MSH_CMD_ENABLE=y
+CONFIG_RT_WLAN_AUTO_CONNECT_ENABLE=y
+CONFIG_AUTO_CONNECTION_PERIOD_MS=2000
+CONFIG_RT_WLAN_CFG_ENABLE=y
+CONFIG_RT_WLAN_CFG_INFO_MAX=3
+CONFIG_RT_WLAN_PROT_ENABLE=y
+CONFIG_RT_WLAN_PROT_NAME_LEN=8
+CONFIG_RT_WLAN_PROT_MAX=2
+CONFIG_RT_WLAN_DEFAULT_PROT="lwip"
+CONFIG_RT_WLAN_PROT_LWIP_ENABLE=y
+CONFIG_RT_WLAN_PROT_LWIP_NAME="lwip"
+# CONFIG_RT_WLAN_PROT_LWIP_PBUF_FORCE is not set
+CONFIG_RT_WLAN_WORK_THREAD_ENABLE=y
+CONFIG_RT_WLAN_WORKQUEUE_THREAD_NAME="wlan"
+CONFIG_RT_WLAN_WORKQUEUE_THREAD_SIZE=2048
+CONFIG_RT_WLAN_WORKQUEUE_THREAD_PRIO=15
+# CONFIG_RT_WLAN_DEBUG is not set
+
+#
+# Using USB
+#
+# CONFIG_RT_USING_USB_HOST is not set
+# CONFIG_RT_USING_USB_DEVICE is not set
+
+#
+# POSIX layer and C standard library
+#
+CONFIG_RT_USING_LIBC=y
+# CONFIG_RT_USING_PTHREADS is not set
+CONFIG_RT_USING_POSIX=y
+# CONFIG_RT_USING_POSIX_MMAP is not set
+# CONFIG_RT_USING_POSIX_TERMIOS is not set
+# CONFIG_RT_USING_POSIX_GETLINE is not set
+# CONFIG_RT_USING_POSIX_AIO is not set
+# CONFIG_RT_USING_MODULE is not set
+CONFIG_RT_LIBC_FIXED_TIMEZONE=8
+
+#
+# Network
+#
+
+#
+# Socket abstraction layer
+#
+CONFIG_RT_USING_SAL=y
+# CONFIG_SAL_INTERNET_CHECK is not set
+
+#
+# protocol stack implement
+#
+CONFIG_SAL_USING_LWIP=y
+# CONFIG_SAL_USING_POSIX is not set
+CONFIG_SAL_SOCKETS_NUM=16
+
+#
+# Network interface device
+#
+CONFIG_RT_USING_NETDEV=y
+CONFIG_NETDEV_USING_IFCONFIG=y
+CONFIG_NETDEV_USING_PING=y
+CONFIG_NETDEV_USING_NETSTAT=y
+CONFIG_NETDEV_USING_AUTO_DEFAULT=y
+# CONFIG_NETDEV_USING_IPV6 is not set
+CONFIG_NETDEV_IPV4=1
+CONFIG_NETDEV_IPV6=0
+# CONFIG_NETDEV_IPV6_SCOPES is not set
+
+#
+# light weight TCP/IP stack
+#
+CONFIG_RT_USING_LWIP=y
+# CONFIG_RT_USING_LWIP141 is not set
+CONFIG_RT_USING_LWIP202=y
+# CONFIG_RT_USING_LWIP212 is not set
+# CONFIG_RT_USING_LWIP_IPV6 is not set
+CONFIG_RT_LWIP_MEM_ALIGNMENT=8
+CONFIG_RT_LWIP_IGMP=y
+CONFIG_RT_LWIP_ICMP=y
+# CONFIG_RT_LWIP_SNMP is not set
+CONFIG_RT_LWIP_DNS=y
+CONFIG_RT_LWIP_DHCP=y
+CONFIG_IP_SOF_BROADCAST=1
+CONFIG_IP_SOF_BROADCAST_RECV=1
+
+#
+# Static IPv4 Address
+#
+CONFIG_RT_LWIP_IPADDR="192.168.1.30"
+CONFIG_RT_LWIP_GWADDR="192.168.1.1"
+CONFIG_RT_LWIP_MSKADDR="255.255.255.0"
+CONFIG_RT_LWIP_UDP=y
+CONFIG_RT_LWIP_TCP=y
+CONFIG_RT_LWIP_RAW=y
+# CONFIG_RT_LWIP_PPP is not set
+CONFIG_RT_MEMP_NUM_NETCONN=8
+CONFIG_RT_LWIP_PBUF_NUM=16
+CONFIG_RT_LWIP_RAW_PCB_NUM=4
+CONFIG_RT_LWIP_UDP_PCB_NUM=4
+CONFIG_RT_LWIP_TCP_PCB_NUM=4
+CONFIG_RT_LWIP_TCP_SEG_NUM=40
+CONFIG_RT_LWIP_TCP_SND_BUF=8196
+CONFIG_RT_LWIP_TCP_WND=8196
+CONFIG_RT_LWIP_TCPTHREAD_PRIORITY=10
+CONFIG_RT_LWIP_TCPTHREAD_MBOX_SIZE=8
+CONFIG_RT_LWIP_TCPTHREAD_STACKSIZE=10240
+# CONFIG_LWIP_NO_RX_THREAD is not set
+# CONFIG_LWIP_NO_TX_THREAD is not set
+CONFIG_RT_LWIP_ETHTHREAD_PRIORITY=12
+CONFIG_RT_LWIP_ETHTHREAD_STACKSIZE=10240
+CONFIG_RT_LWIP_ETHTHREAD_MBOX_SIZE=8
+# CONFIG_RT_LWIP_REASSEMBLY_FRAG is not set
+CONFIG_LWIP_NETIF_STATUS_CALLBACK=1
+CONFIG_LWIP_NETIF_LINK_CALLBACK=1
+CONFIG_SO_REUSE=1
+CONFIG_LWIP_SO_RCVTIMEO=1
+CONFIG_LWIP_SO_SNDTIMEO=1
+CONFIG_LWIP_SO_RCVBUF=1
+CONFIG_LWIP_SO_LINGER=0
+# CONFIG_RT_LWIP_NETIF_LOOPBACK is not set
+CONFIG_LWIP_NETIF_LOOPBACK=0
+# CONFIG_RT_LWIP_STATS is not set
+# CONFIG_RT_LWIP_USING_HW_CHECKSUM is not set
+CONFIG_RT_LWIP_USING_PING=y
+# CONFIG_RT_LWIP_DEBUG is not set
+
+#
+# AT commands
+#
+# CONFIG_RT_USING_AT is not set
+# CONFIG_LWIP_USING_DHCPD is not set
+
+#
+# VBUS(Virtual Software BUS)
+#
+# CONFIG_RT_USING_VBUS is not set
+
+#
+# Utilities
+#
+# CONFIG_RT_USING_RYM is not set
+# CONFIG_RT_USING_ULOG is not set
+# CONFIG_RT_USING_UTEST is not set
+# CONFIG_RT_USING_RT_LINK is not set
+
+#
+# RT-Thread Utestcases
+#
+# CONFIG_RT_USING_UTESTCASES is not set
+
+#
+# Board Drivers Config
+#
+CONFIG_BSP_USING_UART_HS=y
+CONFIG_BSP_USING_UART1=y
+CONFIG_BSP_UART1_TXD_PIN=20
+CONFIG_BSP_UART1_RXD_PIN=21
+# CONFIG_BSP_USING_UART2 is not set
+# CONFIG_BSP_USING_UART3 is not set
+# CONFIG_BSP_USING_I2C1 is not set
+# CONFIG_BSP_USING_SPI1 is not set
+# CONFIG_BSP_USING_LCD is not set
+# CONFIG_BSP_USING_SDCARD is not set
+CONFIG_BSP_USING_DVP=y
+
+#
+# The default pin assignment is based on the Maix Duino K210 development board
+#
+CONFIG_BSP_DVP_SCCB_SDA_PIN=40
+CONFIG_BSP_DVP_SCCB_SCLK_PIN=41
+CONFIG_BSP_DVP_CMOS_RST_PIN=42
+CONFIG_BSP_DVP_CMOS_VSYNC_PIN=43
+CONFIG_BSP_DVP_CMOS_PWDN_PIN=44
+CONFIG_BSP_DVP_CMOS_XCLK_PIN=46
+CONFIG_BSP_DVP_CMOS_PCLK_PIN=47
+CONFIG_BSP_DVP_CMOS_HREF_PIN=45
+
+#
+# Kendryte SDK Config
+#
+CONFIG_PKG_KENDRYTE_SDK_VERNUM=0x0055
+
+#
+# More Drivers
+#
+CONFIG___STACKSIZE__=4096
diff --git a/Ubiquitous/RT_Thread/bsp/k210/Kconfig b/Ubiquitous/RT_Thread/bsp/k210/Kconfig
new file mode 100644
index 00000000..145aa83c
--- /dev/null
+++ b/Ubiquitous/RT_Thread/bsp/k210/Kconfig
@@ -0,0 +1,36 @@
+mainmenu "XIUOS Rt-thread Configuration"
+
+config ROOT_DIR
+    string
+    default "../../../.."
+
+config BSP_DIR
+    string
+    default "."
+
+config RT_Thread_DIR
+    string
+    default "../.."
+
+config RTT_DIR
+    string
+    default "../../rt-thread"
+
+config BOARD_K210_EVB
+    bool
+    select ARCH_RISCV64
+    select ARCH_RISCV_FPU_S
+    select RT_USING_COMPONENTS_INIT
+    select RT_USING_USER_MAIN
+    default y
+
+source "$RTT_DIR/Kconfig"
+source "base-drivers/Kconfig"
+source "kendryte-sdk/Kconfig"
+source "$RT_Thread_DIR/drivers/Kconfig"
+source "$ROOT_DIR/APP_Framework/Applications/Kconfig"
+source "$ROOT_DIR/APP_Framework/Framework/Kconfig"
+
+config __STACKSIZE__
+    int "stack size for interrupt"
+    default 4096
diff --git a/Ubiquitous/RT_Thread/bsp/k210/README.md b/Ubiquitous/RT_Thread/bsp/k210/README.md
new file mode 100644
index 00000000..a560c153
--- /dev/null
+++ b/Ubiquitous/RT_Thread/bsp/k210/README.md
@@ -0,0 +1,117 @@
+# K210最小系统板（Max bit）说明
+
+## OV2640 menuconfig 配置：
+
+​	More Driver-------->ov2640 driver （勾选） 保存即可
+
+
+
+##  RW007 menuconfig 配置：
+
+​	More Driver-------->rw007:SPI WIFI rw007 driver
+
+​																 example driver port (not use example driver, porting by myself)  
+
+​																(20000000)  SPI  MAX Hz
+
+​    Board Drivers Config 
+
+​															 Enable SPI1
+
+​																				(27)  spi1 clk pin number                  
+
+​                      														  (28)  spi1 d0 pin number                                                                         
+
+​																			    (26)  spi1 d1 pin number 
+
+​																				SPI1 Enable SS1（spi11 dev）-------->(8)  spi1 ss1 pin number											
+
+​															 (spi11) the SPIDEV rw007 driver on                                                         
+
+​                     										(7) rw007 int pin for rw007                                                                                  
+
+​															 (6) rw007 rst pin for rw007
+
+**SPI1 Enable SS1（spi11 dev）表示SPI1总线片选编号1 ，此时挂载在总线上设备名是spi11，所以 the SPIDEV rw007 driver on参数也要填写（spi11）**
+
+## SD卡配置：
+
+​	 Board Drivers Config-------->Enable SDCARD (spi1(ss0))  （勾选）保存即可		SPI1 Enable SS0（spi10 dev）-------->(29)  spi1 ss1 pin number 会默认配置
+
+**SD卡和RW007共用一条spi硬件总线 ，其中片选设备sd卡为SPI1 Enable SS0（spi10 dev），RW007片选设备为SPI1 Enable SS1（spi11 dev）**
+
+
+
+​												
+
+**上述引脚根据电路实际而定,另外涉及到相关的Lwip wifi framwork等已经默认配置并匹配**
+
+## 以下为引脚硬件的连接表
+
+## RW007(SPI1 ) Kendryte Sipeed MAX bit io
+
+| 引脚               | 作用      | 引脚序号 | RW007板子 |
+| ------------------ | --------- | -------- | --------- |
+| io 27(印丝标注SCK) | SPI1_SCK  |          | SCK       |
+| io 26(印丝标注SO)  | SPI1_MISO |          | MISO      |
+| io 28(印丝标注SI)  | SPI1_MOSI |          | MOSI      |
+| io 8               | CS/BOOT1  |          | CS        |
+| io 7               | INT/BUSY  |          | D9        |
+| io 6               | RESET     |          | D8        |
+
+
+
+
+
+## SD卡Kendryte Sipeed MAX bit io
+
+| 引脚               | 作用      | 引脚序号 | RW007板子 |
+| ------------------ | --------- | -------- | --------- |
+| io 27(印丝标注SCK) | SPI1_SCK  |          | SCK       |
+| io 26(印丝标注SO)  | SPI1_MISO |          | MISO      |
+| io 28(印丝标注SI)  | SPI1_MOSI |          | MOSI      |
+| io 29              | CS/BOOT1  |          | CS        |
+
+
+
+**注意：BSP_SPI1_D0_PIN 10  d0也就是MOSI  ，sd卡可直接利用Max bit板载，无需重新接线。SD卡和Rw007设备共用一条SPI1总线**
+
+
+
+
+
+## 编译说明
+
+编译K210，需要有RT-Thread的代码，因为K210的sdk是以软件包方式，所以需要在bsp/k210下做软件包更新。Windows下推进使用[env工具][1]，然后在console下进入bsp/k210目录中，运行：
+
+    cd bsp/k210
+    pkgs --update
+
+如果在Linux平台下，可以先执行
+
+    scons --menuconfig
+
+它会自动下载env相关脚本到~/.env目录，然后执行
+
+    source ~/.env/env.sh
+    
+    cd bsp/k210
+    pkgs --update
+
+下载risc-v的工具链，[下载地址](https://github.com/xpack-dev-tools/riscv-none-embed-gcc-xpack/releases)  
+    
+更新完软件包后，在`rtconfig.py`中将risc-v工具链的本地路径加入文档。
+注：  
+
+1. 工具链建议使用上方提供的，`kendryte的官方工具链`会报浮点类型不兼容的错误，`risc-v工具链8.2.0之前的版本`会出现头文件不兼容的问题。
+2. 网上传需要开启C++ 17,认为k210的神经网络编译器nncase多数语法由C++ 17,故需要开启C++ 17。个人认为没有必要，nncase是在PC端独立使用的，
+   作用是将神经网络模型转为kmodel格式，此格式文件为已经编译的二进制文件.
+
+然后执行scons编译：  
+
+    set RTT_EXEC_PATH=your_toolchains
+    scons
+
+来编译这个板级支持包。如果编译正确无误，会产生rtthread.elf、rtthread.bin文件。其中rtthread.bin需要烧写到设备中进行运行。  
+注：如果初次使用编译报错，可能是使用的SDK过老，使用`menuconfig`命令，在→ RT-Thread online packages → peripheral libraries 
+and drivers → the kendryte-sdk package for rt-thread中将SDK改为latest版本即可。
\ No newline at end of file
diff --git a/Ubiquitous/RT_Thread/bsp/k210/SConscript b/Ubiquitous/RT_Thread/bsp/k210/SConscript
new file mode 100644
index 00000000..3d15055d
--- /dev/null
+++ b/Ubiquitous/RT_Thread/bsp/k210/SConscript
@@ -0,0 +1,13 @@
+import os
+from building import *
+
+cwd = GetCurrentDir()
+objs = []
+list = os.listdir(cwd)
+
+for d in list:
+    path = os.path.join(cwd, d)
+    if os.path.isfile(os.path.join(path, 'SConscript')):
+        objs = objs + SConscript(os.path.join(d, 'SConscript'))
+
+Return('objs')
diff --git a/Ubiquitous/RT_Thread/bsp/k210/SConstruct b/Ubiquitous/RT_Thread/bsp/k210/SConstruct
new file mode 100644
index 00000000..55247bc1
--- /dev/null
+++ b/Ubiquitous/RT_Thread/bsp/k210/SConstruct
@@ -0,0 +1,64 @@
+import os
+import sys
+import rtconfig
+
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+else:
+    RTT_ROOT = os.path.normpath(os.getcwd() + '/../../rt-thread')
+
+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
+from building import *
+
+TARGET = 'rtthread.' + rtconfig.TARGET_EXT
+
+DefaultEnvironment(tools=[])
+env = Environment(tools = ['mingw'],
+    AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+    CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
+    CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
+    AR = rtconfig.AR, ARFLAGS = '-rc',
+    LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+# use ASPPCOM to replace ASCOM, ASPPCOM will use CFLAGS/CPPFLAGS with AS
+env['ASCOM'] = env['ASPPCOM']
+
+AddOption('--compiledb',
+    dest = 'compiledb',
+    action = 'store_true',
+    default = False,
+    help = 'generate compile_commands.json')
+
+if GetOption('compiledb'):
+    if int(SCons.__version__.split('.')[0]) >= 4:
+        env['COMPILATIONDB_USE_ABSPATH'] = True
+        env.Tool('compilation_db')
+        env.CompilationDatabase('compile_commands.json')
+    else:
+        print('Warning: --compiledb only support on SCons 4.0+')
+
+Export('RTT_ROOT')
+Export('rtconfig')
+
+# prepare building environment
+objs = PrepareBuilding(env, RTT_ROOT, has_libcpu = False)
+
+stack_size = 4096
+
+stack_lds = open('link_stacksize.lds', 'w')
+if GetDepend('__STACKSIZE__'): stack_size = GetDepend('__STACKSIZE__')
+stack_lds.write('__STACKSIZE__ = %d;' % stack_size)
+stack_lds.close()
+
+# include more drivers
+objs.extend(SConscript(os.getcwd() + '/../../drivers/SConscript'))
+
+# include APP_Framework/Framework
+objs.extend(SConscript(os.getcwd() + '/../../../../APP_Framework/Framework/SConscript'))
+
+# include APP_Framework/Applications
+objs.extend(SConscript(os.getcwd() + '/../../../../APP_Framework/Applications/SConscript'))
+
+
+# make a building
+DoBuilding(TARGET, objs)
diff --git a/Ubiquitous/RT_Thread/bsp/k210/applications/SConscript b/Ubiquitous/RT_Thread/bsp/k210/applications/SConscript
new file mode 100644
index 00000000..c583d301
--- /dev/null
+++ b/Ubiquitous/RT_Thread/bsp/k210/applications/SConscript
@@ -0,0 +1,9 @@
+from building import *
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp')
+CPPPATH = [cwd]
+
+group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')
diff --git a/Ubiquitous/RT_Thread/bsp/k210/applications/main.c b/Ubiquitous/RT_Thread/bsp/k210/applications/main.c
new file mode 100644
index 00000000..45213d73
--- /dev/null
+++ b/Ubiquitous/RT_Thread/bsp/k210/applications/main.c
@@ -0,0 +1,41 @@
+/*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiUOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+ */
+
+#include <rtthread.h>
+#include <rtdevice.h>
+#include <stdio.h>
+#define LED_G   12
+
+int main(void)
+{
+    rt_pin_mode(LED_G, PIN_MODE_OUTPUT);
+    rt_thread_mdelay(100);
+    char info1[25] ={0};
+    char info2[25] ={0};
+    sprintf(info1,"xuos-intelligence k210 build ");
+    sprintf(info2,"%s %s",__DATE__,__TIME__);
+    printf("%s %s \n",info1,info2); 
+    #ifdef BSP_USING_LCD
+    #include<drv_lcd.h>
+    lcd_clear(PINK); 
+    lcd_draw_string(70,100,info1,BLACK);
+    lcd_draw_string(70,120,info2,BLACK);
+    #endif
+    while(1)
+    {
+        rt_pin_write(LED_G, PIN_HIGH);
+        rt_thread_mdelay(500);
+        rt_pin_write(LED_G, PIN_LOW);
+        rt_thread_mdelay(500);
+    }
+    return 0;
+}
diff --git a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/Kconfig b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/Kconfig
new file mode 100644
index 00000000..060bd206
--- /dev/null
+++ b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/Kconfig
@@ -0,0 +1,188 @@
+menu "Board Drivers Config"
+
+config BSP_USING_UART_HS
+    bool "Enable High Speed UART"
+    default y
+
+
+menuconfig BSP_USING_UART1
+    bool "Enable UART1"
+    default n
+    if BSP_USING_UART1
+        config BSP_UART1_TXD_PIN
+            int "uart1 TXD pin number"
+            default 20
+        config BSP_UART1_RXD_PIN
+            int "uart1 RXD pin number"
+            default 21
+    endif
+
+menuconfig BSP_USING_UART2
+    bool "Enable UART2"
+    default n
+    if BSP_USING_UART2
+        config BSP_UART2_TXD_PIN
+            int "uart2 TXD pin number"
+            default 28
+        config BSP_UART2_RXD_PIN
+            int "uart2 RXD pin number"
+            default 27
+    endif
+
+menuconfig BSP_USING_UART3
+    bool "Enable UART3"
+    default n
+    if BSP_USING_UART3
+        config BSP_UART3_TXD_PIN
+            int "uart3 TXD pin number"
+            default 22
+        config BSP_UART3_RXD_PIN
+            int "uart3 RXD pin number"
+            default 23
+    endif
+
+config BSP_USING_I2C1
+    bool "Enable I2C1 (GPIO0/1)"
+    select RT_USING_I2C
+    default n
+
+menuconfig BSP_USING_SPI1
+    bool "Enable SPI1"
+    select RT_USING_SPI
+    default n
+if BSP_USING_SPI1
+    config BSP_USING_SPI1_AS_QSPI
+        bool
+        default n
+    config BSP_SPI1_CLK_PIN
+        int "spi1 clk pin number"
+        default 27
+    config BSP_SPI1_D0_PIN
+        int "spi1 d0 pin number"
+        default 28
+    config BSP_SPI1_D1_PIN
+        int "spi1 d1 pin number"
+        default 26
+    if BSP_USING_SPI1_AS_QSPI
+        config BSP_SPI1_D2_PIN
+            int "spi1 d2 pin number"
+            default 32
+        config BSP_SPI1_D3_PIN
+            int "spi1 d3 pin number"
+            default 33
+    endif
+    menuconfig BSP_SPI1_USING_SS0
+        bool "SPI1 Enable SS0(spi10 dev)"
+        default n
+    if BSP_SPI1_USING_SS0
+        config BSP_SPI1_SS0_PIN
+            int "spi1 ss0 pin number"
+            default 29
+    endif
+    menuconfig BSP_SPI1_USING_SS1
+        bool "SPI1 Enable SS1(spi11 dev)"
+        default n
+    if BSP_SPI1_USING_SS1
+        config BSP_SPI1_SS1_PIN
+            int "spi1 ss1 pin number"
+            default 8
+    endif
+    menuconfig BSP_SPI1_USING_SS2
+        bool "SPI1 Enable SS2(spi12 dev)"
+        default n
+    if BSP_SPI1_USING_SS2
+        config BSP_SPI1_SS2_PIN
+            int "spi1 ss2 pin number"
+            default 26
+    endif
+    menuconfig BSP_SPI1_USING_SS3
+        bool "SPI1 Enable SS3(spi13 dev)"
+        default n
+    if BSP_SPI1_USING_SS3
+        config BSP_SPI1_SS3_PIN
+            int "spi1 ss3 pin number"
+            default 27
+    endif
+endif
+
+menuconfig BSP_USING_LCD
+    bool "Enable LCD on SPI0"
+    default n
+
+if BSP_USING_LCD
+    config BSP_LCD_CS_PIN
+        int "CS pin number of 8080 interface"
+        default 36
+    config BSP_LCD_WR_PIN
+        int "WR pin number of 8080 interface"
+        default 39
+    config BSP_LCD_DC_PIN
+        int "DC pin number of 8080 interface"
+        default 38
+	config BSP_LCD_RST_PIN
+        int "RST pin number of 8080 interface"
+        default 37
+    config BSP_LCD_X_MAX
+        int "LCD Height"
+        default 240
+    config BSP_LCD_Y_MAX
+        int "LCD Width"
+        default 320
+endif
+
+menuconfig BSP_USING_SDCARD
+	bool "Enable SDCARD (spi1(ss0))"
+	select BSP_USING_SPI1
+	select BSP_SPI1_USING_SS0
+	select RT_USING_DFS
+    select RT_USING_DFS_ELMFAT
+	select RT_USING_SPI_MSD
+	default n
+
+
+menuconfig BSP_USING_DVP
+    bool "Enable DVP(camera)"
+    default n
+
+if BSP_USING_DVP
+	comment "The default pin assignment is based on the Maix Duino K210 development board"
+    config BSP_DVP_SCCB_SDA_PIN
+        int "SCCB SDA pin number for camera"
+        default 40
+    config BSP_DVP_SCCB_SCLK_PIN
+        int "SCCB SCLK pin number for camera"
+        default 41
+    config BSP_DVP_CMOS_RST_PIN
+        int "CMOS RST pin number for camera"
+        default 42
+    config BSP_DVP_CMOS_VSYNC_PIN
+        int "CMOS VSYNC pin number for camera"
+        default 43
+    config BSP_DVP_CMOS_PWDN_PIN
+        int "CMOS PWDN pin number for camera"
+        default 44
+    config BSP_DVP_CMOS_XCLK_PIN
+        int "CMOS XCLK pin number for camera"
+        default 46
+    config BSP_DVP_CMOS_PCLK_PIN
+        int "CMOS PCLK pin number for camera"
+        default 47
+    config BSP_DVP_CMOS_HREF_PIN
+        int "CMOS HREF pin number for camera"
+        default 45
+endif
+
+if PKG_USING_RW007
+    config RW007_SPIDEV_NAME
+        string "the SPIDEV rw007 driver on"
+        default "spi11"
+	config RW007_INT_BUSY_PIN
+        int "rw007 int pin for rw007"
+        default 7
+	config RW007_RST_PIN
+        int "rw007 rst pin for rw007"
+        default 6
+endif	
+
+
+endmenu
diff --git a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/SConscript b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/SConscript
new file mode 100644
index 00000000..233d649d
--- /dev/null
+++ b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/SConscript
@@ -0,0 +1,51 @@
+import os
+import rtconfig
+from building import *
+
+cwd = GetCurrentDir()
+drv_path = cwd+"/../../../rt-thread/bsp/k210/driver/"
+src     = [
+    drv_path + 'board.c',
+    drv_path + 'heap.c',
+    drv_path + 'drv_uart.c',
+    drv_path + 'drv_interrupt.c',
+    'drv_io_config.c'
+]
+CPPPATH = [cwd,drv_path]
+
+if GetDepend('RT_USING_PIN'):
+    src += [drv_path + 'drv_gpio.c']
+
+if GetDepend('RT_USING_HWTIMER'):
+    src += [drv_path + 'drv_hw_timer.c']
+
+if GetDepend('RT_USING_CPUTIME'):
+    src += [drv_path + 'drv_cputime.c']
+
+if GetDepend('RT_USING_I2C'):
+    src += [drv_path + 'drv_i2c.c']
+
+if GetDepend('RT_USING_SPI'):
+    src += [drv_path + 'drv_spi.c']
+
+if GetDepend('RT_USING_PWM'):
+    src += [drv_path + 'drv_pwm.c']
+
+if GetDepend('RT_USING_WDT'):
+    src += [drv_path + 'drv_wdt.c']
+
+if GetDepend('BSP_USING_SDCARD'):
+    src += ['sdcard_port.c']
+    
+if GetDepend('BSP_USING_DVP'):
+    src += ['drv_dvp.c']
+    
+if GetDepend('BSP_USING_LCD'):
+    src += ['drv_lcd.c']
+
+if GetDepend('PKG_USING_RW007'):
+    src += ['rw007_port.c']
+    
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')
diff --git a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_dvp.c b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_dvp.c
new file mode 100644
index 00000000..c1dbc389
--- /dev/null
+++ b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_dvp.c
@@ -0,0 +1,167 @@
+/*
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author            Notes
+ * 2021-01-27     tianchunyu        the first version
+ */
+
+
+#include <rtthread.h>
+#include <stdio.h>
+
+#ifdef BSP_USING_DVP 
+#include <drv_dvp.h>
+#define DRV_DEBUG
+#define LOG_TAG     "drv.dvp"
+#define DBG_LVL     DBG_LOG
+#include <rtdbg.h>
+
+static struct kendryte_dvp rt_dvp = {0};
+static void (*dvp_irq_callback)(void) = NULL;
+/*
+the camera starts transfering photos
+*/
+
+static int on_irq_dvp(void* ctx)
+{
+    if (dvp_get_interrupt(DVP_STS_FRAME_FINISH))
+    {
+        rt_dvp_stop();
+        dvp_clear_interrupt(DVP_STS_FRAME_FINISH);        
+        (*dvp_irq_callback)();
+    }
+    return 0;
+}
+
+
+void rt_dvp_start(uint32_t pData, uint32_t Length)
+{   
+    dvp_set_display_addr(pData);
+    dvp_config_interrupt(DVP_CFG_FINISH_INT_ENABLE, 1);
+    dvp_start_convert();
+}
+
+/*
+the camera stops transfering photos
+*/
+void rt_dvp_stop(void)
+{
+    dvp_config_interrupt(DVP_CFG_FINISH_INT_ENABLE, 0);
+}
+
+
+static rt_err_t rt_dvp_init(rt_device_t dev)
+{
+    //sysctl_pll_set_freq(SYSCTL_PLL2, 45158400UL);
+    RT_ASSERT(dev != RT_NULL);
+    rt_err_t result = RT_EOK;
+    /* Init DVP IO map and function settings  io pin serial number depends on schematic diagram 
+    initialize io in io_config_init function*/
+    /*ov2640 dvp interface initialize*/
+    dvp_init(8);
+    dvp_set_xclk_rate(24000000);
+    dvp_enable_burst();
+    dvp_set_output_enable(0, 1);
+    dvp_set_output_enable(1, 1);
+    dvp_set_image_format(DVP_CFG_RGB_FORMAT);////////////////
+    dvp_set_image_size(320, 240);
+    dvp_config_interrupt(DVP_CFG_FINISH_INT_ENABLE, 0);
+    dvp_disable_auto();
+    plic_set_priority(IRQN_DVP_INTERRUPT, 1);
+    plic_irq_register(IRQN_DVP_INTERRUPT, on_irq_dvp, NULL);
+    plic_irq_enable(IRQN_DVP_INTERRUPT);
+    dvp_clear_interrupt(DVP_STS_FRAME_FINISH); 
+    LOG_I("dvp initialize success");
+    return result;
+}
+
+static rt_err_t rt_dvp_open(rt_device_t dev, rt_uint16_t oflag)
+{
+    RT_ASSERT(dev != RT_NULL);
+
+    return RT_EOK;
+}
+
+static rt_err_t rt_dvp_close(rt_device_t dev)
+{
+    RT_ASSERT(dev != RT_NULL);
+
+    return RT_EOK;
+}
+
+static rt_err_t rt_dvp_control(rt_device_t dev, int cmd, void *args)
+{
+    RT_ASSERT(dev != RT_NULL);
+
+    return RT_EOK;
+}
+
+static rt_size_t rt_dvp_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
+{
+    RT_ASSERT(dev != RT_NULL);
+
+    return RT_EOK;
+}
+
+static rt_size_t rt_dvp_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
+{
+    RT_ASSERT(dev != RT_NULL);
+
+    return RT_EOK;
+}
+
+rt_err_t rt_set_irq_dvp_callback_hander(void (*p)(void))
+{
+    if(NULL == p)
+    {
+        LOG_E("set irq dcmi callback hander is NULL");
+        return RT_ERROR;
+    }
+    dvp_irq_callback = p;
+    return RT_EOK;
+    
+}
+int kendryte_dvp_init(void)
+{
+    int ret = 0;
+    rt_device_t dvp_dev = RT_NULL;
+    rt_dvp.dev.parent.type      = RT_Device_Class_Miscellaneous;
+    rt_dvp.dev.parent.init      = rt_dvp_init;
+    rt_dvp.dev.parent.open      = rt_dvp_open;
+    rt_dvp.dev.parent.close     = rt_dvp_close;
+    rt_dvp.dev.parent.read      = rt_dvp_read;
+    rt_dvp.dev.parent.write     = rt_dvp_write;
+    rt_dvp.dev.parent.control   = rt_dvp_control;
+    rt_dvp.dev.parent.user_data = RT_NULL;
+    ret = rt_device_register(&rt_dvp.dev.parent, "dvp", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE);
+    if(ret != RT_EOK)
+    {
+        LOG_E("dvp register fail!!\n\r");
+        return -RT_ERROR;
+    }
+    LOG_I("dvp register successfully");
+     dvp_dev = rt_device_find("dvp");
+    if (dvp_dev == RT_NULL)
+    {
+        LOG_E("can't find dvp device!");
+        return RT_ERROR;
+    }
+    ret = rt_device_open(dvp_dev, RT_DEVICE_FLAG_RDWR);
+    if(ret != RT_EOK)
+    {
+        LOG_E("can't open dvp device!");
+        return RT_ERROR;
+    }
+    LOG_I("dvp open successfully");
+    return RT_EOK;
+}
+INIT_BOARD_EXPORT(kendryte_dvp_init);
+#endif
+
+
+
+
+
diff --git a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_dvp.h b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_dvp.h
new file mode 100644
index 00000000..54c4539b
--- /dev/null
+++ b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_dvp.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author            Notes
+ * 2021-01-27     tianchunyu        the first version
+*/
+
+#ifndef __DRV_DVP_H__
+#define __DRV_DVP_H__
+#include <dvp.h>
+#include <fpioa.h>
+#include <sysctl.h>
+#include <plic.h>
+#include <sysctl.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct rt_dvp_device
+{
+    struct rt_device parent;
+};
+
+struct kendryte_dvp
+{
+    struct rt_dvp_device dev;
+};
+
+extern void rt_dvp_start(uint32_t pData, uint32_t Length);
+extern void rt_dvp_stop(void);
+extern rt_err_t rt_set_irq_dvp_callback_hander(void (*p)(void));
+
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
diff --git a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_io_config.c b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_io_config.c
new file mode 100644
index 00000000..c7e04668
--- /dev/null
+++ b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_io_config.c
@@ -0,0 +1,128 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-03-19     ZYH          first version
+ * 2021-01-28     tianchunyu   Modify macro definitions
+ */
+
+#include <rtthread.h>
+#include <fpioa.h>
+#include <drv_io_config.h>
+#include <sysctl.h>
+
+#define HS_GPIO(n) (FUNC_GPIOHS0 + n)
+
+#define IOCONFIG(pin,func)  {pin, func, #func}
+
+static struct io_config
+{
+    int io_num;
+    fpioa_function_t func;
+    const char * func_name;
+} io_config[] = 
+{  
+
+#ifdef BSP_USING_DVP
+    IOCONFIG(BSP_DVP_SCCB_SDA_PIN, FUNC_SCCB_SDA),
+    IOCONFIG(BSP_DVP_SCCB_SCLK_PIN, FUNC_SCCB_SCLK),
+    IOCONFIG(BSP_DVP_CMOS_RST_PIN, FUNC_CMOS_RST),
+    IOCONFIG(BSP_DVP_CMOS_VSYNC_PIN, FUNC_CMOS_VSYNC),
+    IOCONFIG(BSP_DVP_CMOS_PWDN_PIN, FUNC_CMOS_PWDN),
+    IOCONFIG(BSP_DVP_CMOS_XCLK_PIN, FUNC_CMOS_XCLK),
+    IOCONFIG(BSP_DVP_CMOS_PCLK_PIN, FUNC_CMOS_PCLK),
+    IOCONFIG(BSP_DVP_CMOS_HREF_PIN, FUNC_CMOS_HREF),
+#endif
+
+#ifdef BSP_USING_LCD
+    IOCONFIG(BSP_LCD_CS_PIN, FUNC_SPI0_SS3),                 /* LCD CS PIN */
+    IOCONFIG(BSP_LCD_WR_PIN, FUNC_SPI0_SCLK),                /* LCD WR PIN */
+    IOCONFIG(BSP_LCD_DC_PIN, FUNC_GPIOHS2),                 /* LCD DC PIN */
+    IOCONFIG(BSP_LCD_RST_PIN,FUNC_GPIOHS3),                 /* LCD DC PIN */
+#endif
+
+#ifdef BSP_USING_SPI1
+    IOCONFIG(BSP_SPI1_CLK_PIN, FUNC_SPI1_SCLK),
+    IOCONFIG(BSP_SPI1_D0_PIN, FUNC_SPI1_D0),
+    IOCONFIG(BSP_SPI1_D1_PIN, FUNC_SPI1_D1),
+#ifdef BSP_USING_SPI1_AS_QSPI
+    IOCONFIG(BSP_SPI1_D2_PIN, FUNC_SPI1_D2),
+    IOCONFIG(BSP_SPI1_D3_PIN, FUNC_SPI1_D3),
+#endif
+#ifdef BSP_SPI1_USING_SS0
+    IOCONFIG(BSP_SPI1_SS0_PIN, HS_GPIO(SPI1_CS0_PIN)),
+#endif
+#ifdef BSP_SPI1_USING_SS1
+    IOCONFIG(BSP_SPI1_SS1_PIN, HS_GPIO(SPI1_CS1_PIN)),
+#endif
+#ifdef BSP_SPI1_USING_SS2
+    IOCONFIG(BSP_SPI1_SS2_PIN, HS_GPIO(SPI1_CS2_PIN)),
+#endif
+#ifdef BSP_SPI1_USING_SS3
+    IOCONFIG(BSP_SPI1_SS3_PIN, HS_GPIO(SPI1_CS3_PIN)),
+#endif
+#endif
+
+#ifdef BSP_USING_UART1
+    IOCONFIG(BSP_UART1_TXD_PIN, FUNC_UART1_TX),
+    IOCONFIG(BSP_UART1_RXD_PIN, FUNC_UART1_RX),
+#endif
+#ifdef BSP_USING_UART2
+    IOCONFIG(BSP_UART2_TXD_PIN, FUNC_UART2_TX),
+    IOCONFIG(BSP_UART2_RXD_PIN, FUNC_UART2_RX),
+#endif
+#ifdef BSP_USING_UART3
+    IOCONFIG(BSP_UART3_TXD_PIN, FUNC_UART3_TX),
+    IOCONFIG(BSP_UART3_RXD_PIN, FUNC_UART3_RX),
+#endif
+};
+
+static int print_io_config()
+{
+    int i;
+    rt_kprintf("IO Configuration Table\n");
+    rt_kprintf("┌───────┬────────────────────────┐\n");
+    rt_kprintf("│Pin    │Function                │\n");
+    rt_kprintf("├───────┼────────────────────────┤\n");
+    for(i = 0; i < sizeof io_config / sizeof io_config[0]; i++)
+    {
+        rt_kprintf("│%-2d     │%-24.24s│\n", io_config[i].io_num, io_config[i].func_name);
+    }
+    rt_kprintf("└───────┴────────────────────────┘\n");
+    return 0;
+}
+MSH_CMD_EXPORT_ALIAS(print_io_config, io, print io config);
+
+int io_config_init(void)
+{
+    int count = sizeof(io_config) / sizeof(io_config[0]);
+    int i;
+
+    sysctl_set_power_mode(SYSCTL_POWER_BANK0, SYSCTL_POWER_V18);
+    sysctl_set_power_mode(SYSCTL_POWER_BANK1, SYSCTL_POWER_V18);
+    sysctl_set_power_mode(SYSCTL_POWER_BANK2, SYSCTL_POWER_V18);
+#ifdef BSP_USING_UART2
+    // for IO-27/28
+    sysctl_set_power_mode(SYSCTL_POWER_BANK4, SYSCTL_POWER_V33);
+#endif
+#if  defined(BSP_USING_UART1) || defined(BSP_USING_UART3)
+    // for IO-20~23
+    sysctl_set_power_mode(SYSCTL_POWER_BANK3, SYSCTL_POWER_V33);
+#endif
+
+    for(i = 0; i < count; i++)
+    {
+        fpioa_set_function(io_config[i].io_num, io_config[i].func);
+    }
+
+#if defined(BSP_USING_DVP) || defined(BSP_USING_LCD)
+    sysctl_set_spi0_dvp_data(1);
+    sysctl_set_power_mode(SYSCTL_POWER_BANK6, SYSCTL_POWER_V18);
+    sysctl_set_power_mode(SYSCTL_POWER_BANK7, SYSCTL_POWER_V18);
+#endif
+}
+INIT_BOARD_EXPORT(io_config_init);
+
diff --git a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_io_config.h b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_io_config.h
new file mode 100644
index 00000000..78db1d8c
--- /dev/null
+++ b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_io_config.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-03-19     ZYH          first version
+ */
+
+#ifndef __DRV_IO_CONFIG_H__
+#define __DRV_IO_CONFIG_H__
+
+enum HS_GPIO_CONFIG
+{
+#ifdef BSP_USING_LCD
+    LCD_DC_PIN = 0,     /* LCD DC PIN */
+#endif
+#ifdef BSP_SPI1_USING_SS0
+    SPI1_CS0_PIN,
+#endif
+#ifdef BSP_SPI1_USING_SS1
+    SPI1_CS1_PIN,
+#endif
+#ifdef BSP_SPI1_USING_SS2
+    SPI1_CS2_PIN,
+#endif
+#ifdef BSP_SPI1_USING_SS3
+    SPI1_CS3_PIN,
+#endif
+    GPIO_ALLOC_START /* index of gpio driver start */
+};
+
+extern int io_config_init(void);
+
+#endif
diff --git a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_lcd.c b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_lcd.c
new file mode 100644
index 00000000..abbe5216
--- /dev/null
+++ b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_lcd.c
@@ -0,0 +1,328 @@
+/* Copyright 2018 Canaan Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#include <rtthread.h>
+
+#ifdef BSP_USING_LCD
+#include <drv_lcd.h>
+#include <gpiohs.h>
+#include <spi.h>
+#include <unistd.h>
+#include <string.h>
+#include <fpioa.h>
+#define DBG_TAG  "LCD"
+#define DBG_LVL  DBG_LOG
+#include <rtdbg.h>
+
+
+
+static lcd_ctl_t lcd_ctl;
+
+static void  init_dcx(void)
+{
+    gpiohs_set_drive_mode(DCX_GPIONUM, GPIO_DM_OUTPUT);
+    gpiohs_set_pin(DCX_GPIONUM, GPIO_PV_HIGH);
+}
+
+static void set_dcx_control(void)
+{
+    gpiohs_set_pin(DCX_GPIONUM, GPIO_PV_LOW);
+}
+
+static void set_dcx_data(void)
+{
+    gpiohs_set_pin(DCX_GPIONUM, GPIO_PV_HIGH);
+}
+
+
+static void init_rst(void)
+{
+    gpiohs_set_drive_mode(RST_GPIONUM, GPIO_DM_OUTPUT);
+    gpiohs_set_pin(RST_GPIONUM, GPIO_PV_LOW);
+    usleep(100000);
+    gpiohs_set_pin(RST_GPIONUM, GPIO_PV_HIGH);
+    usleep(100000);
+}
+
+
+void tft_hard_init(void)
+{
+    init_dcx();
+    spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 8, 0);
+    init_rst();
+    spi_set_clk_rate(SPI_CHANNEL, 20000000);
+}
+
+void tft_write_command(uint8_t cmd)
+{
+    set_dcx_control();
+    spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 8, 0);
+    spi_init_non_standard(SPI_CHANNEL, 8/*instrction length*/, 0/*address length*/, 0/*wait cycles*/,
+                          SPI_AITM_AS_FRAME_FORMAT/*spi address trans mode*/);
+    spi_send_data_normal_dma(DMAC_CHANNEL0, SPI_CHANNEL, SPI_SLAVE_SELECT, (uint8_t *)(&cmd), 1,SPI_TRANS_CHAR);
+}
+
+void tft_write_byte(uint8_t *data_buf, uint32_t length)
+{
+    set_dcx_data();
+    spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 8, 0);
+    spi_init_non_standard(SPI_CHANNEL, 8/*instrction length*/, 0/*address length*/, 0/*wait cycles*/,
+                          SPI_AITM_AS_FRAME_FORMAT/*spi address trans mode*/);
+    spi_send_data_normal_dma(DMAC_CHANNEL0, SPI_CHANNEL, SPI_SLAVE_SELECT, data_buf, length, SPI_TRANS_CHAR);
+}
+
+void tft_write_half(uint16_t *data_buf, uint32_t length)
+{
+    set_dcx_data();
+    spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 16, 0);
+    spi_init_non_standard(SPI_CHANNEL, 16/*instrction length*/, 0/*address length*/, 0/*wait cycles*/,
+                          SPI_AITM_AS_FRAME_FORMAT/*spi address trans mode*/);
+    spi_send_data_normal_dma(DMAC_CHANNEL0, SPI_CHANNEL, SPI_SLAVE_SELECT,data_buf, length, SPI_TRANS_SHORT);
+}
+
+void tft_write_word(uint32_t *data_buf, uint32_t length, uint32_t flag)
+{
+    set_dcx_data();
+    spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 32, 0);
+
+    spi_init_non_standard(SPI_CHANNEL, 0/*instrction length*/, 32/*address length*/, 0/*wait cycles*/,
+                          SPI_AITM_AS_FRAME_FORMAT/*spi address trans mode*/);
+    spi_send_data_normal_dma(DMAC_CHANNEL0, SPI_CHANNEL, SPI_SLAVE_SELECT,data_buf, length, SPI_TRANS_INT);
+}
+
+void tft_fill_data(uint32_t *data_buf, uint32_t length)
+{
+    set_dcx_data();
+    spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 32, 0);
+    spi_init_non_standard(SPI_CHANNEL, 0/*instrction length*/, 32/*address length*/, 0/*wait cycles*/,
+                          SPI_AITM_AS_FRAME_FORMAT/*spi address trans mode*/);
+    spi_fill_data_dma(DMAC_CHANNEL0, SPI_CHANNEL, SPI_SLAVE_SELECT,data_buf, length);
+}
+
+void lcd_polling_enable(void)
+{
+    lcd_ctl.mode = 0;
+}
+
+void lcd_interrupt_enable(void)
+{
+    lcd_ctl.mode = 1;
+}
+
+int lcd_init(void)
+{
+
+    uint8_t data = 0;
+    tft_hard_init();
+    /*soft reset*/
+    tft_write_command(SOFTWARE_RESET);
+    usleep(100000);
+    /*exit sleep*/
+    tft_write_command(SLEEP_OFF);
+    usleep(100000);
+    /*pixel format*/
+    tft_write_command(PIXEL_FORMAT_SET);
+    data = 0x55;
+    tft_write_byte(&data, 1);
+    /*display on*/
+    tft_write_command(DISPALY_ON);
+    lcd_polling_enable();
+    lcd_clear(PINK); 
+    lcd_set_direction(DIR_YX_RLDU);
+    LOG_I("LCD initialization successfully");
+}
+INIT_APP_EXPORT(lcd_init);
+
+
+
+void lcd_set_direction(lcd_dir_t dir)
+{
+    lcd_ctl.dir = dir;
+    if (dir & DIR_XY_MASK)
+    {
+        lcd_ctl.width = LCD_Y_MAX - 1;
+        lcd_ctl.height = LCD_X_MAX - 1;
+    }
+    else
+    {
+        lcd_ctl.width = LCD_X_MAX - 1;
+        lcd_ctl.height = LCD_Y_MAX - 1;
+    }
+
+    tft_write_command(MEMORY_ACCESS_CTL);
+    tft_write_byte((uint8_t *)&dir, 1);
+}
+
+void lcd_set_area(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2)
+{
+    uint8_t data[4] = {0};
+
+    data[0] = (uint8_t)(x1 >> 8);
+    data[1] = (uint8_t)(x1);
+    data[2] = (uint8_t)(x2 >> 8);
+    data[3] = (uint8_t)(x2);
+    tft_write_command(HORIZONTAL_ADDRESS_SET);
+    tft_write_byte(data, 4);
+
+    data[0] = (uint8_t)(y1 >> 8);
+    data[1] = (uint8_t)(y1);
+    data[2] = (uint8_t)(y2 >> 8);
+    data[3] = (uint8_t)(y2);
+    tft_write_command(VERTICAL_ADDRESS_SET);
+    tft_write_byte(data, 4);
+
+    tft_write_command(MEMORY_WRITE);
+}
+
+void lcd_draw_point(uint16_t x, uint16_t y, uint16_t color)
+{
+    lcd_set_area(x, y, x, y);
+    tft_write_half(&color, 1);
+}
+
+void lcd_draw_char(uint16_t x, uint16_t y, char c, uint16_t color)
+{
+    uint8_t i = 0;
+    uint8_t j = 0;
+    uint8_t data = 0;
+
+    for (i = 0; i < 16; i++)
+    {
+        data = ascii0816[c * 16 + i];
+        for (j = 0; j < 8; j++)
+        {
+            if (data & 0x80)
+                lcd_draw_point(x + j, y, color);
+            data <<= 1;
+        }
+        y++;
+    }
+}
+
+void lcd_draw_string(uint16_t x, uint16_t y, char *str, uint16_t color)
+{
+    while (*str)
+    {
+        lcd_draw_char(x, y, *str, color);
+        str++;
+        x += 8;
+    }
+}
+
+void lcd_ram_draw_string(char *str, uint32_t *ptr, uint16_t font_color, uint16_t bg_color)
+{
+    uint8_t i = 0;
+    uint8_t j = 0;
+    uint8_t data = 0;
+    uint8_t *pdata = NULL;
+    uint16_t width = 0;
+    uint32_t *pixel = NULL;
+
+    width = 4 * strlen(str);
+    while (*str)
+    {
+        pdata = (uint8_t *)&ascii0816[(*str) * 16];
+        for (i = 0; i < 16; i++)
+        {
+            data = *pdata++;
+            pixel = ptr + i * width;
+            for (j = 0; j < 4; j++)
+            {
+                switch (data >> 6)
+                {
+                    case 0:
+                        *pixel = ((uint32_t)bg_color << 16) | bg_color;
+                        break;
+                    case 1:
+                        *pixel = ((uint32_t)bg_color << 16) | font_color;
+                        break;
+                    case 2:
+                        *pixel = ((uint32_t)font_color << 16) | bg_color;
+                        break;
+                    case 3:
+                        *pixel = ((uint32_t)font_color << 16) | font_color;
+                        break;
+                    default:
+                        *pixel = 0;
+                        break;
+                }
+                data <<= 2;
+                pixel++;
+            }
+        }
+        str++;
+        ptr += 4;
+    }
+}
+
+void lcd_clear(uint16_t color)
+{
+    uint32_t data = ((uint32_t)color << 16) | (uint32_t)color;
+
+    lcd_set_area(0, 0, lcd_ctl.width, lcd_ctl.height);
+    tft_fill_data(&data, LCD_X_MAX * LCD_Y_MAX / 2);
+}
+
+void lcd_draw_rectangle(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2, uint16_t width, uint16_t color)
+{
+    uint32_t data_buf[640] = {0};
+    uint32_t *p = data_buf;
+    uint32_t data = color;
+    uint32_t index = 0;
+
+    data = (data << 16) | data;
+    for (index = 0; index < 160 * width; index++)
+        *p++ = data;
+
+    lcd_set_area(x1, y1, x2, y1 + width - 1);
+    tft_write_word(data_buf, ((x2 - x1 + 1) * width + 1) / 2, 0);
+    lcd_set_area(x1, y2 - width + 1, x2, y2);
+    tft_write_word(data_buf, ((x2 - x1 + 1) * width + 1) / 2, 0);
+    lcd_set_area(x1, y1, x1 + width - 1, y2);
+    tft_write_word(data_buf, ((y2 - y1 + 1) * width + 1) / 2, 0);
+    lcd_set_area(x2 - width + 1, y1, x2, y2);
+    tft_write_word(data_buf, ((y2 - y1 + 1) * width + 1) / 2, 0);
+}
+
+void lcd_draw_picture(uint16_t x1, uint16_t y1, uint16_t width, uint16_t height, uint32_t *ptr)
+{
+    lcd_set_area(x1, y1, x1 + width - 1, y1 + height - 1);
+    tft_write_word(ptr, width * height / 2, lcd_ctl.mode ? 2 : 0);
+}
+void lcd_pre()
+{
+    fpioa_set_function(38, FUNC_GPIOHS0 + DCX_GPIONUM);
+    fpioa_set_function(36, FUNC_SPI0_SS3);
+    fpioa_set_function(39, FUNC_SPI0_SCLK);
+    fpioa_set_function(37, FUNC_GPIOHS0 + RST_GPIONUM);
+
+}
+void lcd_test0()
+{
+    char test[]={"xuos-intelligence framwork"};
+    lcd_draw_string(0,0,test,BLUE);
+
+}
+MSH_CMD_EXPORT(lcd_test0,lcd show string);
+
+void lcd_test1()
+{
+   lcd_clear(YELLOW); 
+
+}
+MSH_CMD_EXPORT(lcd_test1,lcd show string);
+
+#endif
diff --git a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_lcd.h b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_lcd.h
new file mode 100644
index 00000000..f7592694
--- /dev/null
+++ b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/drv_lcd.h
@@ -0,0 +1,519 @@
+/* Copyright 2018 Canaan Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#ifndef _DRV_LCD_H__
+#define _DRV_LCD_H__
+
+#include <stdint.h>
+/* clang-format off */
+#define NO_OPERATION            0x00
+#define SOFTWARE_RESET          0x01
+#define READ_ID                 0x04
+#define READ_STATUS             0x09
+#define READ_POWER_MODE         0x0A
+#define READ_MADCTL             0x0B
+#define READ_PIXEL_FORMAT       0x0C
+#define READ_IMAGE_FORMAT       0x0D
+#define READ_SIGNAL_MODE        0x0E
+#define READ_SELT_DIAG_RESULT   0x0F
+#define SLEEP_ON                0x10
+#define SLEEP_OFF               0x11
+#define PARTIAL_DISPALY_ON      0x12
+#define NORMAL_DISPALY_ON       0x13
+#define INVERSION_DISPALY_OFF   0x20
+#define INVERSION_DISPALY_ON    0x21
+#define GAMMA_SET               0x26
+#define DISPALY_OFF             0x28
+#define DISPALY_ON              0x29
+#define HORIZONTAL_ADDRESS_SET  0x2A
+#define VERTICAL_ADDRESS_SET    0x2B
+#define MEMORY_WRITE            0x2C
+#define COLOR_SET               0x2D
+#define MEMORY_READ             0x2E
+#define PARTIAL_AREA            0x30
+#define VERTICAL_SCROL_DEFINE   0x33
+#define TEAR_EFFECT_LINE_OFF    0x34
+#define TEAR_EFFECT_LINE_ON     0x35
+#define MEMORY_ACCESS_CTL       0x36
+#define VERTICAL_SCROL_S_ADD    0x37
+#define IDLE_MODE_OFF           0x38
+#define IDLE_MODE_ON            0x39
+#define PIXEL_FORMAT_SET        0x3A
+#define WRITE_MEMORY_CONTINUE   0x3C
+#define READ_MEMORY_CONTINUE    0x3E
+#define SET_TEAR_SCANLINE       0x44
+#define GET_SCANLINE            0x45
+#define WRITE_BRIGHTNESS        0x51
+#define READ_BRIGHTNESS         0x52
+#define WRITE_CTRL_DISPALY      0x53
+#define READ_CTRL_DISPALY       0x54
+#define WRITE_BRIGHTNESS_CTL    0x55
+#define READ_BRIGHTNESS_CTL     0x56
+#define WRITE_MIN_BRIGHTNESS    0x5E
+#define READ_MIN_BRIGHTNESS     0x5F
+#define READ_ID1                0xDA
+#define READ_ID2                0xDB
+#define READ_ID3                0xDC
+#define RGB_IF_SIGNAL_CTL       0xB0
+#define NORMAL_FRAME_CTL        0xB1
+#define IDLE_FRAME_CTL          0xB2
+#define PARTIAL_FRAME_CTL       0xB3
+#define INVERSION_CTL           0xB4
+#define BLANK_PORCH_CTL         0xB5
+#define DISPALY_FUNCTION_CTL    0xB6
+#define ENTRY_MODE_SET          0xB7
+#define BACKLIGHT_CTL1          0xB8
+#define BACKLIGHT_CTL2          0xB9
+#define BACKLIGHT_CTL3          0xBA
+#define BACKLIGHT_CTL4          0xBB
+#define BACKLIGHT_CTL5          0xBC
+#define BACKLIGHT_CTL7          0xBE
+#define BACKLIGHT_CTL8          0xBF
+#define POWER_CTL1              0xC0
+#define POWER_CTL2              0xC1
+#define VCOM_CTL1               0xC5
+#define VCOM_CTL2               0xC7
+#define NV_MEMORY_WRITE         0xD0
+#define NV_MEMORY_PROTECT_KEY   0xD1
+#define NV_MEMORY_STATUS_READ   0xD2
+#define READ_ID4                0xD3
+#define POSITIVE_GAMMA_CORRECT  0xE0
+#define NEGATIVE_GAMMA_CORRECT  0xE1
+#define DIGITAL_GAMMA_CTL1      0xE2
+#define DIGITAL_GAMMA_CTL2      0xE3
+#define INTERFACE_CTL           0xF6
+
+#define DCX_GPIONUM             (2)
+#define RST_GPIONUM             (3)
+
+#define SPI_CHANNEL             0
+#define SPI_SLAVE_SELECT        3
+
+/* clang-format off */
+#define LCD_X_MAX   (240)
+#define LCD_Y_MAX   (320)
+
+#define BLACK       0x0000
+#define NAVY        0x000F
+#define DARKGREEN   0x03E0
+#define DARKCYAN    0x03EF
+#define MAROON      0x7800
+#define PURPLE      0x780F
+#define OLIVE       0x7BE0
+#define LIGHTGREY   0xC618
+#define DARKGREY    0x7BEF
+#define BLUE        0x001F
+#define GREEN       0x07E0
+#define CYAN        0x07FF
+#define RED         0xF800
+#define MAGENTA     0xF81F
+#define YELLOW      0xFFE0
+#define WHITE       0xFFFF
+#define ORANGE      0xFD20
+#define GREENYELLOW 0xAFE5
+#define PINK        0xF81F
+#define USER_COLOR  0xAA55
+/* clang-format on */
+
+uint8_t const ascii0816[] =
+{
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7E, 0x81, 0xA5, 0x81, 0x81, 0xBD,
+    0x99, 0x81, 0x81, 0x7E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7E, 0xFF,
+    0xDB, 0xFF, 0xFF, 0xC3, 0xE7, 0xFF, 0xFF, 0x7E, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x6C, 0xFE, 0xFE, 0xFE, 0xFE, 0x7C, 0x38, 0x10,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x38, 0x7C, 0xFE,
+    0x7C, 0x38, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18,
+    0x3C, 0x3C, 0xE7, 0xE7, 0xE7, 0x18, 0x18, 0x3C, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x18, 0x3C, 0x7E, 0xFF, 0xFF, 0x7E, 0x18, 0x18, 0x3C,
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+    0x3C, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF,
+    0xFF, 0xFF, 0xE7, 0xC3, 0xC3, 0xE7, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x66, 0x42, 0x42, 0x66, 0x3C, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xC3, 0x99, 0xBD,
+    0xBD, 0x99, 0xC3, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x1E, 0x0E,
+    0x1A, 0x32, 0x78, 0xCC, 0xCC, 0xCC, 0xCC, 0x78, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x3C, 0x66, 0x66, 0x66, 0x66, 0x3C, 0x18, 0x7E, 0x18, 0x18,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0x33, 0x3F, 0x30, 0x30, 0x30,
+    0x30, 0x70, 0xF0, 0xE0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7F, 0x63,
+    0x7F, 0x63, 0x63, 0x63, 0x63, 0x67, 0xE7, 0xE6, 0xC0, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x18, 0x18, 0xDB, 0x3C, 0xE7, 0x3C, 0xDB, 0x18, 0x18,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xC0, 0xE0, 0xF0, 0xF8, 0xFE, 0xF8,
+    0xF0, 0xE0, 0xC0, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x06, 0x0E,
+    0x1E, 0x3E, 0xFE, 0x3E, 0x1E, 0x0E, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x18, 0x3C, 0x7E, 0x18, 0x18, 0x18, 0x7E, 0x3C, 0x18, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66,
+    0x66, 0x00, 0x66, 0x66, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7F, 0xDB,
+    0xDB, 0xDB, 0x7B, 0x1B, 0x1B, 0x1B, 0x1B, 0x1B, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x7C, 0xC6, 0x60, 0x38, 0x6C, 0xC6, 0xC6, 0x6C, 0x38, 0x0C, 0xC6,
+    0x7C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0xFE, 0xFE, 0xFE, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x3C,
+    0x7E, 0x18, 0x18, 0x18, 0x7E, 0x3C, 0x18, 0x7E, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x18, 0x3C, 0x7E, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+    0x18, 0x7E, 0x3C, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x18, 0x0C, 0xFE, 0x0C, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x60, 0xFE, 0x60, 0x30, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0xC0,
+    0xC0, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x28, 0x6C, 0xFE, 0x6C, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x10, 0x38, 0x38, 0x7C, 0x7C, 0xFE, 0xFE, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFE, 0xFE, 0x7C, 0x7C,
+    0x38, 0x38, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x18, 0x3C, 0x3C, 0x3C, 0x18, 0x18, 0x18, 0x00, 0x18, 0x18,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x66, 0x66, 0x24, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x6C,
+    0x6C, 0xFE, 0x6C, 0x6C, 0x6C, 0xFE, 0x6C, 0x6C, 0x00, 0x00, 0x00, 0x00,
+    0x18, 0x18, 0x7C, 0xC6, 0xC2, 0xC0, 0x7C, 0x06, 0x06, 0x86, 0xC6, 0x7C,
+    0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC2, 0xC6, 0x0C, 0x18,
+    0x30, 0x60, 0xC6, 0x86, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x6C,
+    0x6C, 0x38, 0x76, 0xDC, 0xCC, 0xCC, 0xCC, 0x76, 0x00, 0x00, 0x00, 0x00,
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+    0x30, 0x30, 0x18, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x18,
+    0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x18, 0x30, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x3C, 0xFF, 0x3C, 0x66, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x7E,
+    0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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+    0x00, 0x00, 0x38, 0x6C, 0xC6, 0xC6, 0xD6, 0xD6, 0xC6, 0xC6, 0x6C, 0x38,
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+    0x30, 0x30, 0x30, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7C, 0xC6,
+    0xC6, 0xC6, 0x7C, 0xC6, 0xC6, 0xC6, 0xC6, 0x7C, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x7C, 0xC6, 0xC6, 0xC6, 0x7E, 0x06, 0x06, 0x06, 0x0C, 0x78,
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+    0x00, 0x00, 0x7C, 0xC6, 0xC6, 0x0C, 0x18, 0x18, 0x18, 0x00, 0x18, 0x18,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7C, 0xC6, 0xC6, 0xDE, 0xDE,
+    0xDE, 0xDC, 0xC0, 0x7C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x38,
+    0x6C, 0xC6, 0xC6, 0xFE, 0xC6, 0xC6, 0xC6, 0xC6, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0xFC, 0x66, 0x66, 0x66, 0x7C, 0x66, 0x66, 0x66, 0x66, 0xFC,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x66, 0xC2, 0xC0, 0xC0, 0xC0,
+    0xC0, 0xC2, 0x66, 0x3C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF8, 0x6C,
+    0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x6C, 0xF8, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0xFE, 0x66, 0x62, 0x68, 0x78, 0x68, 0x60, 0x62, 0x66, 0xFE,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFE, 0x66, 0x62, 0x68, 0x78, 0x68,
+    0x60, 0x60, 0x60, 0xF0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x66,
+    0xC2, 0xC0, 0xC0, 0xDE, 0xC6, 0xC6, 0x66, 0x3A, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0xC6, 0xC6, 0xC6, 0xC6, 0xFE, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x18, 0x18, 0x18, 0x18, 0x18,
+    0x18, 0x18, 0x18, 0x3C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1E, 0x0C,
+    0x0C, 0x0C, 0x0C, 0x0C, 0xCC, 0xCC, 0xCC, 0x78, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0xE6, 0x66, 0x66, 0x6C, 0x78, 0x78, 0x6C, 0x66, 0x66, 0xE6,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0x60, 0x60, 0x60, 0x60, 0x60,
+    0x60, 0x62, 0x66, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC6, 0xEE,
+    0xFE, 0xFE, 0xD6, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0xC6, 0xE6, 0xF6, 0xFE, 0xDE, 0xCE, 0xC6, 0xC6, 0xC6, 0xC6,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7C, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6,
+    0xC6, 0xC6, 0xC6, 0x7C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFC, 0x66,
+    0x66, 0x66, 0x7C, 0x60, 0x60, 0x60, 0x60, 0xF0, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x7C, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0xD6, 0xDE, 0x7C,
+    0x0C, 0x0E, 0x00, 0x00, 0x00, 0x00, 0xFC, 0x66, 0x66, 0x66, 0x7C, 0x6C,
+    0x66, 0x66, 0x66, 0xE6, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7C, 0xC6,
+    0xC6, 0x60, 0x38, 0x0C, 0x06, 0xC6, 0xC6, 0x7C, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x7E, 0x7E, 0x5A, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x3C,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6,
+    0xC6, 0xC6, 0xC6, 0x7C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC6, 0xC6,
+    0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0x6C, 0x38, 0x10, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0xC6, 0xC6, 0xC6, 0xC6, 0xD6, 0xD6, 0xD6, 0xFE, 0xEE, 0x6C,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC6, 0xC6, 0x6C, 0x7C, 0x38, 0x38,
+    0x7C, 0x6C, 0xC6, 0xC6, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x66,
+    0x66, 0x66, 0x3C, 0x18, 0x18, 0x18, 0x18, 0x3C, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0xFE, 0xC6, 0x86, 0x0C, 0x18, 0x30, 0x60, 0xC2, 0xC6, 0xFE,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x30, 0x30, 0x30, 0x30, 0x30,
+    0x30, 0x30, 0x30, 0x3C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
+    0xC0, 0xE0, 0x70, 0x38, 0x1C, 0x0E, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x3C, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x3C,
+    0x00, 0x00, 0x00, 0x00, 0x10, 0x38, 0x6C, 0xC6, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x00, 0x00,
+    0x30, 0x30, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x0C, 0x7C,
+    0xCC, 0xCC, 0xCC, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x60,
+    0x60, 0x78, 0x6C, 0x66, 0x66, 0x66, 0x66, 0x7C, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x7C, 0xC6, 0xC0, 0xC0, 0xC0, 0xC6, 0x7C,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1C, 0x0C, 0x0C, 0x3C, 0x6C, 0xCC,
+    0xCC, 0xCC, 0xCC, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x7C, 0xC6, 0xFE, 0xC0, 0xC0, 0xC6, 0x7C, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x38, 0x6C, 0x64, 0x60, 0xF0, 0x60, 0x60, 0x60, 0x60, 0xF0,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x76, 0xCC, 0xCC,
+    0xCC, 0xCC, 0xCC, 0x7C, 0x0C, 0xCC, 0x78, 0x00, 0x00, 0x00, 0xE0, 0x60,
+    0x60, 0x6C, 0x76, 0x66, 0x66, 0x66, 0x66, 0xE6, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x18, 0x18, 0x00, 0x38, 0x18, 0x18, 0x18, 0x18, 0x18, 0x3C,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x06, 0x00, 0x0E, 0x06, 0x06,
+    0x06, 0x06, 0x06, 0x06, 0x66, 0x66, 0x3C, 0x00, 0x00, 0x00, 0xE0, 0x60,
+    0x60, 0x66, 0x6C, 0x78, 0x78, 0x6C, 0x66, 0xE6, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x38, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x3C,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xEC, 0xFE, 0xD6,
+    0xD6, 0xD6, 0xD6, 0xC6, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0xDC, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x00, 0x00, 0x00, 0x00,
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+    0x66, 0x66, 0x66, 0x7C, 0x60, 0x60, 0xF0, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x76, 0xCC, 0xCC, 0xCC, 0xCC, 0xCC, 0x7C, 0x0C, 0x0C, 0x1E, 0x00,
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+    0x38, 0x0C, 0xC6, 0x7C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x30,
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+    0xCC, 0xCC, 0xCC, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x6C, 0x38,
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+    0x3C, 0x00, 0x00, 0x00, 0x00, 0x10, 0x38, 0x6C, 0x00, 0x7C, 0xC6, 0xFE,
+    0xC0, 0xC0, 0xC6, 0x7C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC6, 0x00,
+    0x00, 0x7C, 0xC6, 0xFE, 0xC0, 0xC0, 0xC6, 0x7C, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x60, 0x30, 0x18, 0x00, 0x7C, 0xC6, 0xFE, 0xC0, 0xC0, 0xC6, 0x7C,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x00, 0x00, 0x38, 0x18, 0x18,
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+    0x00, 0x60, 0x30, 0x18, 0x00, 0x38, 0x18, 0x18, 0x18, 0x18, 0x18, 0x3C,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0xC6, 0x00, 0x10, 0x38, 0x6C, 0xC6, 0xC6,
+    0xFE, 0xC6, 0xC6, 0xC6, 0x00, 0x00, 0x00, 0x00, 0x38, 0x6C, 0x38, 0x00,
+    0x38, 0x6C, 0xC6, 0xC6, 0xFE, 0xC6, 0xC6, 0xC6, 0x00, 0x00, 0x00, 0x00,
+    0x18, 0x30, 0x60, 0x00, 0xFE, 0x66, 0x60, 0x7C, 0x60, 0x60, 0x66, 0xFE,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xCC, 0x76, 0x36,
+    0x7E, 0xD8, 0xD8, 0x6E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3E, 0x6C,
+    0xCC, 0xCC, 0xFE, 0xCC, 0xCC, 0xCC, 0xCC, 0xCE, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x10, 0x38, 0x6C, 0x00, 0x7C, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0x7C,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC6, 0x00, 0x00, 0x7C, 0xC6, 0xC6,
+    0xC6, 0xC6, 0xC6, 0x7C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0x30, 0x18,
+    0x00, 0x7C, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0x7C, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x30, 0x78, 0xCC, 0x00, 0xCC, 0xCC, 0xCC, 0xCC, 0xCC, 0xCC, 0x76,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0x30, 0x18, 0x00, 0xCC, 0xCC, 0xCC,
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+    0x00, 0xC6, 0x00, 0x7C, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0x7C,
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+    0xC6, 0xC6, 0xC6, 0x7C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x3C,
+    0x66, 0x60, 0x60, 0x60, 0x66, 0x3C, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x38, 0x6C, 0x64, 0x60, 0xF0, 0x60, 0x60, 0x60, 0x60, 0xE6, 0xFC,
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+    0x7E, 0x18, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF8, 0xCC, 0xCC,
+    0xF8, 0xC4, 0xCC, 0xDE, 0xCC, 0xCC, 0xCC, 0xC6, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x0E, 0x1B, 0x18, 0x18, 0x18, 0x7E, 0x18, 0x18, 0x18, 0x18, 0x18,
+    0xD8, 0x70, 0x00, 0x00, 0x00, 0x18, 0x30, 0x60, 0x00, 0x78, 0x0C, 0x7C,
+    0xCC, 0xCC, 0xCC, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x18, 0x30,
+    0x00, 0x38, 0x18, 0x18, 0x18, 0x18, 0x18, 0x3C, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x18, 0x30, 0x60, 0x00, 0x7C, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0x7C,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x30, 0x60, 0x00, 0xCC, 0xCC, 0xCC,
+    0xCC, 0xCC, 0xCC, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x76, 0xDC,
+    0x00, 0xDC, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x00, 0x00, 0x00, 0x00,
+    0x76, 0xDC, 0x00, 0xC6, 0xE6, 0xF6, 0xFE, 0xDE, 0xCE, 0xC6, 0xC6, 0xC6,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x6C, 0x6C, 0x3E, 0x00, 0x7E, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x6C, 0x6C,
+    0x38, 0x00, 0x7C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x30, 0x30, 0x00, 0x30, 0x30, 0x60, 0xC0, 0xC6, 0xC6, 0x7C,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFE, 0xC0,
+    0xC0, 0xC0, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0xFE, 0x06, 0x06, 0x06, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0xC0, 0xC0, 0xC2, 0xC6, 0xCC, 0x18, 0x30, 0x60, 0xDC, 0x86, 0x0C,
+    0x18, 0x3E, 0x00, 0x00, 0x00, 0xC0, 0xC0, 0xC2, 0xC6, 0xCC, 0x18, 0x30,
+    0x66, 0xCE, 0x9E, 0x3E, 0x06, 0x06, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18,
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+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xD8, 0x6C, 0x36,
+    0x6C, 0xD8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x44, 0x11, 0x44,
+    0x11, 0x44, 0x11, 0x44, 0x11, 0x44, 0x11, 0x44, 0x11, 0x44, 0x11, 0x44,
+    0x55, 0xAA, 0x55, 0xAA, 0x55, 0xAA, 0x55, 0xAA, 0x55, 0xAA, 0x55, 0xAA,
+    0x55, 0xAA, 0x55, 0xAA, 0xDD, 0x77, 0xDD, 0x77, 0xDD, 0x77, 0xDD, 0x77,
+    0xDD, 0x77, 0xDD, 0x77, 0xDD, 0x77, 0xDD, 0x77, 0x18, 0x18, 0x18, 0x18,
+    0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+    0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0xF8, 0x18, 0x18, 0x18, 0x18,
+    0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0xF8, 0x18, 0xF8,
+    0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0xF6, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFE, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0x36, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF8, 0x18, 0xF8,
+    0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0xF6, 0x06, 0xF6, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0x36, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFE, 0x06, 0xF6,
+    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0xF6, 0x06, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0xFE, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x18, 0x18, 0x18, 0xF8, 0x18, 0xF8,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0xF8, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+    0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x1F, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0xFF,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0xFF, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+    0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x1F, 0x18, 0x18, 0x18, 0x18,
+    0x18, 0x18, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x18, 0x18,
+    0x18, 0x18, 0x18, 0xFF, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+    0x18, 0x18, 0x18, 0x18, 0x18, 0x1F, 0x18, 0x1F, 0x18, 0x18, 0x18, 0x18,
+    0x18, 0x18, 0x18, 0x18, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x37,
+    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x37, 0x30, 0x3F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0x30, 0x37, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0xF7, 0x00, 0xFF,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0xFF, 0x00, 0xF7, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0x36, 0x36, 0x37, 0x30, 0x37, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0x36, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x00, 0xFF,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0xF7, 0x00, 0xF7, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x18, 0x18, 0x18, 0x18, 0x18, 0xFF, 0x00, 0xFF, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0xFF,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0xFF, 0x00, 0xFF, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x3F,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x18, 0x18,
+    0x18, 0x1F, 0x18, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x1F, 0x18, 0x1F, 0x18, 0x18, 0x18, 0x18,
+    0x18, 0x18, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F,
+    0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x36, 0x36, 0x36, 0xFF, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
+    0x18, 0x18, 0x18, 0x18, 0x18, 0xFF, 0x18, 0xFF, 0x18, 0x18, 0x18, 0x18,
+    0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0xF8,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x1F, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+    0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF,
+    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF0, 0xF0, 0xF0, 0xF0,
+    0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 0xF0,
+    0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F,
+    0x0F, 0x0F, 0x0F, 0x0F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x76, 0xDC, 0xD8, 0xD8, 0xD8, 0xDC, 0x76, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x78, 0xCC, 0xCC, 0xCC, 0xD8, 0xCC, 0xC6, 0xC6, 0xC6, 0xCC,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFE, 0xC6, 0xC6, 0xC0, 0xC0, 0xC0,
+    0xC0, 0xC0, 0xC0, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0xFE, 0x6C, 0x6C, 0x6C, 0x6C, 0x6C, 0x6C, 0x6C, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0xFE, 0xC6, 0x60, 0x30, 0x18, 0x30, 0x60, 0xC6, 0xFE,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7E, 0xD8, 0xD8,
+    0xD8, 0xD8, 0xD8, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x66, 0x66, 0x66, 0x66, 0x66, 0x7C, 0x60, 0x60, 0xC0, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x76, 0xDC, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7E, 0x18, 0x3C, 0x66, 0x66,
+    0x66, 0x3C, 0x18, 0x7E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38,
+    0x6C, 0xC6, 0xC6, 0xFE, 0xC6, 0xC6, 0x6C, 0x38, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x38, 0x6C, 0xC6, 0xC6, 0xC6, 0x6C, 0x6C, 0x6C, 0x6C, 0xEE,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1E, 0x30, 0x18, 0x0C, 0x3E, 0x66,
+    0x66, 0x66, 0x66, 0x3C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x7E, 0xDB, 0xDB, 0xDB, 0x7E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x03, 0x06, 0x7E, 0xDB, 0xDB, 0xF3, 0x7E, 0x60, 0xC0,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1C, 0x30, 0x60, 0x60, 0x7C, 0x60,
+    0x60, 0x60, 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7C,
+    0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0xFE, 0x00, 0x00, 0xFE, 0x00, 0x00, 0xFE, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x7E, 0x18,
+    0x18, 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30,
+    0x18, 0x0C, 0x06, 0x0C, 0x18, 0x30, 0x00, 0x7E, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x0C, 0x18, 0x30, 0x60, 0x30, 0x18, 0x0C, 0x00, 0x7E,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0E, 0x1B, 0x1B, 0x18, 0x18, 0x18,
+    0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+    0x18, 0x18, 0x18, 0x18, 0xD8, 0xD8, 0xD8, 0x70, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x7E, 0x00, 0x18, 0x18, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x76, 0xDC, 0x00,
+    0x76, 0xDC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x6C, 0x6C,
+    0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0F, 0x0C, 0x0C,
+    0x0C, 0x0C, 0x0C, 0xEC, 0x6C, 0x6C, 0x3C, 0x1C, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0xD8, 0x6C, 0x6C, 0x6C, 0x6C, 0x6C, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0xD8, 0x30, 0x60, 0xC8, 0xF8, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x7C, 0x7C, 0x7C, 0x7C, 0x7C, 0x7C, 0x7C, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x00, 0x00
+};
+
+
+typedef enum _lcd_dir
+{
+    DIR_XY_RLUD = 0x00,
+    DIR_YX_RLUD = 0x20,
+    DIR_XY_LRUD = 0x40,
+    DIR_YX_LRUD = 0x60,
+    DIR_XY_RLDU = 0x80,
+    DIR_YX_RLDU = 0xA0,
+    DIR_XY_LRDU = 0xC0,
+    DIR_YX_LRDU = 0xE0,
+    DIR_XY_MASK = 0x20,
+    DIR_MASK = 0xE0,
+} lcd_dir_t;
+
+typedef struct _lcd_ctl
+{
+    uint8_t mode;
+    uint8_t dir;
+    uint16_t width;
+    uint16_t height;
+} lcd_ctl_t;
+
+void tft_hard_init(void);
+void tft_write_command(uint8_t cmd);
+void tft_write_byte(uint8_t *data_buf, uint32_t length);
+void tft_write_half(uint16_t *data_buf, uint32_t length);
+void tft_write_word(uint32_t *data_buf, uint32_t length, uint32_t flag);
+void tft_fill_data(uint32_t *data_buf, uint32_t length);
+
+void lcd_polling_enable(void);
+void lcd_interrupt_enable(void);
+int lcd_init(void);
+void lcd_clear(uint16_t color);
+void lcd_set_direction(lcd_dir_t dir);
+void lcd_set_area(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2);
+void lcd_draw_point(uint16_t x, uint16_t y, uint16_t color);
+void lcd_draw_string(uint16_t x, uint16_t y, char *str, uint16_t color);
+void lcd_draw_picture(uint16_t x1, uint16_t y1, uint16_t width, uint16_t height, uint32_t *ptr);
+void lcd_draw_rectangle(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2, uint16_t width, uint16_t color);
+void lcd_ram_draw_string(char *str, uint32_t *ptr, uint16_t font_color, uint16_t bg_color);
+
+#endif
diff --git a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/rw007_port.c b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/rw007_port.c
new file mode 100644
index 00000000..8717daef
--- /dev/null
+++ b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/rw007_port.c
@@ -0,0 +1,96 @@
+#include <rtthread.h>
+/*
+RW007(SPI1 ) Kendryte Sipeed MAX bit io
+
+ pin numbers    function    pin number on rw007 board
+  io 15	        SPI1_SCK 	    	SCK    
+  io 8 	        SPI1_MISO	    	MISO   
+  io 10	        SPI1_MOSI	    	MOSI   
+  io 9 	        CS/BOOT1 	    	CS     
+  io 6 	        INT/BUSY 	    	D9     
+  io 7 	        RESET    	    	D8     
+
+ set in mencuconfig after suring hardware well
+board driver config-> enble spi1
+(15) spi1 clk pin number
+(10) spi1 d0 pin number
+(8)  spi1 d1 pin number
+(*)  spi1 enble ss1 --->
+     (9) spi1 ss1 pin number
+verified
+
+*/
+
+
+#ifdef PKG_USING_RW007
+#include <rtdevice.h>
+#include <drv_spi.h>
+#include <board.h>
+#include <spi_wifi_rw007.h>
+
+extern void spi_wifi_isr(int vector);
+
+static int rw007_gpio_init(void)
+{
+    int cnt = 15;
+
+    /* Configure IO */
+    rt_pin_mode(RW007_RST_PIN, PIN_MODE_OUTPUT);
+    rt_pin_mode(RW007_INT_BUSY_PIN, PIN_MODE_INPUT_PULLDOWN);
+
+    /* Reset rw007 and config mode */
+    rt_pin_write(RW007_RST_PIN, PIN_LOW);
+    rt_thread_mdelay(100);
+    rt_pin_write(RW007_RST_PIN, PIN_HIGH);
+
+    /* Wait rw007 ready(exit busy stat) */
+    while(!rt_pin_read(RW007_INT_BUSY_PIN))
+    {
+        rt_thread_mdelay(100);
+        if (--cnt < 0)
+            return -1;
+    }
+
+    rt_thread_mdelay(200);
+    rt_pin_mode(RW007_INT_BUSY_PIN, PIN_MODE_INPUT_PULLUP);
+
+    return 0;
+}
+
+int wifi_spi_device_init(void)
+{
+    char sn_version[32] = {0};
+
+    if (rw007_gpio_init() != 0)
+    {
+        rt_kprintf("rw007 wait busy timeout\n");
+        return -1;
+    }
+
+    rt_hw_wifi_init(RW007_SPIDEV_NAME);
+
+    rt_wlan_set_mode(RT_WLAN_DEVICE_STA_NAME, RT_WLAN_STATION);
+    rt_wlan_set_mode(RT_WLAN_DEVICE_AP_NAME, RT_WLAN_AP);
+
+    rw007_sn_get(sn_version);
+    rt_kprintf("\nrw007  sn: [%s]\n", sn_version);
+    rw007_version_get(sn_version);
+    rt_kprintf("rw007 ver: [%s]\n\n", sn_version);
+
+    return 0;
+}
+INIT_APP_EXPORT(wifi_spi_device_init);
+
+static void int_wifi_irq(void * p)
+{
+    ((void)p);
+    spi_wifi_isr(0);
+}
+
+void spi_wifi_hw_init(void)
+{
+    rt_pin_attach_irq(RW007_INT_BUSY_PIN, PIN_IRQ_MODE_FALLING, int_wifi_irq, 0);
+    rt_pin_irq_enable(RW007_INT_BUSY_PIN, RT_TRUE);
+}
+
+#endif /* RW007_USING_STM32_DRIVERS */
diff --git a/Ubiquitous/RT_Thread/bsp/k210/base-drivers/sdcard_port.c b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/sdcard_port.c
new file mode 100644
index 00000000..d3ef0652
--- /dev/null
+++ b/Ubiquitous/RT_Thread/bsp/k210/base-drivers/sdcard_port.c
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ */
+
+#include <rtthread.h>
+#ifdef BSP_USING_SDCARD
+#if defined(RT_USING_SPI_MSD) && defined(RT_USING_DFS_ELMFAT)
+#include <spi_msd.h>
+#include <dfs_fs.h>
+
+#define DBG_TAG "sdcard"
+#define DBG_LVL DBG_INFO
+#include <rtdbg.h>
+
+int sd_mount(void)
+{
+    int ret = 0;
+    ret = msd_init("sd0", "spi10");
+    if(RT_EOK == ret)
+    {
+         if(dfs_mount("sd0", "/", "elm", 0, 0) == 0)
+        {
+            LOG_I("Mount /sd0  successfully"); 
+            return RT_EOK;
+        }
+        else
+        { 
+            LOG_E("Mount fail !!1");
+            return -1;
+        }
+    }
+    LOG_E("msd_init fail !!!");
+    return -2;    
+}
+INIT_ENV_EXPORT(sd_mount);
+#endif
+#endif
diff --git a/Ubiquitous/RT_Thread/bsp/k210/kendryte-sdk/Kconfig b/Ubiquitous/RT_Thread/bsp/k210/kendryte-sdk/Kconfig
new file mode 100644
index 00000000..fb10c827
--- /dev/null
+++ b/Ubiquitous/RT_Thread/bsp/k210/kendryte-sdk/Kconfig
@@ -0,0 +1,7 @@
+menu "Kendryte SDK Config"
+
+config PKG_KENDRYTE_SDK_VERNUM
+    hex "Kendryte SDK Version"
+    default 0x0055
+
+endmenu
diff --git a/Ubiquitous/RT_Thread/bsp/k210/kendryte-sdk/SConscript b/Ubiquitous/RT_Thread/bsp/k210/kendryte-sdk/SConscript
new file mode 100644
index 00000000..a4b1cce5
--- /dev/null
+++ b/Ubiquitous/RT_Thread/bsp/k210/kendryte-sdk/SConscript
@@ -0,0 +1,37 @@
+from building import *
+
+cwd     = GetCurrentDir()
+src     = Split('''
+kendryte-sdk-source/lib/bsp/entry.c
+kendryte-sdk-source/lib/bsp/entry_user.c
+kendryte-sdk-source/lib/drivers/aes.c
+kendryte-sdk-source/lib/drivers/clint.c
+kendryte-sdk-source/lib/drivers/dmac.c
+kendryte-sdk-source/lib/drivers/dvp.c
+kendryte-sdk-source/lib/drivers/fft.c
+kendryte-sdk-source/lib/drivers/fpioa.c
+kendryte-sdk-source/lib/drivers/gpio.c
+kendryte-sdk-source/lib/drivers/gpiohs.c
+kendryte-sdk-source/lib/drivers/i2c.c
+kendryte-sdk-source/lib/drivers/i2s.c
+kendryte-sdk-source/lib/drivers/kpu.c
+kendryte-sdk-source/lib/drivers/plic.c
+kendryte-sdk-source/lib/drivers/pwm.c
+kendryte-sdk-source/lib/drivers/rtc.c
+kendryte-sdk-source/lib/drivers/sha256.c
+kendryte-sdk-source/lib/drivers/spi.c
+kendryte-sdk-source/lib/drivers/sysctl.c
+kendryte-sdk-source/lib/drivers/timer.c
+kendryte-sdk-source/lib/drivers/uart.c
+kendryte-sdk-source/lib/drivers/uarths.c
+kendryte-sdk-source/lib/drivers/utils.c
+kendryte-sdk-source/lib/drivers/wdt.c
+''')
+CPPPATH = [cwd + '/kendryte-sdk-source/lib/drivers/include',
+cwd + '/kendryte-sdk-source/lib/bsp/include',
+cwd + '/kendryte-sdk-source/lib/utils/include']
+CPPDEFINES = ['CONFIG_LOG_COLORS', 'CONFIG_LOG_ENABLE', 'CONFIG_LOG_LEVEL=LOG_VERBOSE', 'FPGA_PLL', 'LOG_KERNEL', '__riscv64']
+
+group = DefineGroup('SDK', src, depend = [''], CPPPATH = CPPPATH, LOCAL_CPPDEFINES = CPPDEFINES)
+
+Return('group')
diff --git a/Ubiquitous/RT_Thread/bsp/k210/link.lds b/Ubiquitous/RT_Thread/bsp/k210/link.lds
new file mode 100644
index 00000000..b09f56d6
--- /dev/null
+++ b/Ubiquitous/RT_Thread/bsp/k210/link.lds
@@ -0,0 +1,170 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ */
+
+INCLUDE "link_stacksize.lds"
+
+/*
+ * The OUTPUT_ARCH command specifies the machine architecture where the
+ * argument is one of the names used in the Kendryte library.
+ */
+OUTPUT_ARCH( "riscv" )
+
+MEMORY
+{
+   /* 6M SRAM */
+   SRAM : ORIGIN = 0x80000000, LENGTH = 0x600000
+}
+
+ENTRY(_start)
+SECTIONS
+{
+    . = 0x80000000 ;
+
+    /* __STACKSIZE__ = 4096; */
+
+    .start :
+    {
+        *(.start);
+    } > SRAM
+
+    . = ALIGN(8);
+
+    .text :
+    {
+        *(.text)                        /* remaining code */
+        *(.text.*)                      /* remaining code */
+        *(.rodata)                      /* read-only data (constants) */
+        *(.rodata*)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.gnu.linkonce.t*)
+
+        /* section information for finsh shell */
+        . = ALIGN(8);
+        __fsymtab_start = .;
+        KEEP(*(FSymTab))
+        __fsymtab_end = .;
+        . = ALIGN(8);
+        __vsymtab_start = .;
+        KEEP(*(VSymTab))
+        __vsymtab_end = .;
+        . = ALIGN(8);
+
+        /* section information for initial. */
+        . = ALIGN(8);
+        __rt_init_start = .;
+        KEEP(*(SORT(.rti_fn*)))
+        __rt_init_end = .;
+        . = ALIGN(8);
+
+        PROVIDE(__ctors_start__ = .);
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        PROVIDE(__ctors_end__ = .);
+        . = ALIGN(8);
+
+        __rt_utest_tc_tab_start = .;
+        KEEP(*(UtestTcTab))
+        __rt_utest_tc_tab_end = .;
+
+        . = ALIGN(8);
+        _etext = .;
+    } > SRAM
+
+    .eh_frame_hdr :
+    {
+         *(.eh_frame_hdr)
+         *(.eh_frame_entry)
+    } > SRAM
+    .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } > SRAM
+
+    . = ALIGN(8);
+
+    .data :
+    {
+        *(.data)
+        *(.data.*)
+
+        *(.data1)
+        *(.data1.*)
+
+        . = ALIGN(8);
+        PROVIDE( __global_pointer$ = . + 0x800 );
+
+        *(.sdata)
+        *(.sdata.*)
+    } > SRAM
+
+    /* stack for dual core */
+    .stack :
+    {
+        . = ALIGN(64);
+        __stack_start__ = .;
+
+        . += __STACKSIZE__;
+        __stack_cpu0 = .;
+
+        . += __STACKSIZE__;
+        __stack_cpu1 = .;
+    } > SRAM
+
+    .sbss :
+    {
+    __bss_start = .;
+        *(.sbss)
+        *(.sbss.*)
+        *(.dynsbss)
+        *(.scommon)
+    } > SRAM
+
+    .bss :
+    {
+        *(.bss)
+        *(.bss.*)
+        *(.dynbss)
+        *(COMMON)
+    __bss_end = .;
+    } > SRAM
+
+    _end = .;
+
+    /* Stabs debugging sections.  */
+    .stab          0 : { *(.stab) }
+    .stabstr       0 : { *(.stabstr) }
+    .stab.excl     0 : { *(.stab.excl) }
+    .stab.exclstr  0 : { *(.stab.exclstr) }
+    .stab.index    0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment       0 : { *(.comment) }
+    /* DWARF debug sections.
+     * Symbols in the DWARF debugging sections are relative to the beginning
+     * of the section so we begin them at 0.  */
+    /* DWARF 1 */
+    .debug          0 : { *(.debug) }
+    .line           0 : { *(.line) }
+    /* GNU DWARF 1 extensions */
+    .debug_srcinfo  0 : { *(.debug_srcinfo) }
+    .debug_sfnames  0 : { *(.debug_sfnames) }
+    /* DWARF 1.1 and DWARF 2 */
+    .debug_aranges  0 : { *(.debug_aranges) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    /* DWARF 2 */
+    .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
+    .debug_abbrev   0 : { *(.debug_abbrev) }
+    .debug_line     0 : { *(.debug_line) }
+    .debug_frame    0 : { *(.debug_frame) }
+    .debug_str      0 : { *(.debug_str) }
+    .debug_loc      0 : { *(.debug_loc) }
+    .debug_macinfo  0 : { *(.debug_macinfo) }
+    /* SGI/MIPS DWARF 2 extensions */
+    .debug_weaknames 0 : { *(.debug_weaknames) }
+    .debug_funcnames 0 : { *(.debug_funcnames) }
+    .debug_typenames 0 : { *(.debug_typenames) }
+    .debug_varnames  0 : { *(.debug_varnames) }
+}
diff --git a/Ubiquitous/RT_Thread/bsp/k210/link_stacksize.lds b/Ubiquitous/RT_Thread/bsp/k210/link_stacksize.lds
new file mode 100644
index 00000000..1dd89342
--- /dev/null
+++ b/Ubiquitous/RT_Thread/bsp/k210/link_stacksize.lds
@@ -0,0 +1 @@
+__STACKSIZE__ = 4096;
\ No newline at end of file
diff --git a/Ubiquitous/RT_Thread/bsp/k210/rtconfig.h b/Ubiquitous/RT_Thread/bsp/k210/rtconfig.h
new file mode 100644
index 00000000..dad02eee
--- /dev/null
+++ b/Ubiquitous/RT_Thread/bsp/k210/rtconfig.h
@@ -0,0 +1,270 @@
+#ifndef RT_CONFIG_H__
+#define RT_CONFIG_H__
+
+/* Automatically generated file; DO NOT EDIT. */
+/* XIUOS Rt-thread Configuration */
+
+#define ROOT_DIR "../../../.."
+#define BSP_DIR "."
+#define RT_Thread_DIR "../.."
+#define RTT_DIR "../../rt-thread"
+#define BOARD_K210_EVB
+
+/* RT-Thread Kernel */
+
+#define RT_NAME_MAX 8
+#define RT_USING_SMP
+#define RT_CPUS_NR 2
+#define RT_ALIGN_SIZE 8
+#define RT_THREAD_PRIORITY_32
+#define RT_THREAD_PRIORITY_MAX 32
+#define RT_TICK_PER_SECOND 1000
+#define RT_USING_OVERFLOW_CHECK
+#define RT_USING_HOOK
+#define RT_USING_IDLE_HOOK
+#define RT_IDLE_HOOK_LIST_SIZE 4
+#define IDLE_THREAD_STACK_SIZE 4096
+
+/* kservice optimization */
+
+#define RT_DEBUG
+#define RT_DEBUG_COLOR
+#define RT_DEBUG_INIT_CONFIG
+#define RT_DEBUG_INIT 1
+
+/* Inter-Thread communication */
+
+#define RT_USING_SEMAPHORE
+#define RT_USING_MUTEX
+#define RT_USING_EVENT
+#define RT_USING_MAILBOX
+#define RT_USING_MESSAGEQUEUE
+#define RT_USING_SIGNALS
+
+/* Memory Management */
+
+#define RT_USING_MEMPOOL
+#define RT_USING_MEMHEAP
+#define RT_USING_SLAB
+#define RT_USING_HEAP
+
+/* Kernel Device Object */
+
+#define RT_USING_DEVICE
+#define RT_USING_CONSOLE
+#define RT_CONSOLEBUF_SIZE 128
+#define RT_CONSOLE_DEVICE_NAME "uarths"
+#define RT_VER_NUM 0x40004
+#define ARCH_CPU_64BIT
+#define ARCH_RISCV
+#define ARCH_RISCV_FPU
+#define ARCH_RISCV_FPU_S
+#define ARCH_RISCV64
+
+/* RT-Thread Components */
+
+#define RT_USING_COMPONENTS_INIT
+#define RT_USING_USER_MAIN
+#define RT_MAIN_THREAD_STACK_SIZE 8192
+#define RT_MAIN_THREAD_PRIORITY 10
+
+/* C++ features */
+
+
+/* Command shell */
+
+#define RT_USING_FINSH
+#define FINSH_THREAD_NAME "tshell"
+#define FINSH_USING_HISTORY
+#define FINSH_HISTORY_LINES 5
+#define FINSH_USING_SYMTAB
+#define FINSH_USING_DESCRIPTION
+#define FINSH_THREAD_PRIORITY 20
+#define FINSH_THREAD_STACK_SIZE 16384
+#define FINSH_CMD_SIZE 80
+#define FINSH_USING_MSH
+#define FINSH_USING_MSH_DEFAULT
+#define FINSH_USING_MSH_ONLY
+#define FINSH_ARG_MAX 10
+
+/* Device virtual file system */
+
+#define RT_USING_DFS
+#define DFS_USING_WORKDIR
+#define DFS_FILESYSTEMS_MAX 16
+#define DFS_FILESYSTEM_TYPES_MAX 16
+#define DFS_FD_MAX 64
+#define RT_USING_DFS_ELMFAT
+
+/* elm-chan's FatFs, Generic FAT Filesystem Module */
+
+#define RT_DFS_ELM_CODE_PAGE 437
+#define RT_DFS_ELM_WORD_ACCESS
+#define RT_DFS_ELM_USE_LFN_3
+#define RT_DFS_ELM_USE_LFN 3
+#define RT_DFS_ELM_LFN_UNICODE_0
+#define RT_DFS_ELM_LFN_UNICODE 0
+#define RT_DFS_ELM_MAX_LFN 255
+#define RT_DFS_ELM_DRIVES 2
+#define RT_DFS_ELM_MAX_SECTOR_SIZE 4096
+#define RT_DFS_ELM_REENTRANT
+#define RT_USING_DFS_DEVFS
+
+/* Device Drivers */
+
+#define RT_USING_DEVICE_IPC
+#define RT_PIPE_BUFSZ 512
+#define RT_USING_SYSTEM_WORKQUEUE
+#define RT_SYSTEM_WORKQUEUE_STACKSIZE 2048
+#define RT_SYSTEM_WORKQUEUE_PRIORITY 23
+#define RT_USING_SERIAL
+#define RT_SERIAL_USING_DMA
+#define RT_SERIAL_RB_BUFSZ 64
+#define RT_USING_PIN
+#define RT_USING_SPI
+#define RT_USING_SPI_MSD
+#define RT_USING_SFUD
+#define RT_SFUD_USING_SFDP
+#define RT_SFUD_USING_FLASH_INFO_TABLE
+#define RT_SFUD_SPI_MAX_HZ 50000000
+#define RT_DEBUG_SFUD
+#define RT_USING_WIFI
+#define RT_WLAN_DEVICE_STA_NAME "wlan0"
+#define RT_WLAN_DEVICE_AP_NAME "wlan1"
+#define RT_WLAN_SSID_MAX_LENGTH 32
+#define RT_WLAN_PASSWORD_MAX_LENGTH 32
+#define RT_WLAN_DEV_EVENT_NUM 2
+#define RT_WLAN_MANAGE_ENABLE
+#define RT_WLAN_SCAN_WAIT_MS 10000
+#define RT_WLAN_CONNECT_WAIT_MS 10000
+#define RT_WLAN_SCAN_SORT
+#define RT_WLAN_MSH_CMD_ENABLE
+#define RT_WLAN_AUTO_CONNECT_ENABLE
+#define AUTO_CONNECTION_PERIOD_MS 2000
+#define RT_WLAN_CFG_ENABLE
+#define RT_WLAN_CFG_INFO_MAX 3
+#define RT_WLAN_PROT_ENABLE
+#define RT_WLAN_PROT_NAME_LEN 8
+#define RT_WLAN_PROT_MAX 2
+#define RT_WLAN_DEFAULT_PROT "lwip"
+#define RT_WLAN_PROT_LWIP_ENABLE
+#define RT_WLAN_PROT_LWIP_NAME "lwip"
+#define RT_WLAN_WORK_THREAD_ENABLE
+#define RT_WLAN_WORKQUEUE_THREAD_NAME "wlan"
+#define RT_WLAN_WORKQUEUE_THREAD_SIZE 2048
+#define RT_WLAN_WORKQUEUE_THREAD_PRIO 15
+
+/* Using USB */
+
+
+/* POSIX layer and C standard library */
+
+#define RT_USING_LIBC
+#define RT_USING_POSIX
+#define RT_LIBC_FIXED_TIMEZONE 8
+
+/* Network */
+
+/* Socket abstraction layer */
+
+#define RT_USING_SAL
+
+/* protocol stack implement */
+
+#define SAL_USING_LWIP
+#define SAL_SOCKETS_NUM 16
+
+/* Network interface device */
+
+#define RT_USING_NETDEV
+#define NETDEV_USING_IFCONFIG
+#define NETDEV_USING_PING
+#define NETDEV_USING_NETSTAT
+#define NETDEV_USING_AUTO_DEFAULT
+#define NETDEV_IPV4 1
+#define NETDEV_IPV6 0
+
+/* light weight TCP/IP stack */
+
+#define RT_USING_LWIP
+#define RT_USING_LWIP202
+#define RT_LWIP_MEM_ALIGNMENT 8
+#define RT_LWIP_IGMP
+#define RT_LWIP_ICMP
+#define RT_LWIP_DNS
+#define RT_LWIP_DHCP
+#define IP_SOF_BROADCAST 1
+#define IP_SOF_BROADCAST_RECV 1
+
+/* Static IPv4 Address */
+
+#define RT_LWIP_IPADDR "192.168.1.30"
+#define RT_LWIP_GWADDR "192.168.1.1"
+#define RT_LWIP_MSKADDR "255.255.255.0"
+#define RT_LWIP_UDP
+#define RT_LWIP_TCP
+#define RT_LWIP_RAW
+#define RT_MEMP_NUM_NETCONN 8
+#define RT_LWIP_PBUF_NUM 16
+#define RT_LWIP_RAW_PCB_NUM 4
+#define RT_LWIP_UDP_PCB_NUM 4
+#define RT_LWIP_TCP_PCB_NUM 4
+#define RT_LWIP_TCP_SEG_NUM 40
+#define RT_LWIP_TCP_SND_BUF 8196
+#define RT_LWIP_TCP_WND 8196
+#define RT_LWIP_TCPTHREAD_PRIORITY 10
+#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8
+#define RT_LWIP_TCPTHREAD_STACKSIZE 10240
+#define RT_LWIP_ETHTHREAD_PRIORITY 12
+#define RT_LWIP_ETHTHREAD_STACKSIZE 10240
+#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
+#define LWIP_NETIF_STATUS_CALLBACK 1
+#define LWIP_NETIF_LINK_CALLBACK 1
+#define SO_REUSE 1
+#define LWIP_SO_RCVTIMEO 1
+#define LWIP_SO_SNDTIMEO 1
+#define LWIP_SO_RCVBUF 1
+#define LWIP_SO_LINGER 0
+#define LWIP_NETIF_LOOPBACK 0
+#define RT_LWIP_USING_PING
+
+/* AT commands */
+
+
+/* VBUS(Virtual Software BUS) */
+
+
+/* Utilities */
+
+
+/* RT-Thread Utestcases */
+
+
+/* Board Drivers Config */
+
+#define BSP_USING_UART_HS
+#define BSP_USING_UART1
+#define BSP_UART1_TXD_PIN 20
+#define BSP_UART1_RXD_PIN 21
+#define BSP_USING_DVP
+
+/* The default pin assignment is based on the Maix Duino K210 development board */
+
+#define BSP_DVP_SCCB_SDA_PIN 40
+#define BSP_DVP_SCCB_SCLK_PIN 41
+#define BSP_DVP_CMOS_RST_PIN 42
+#define BSP_DVP_CMOS_VSYNC_PIN 43
+#define BSP_DVP_CMOS_PWDN_PIN 44
+#define BSP_DVP_CMOS_XCLK_PIN 46
+#define BSP_DVP_CMOS_PCLK_PIN 47
+#define BSP_DVP_CMOS_HREF_PIN 45
+
+/* Kendryte SDK Config */
+
+#define PKG_KENDRYTE_SDK_VERNUM 0x0055
+
+/* More Drivers */
+
+#define __STACKSIZE__ 4096
+
+#endif
diff --git a/Ubiquitous/RT_Thread/bsp/k210/rtconfig.py b/Ubiquitous/RT_Thread/bsp/k210/rtconfig.py
new file mode 100644
index 00000000..19529423
--- /dev/null
+++ b/Ubiquitous/RT_Thread/bsp/k210/rtconfig.py
@@ -0,0 +1,49 @@
+import os
+
+# toolchains options
+ARCH        ='risc-v'
+CPU         ='k210'
+CROSS_TOOL  ='gcc'
+
+if  CROSS_TOOL == 'gcc':
+    PLATFORM    = 'gcc'
+    EXEC_PATH   = r'/opt/xpack-riscv-none-gcc/bin'
+else:
+    print('Please make sure your toolchains is GNU GCC!')
+    exit(0)
+
+if os.getenv('RTT_EXEC_PATH'):
+    EXEC_PATH = os.getenv('RTT_EXEC_PATH')
+
+BUILD = 'debug'
+
+if PLATFORM == 'gcc':
+    PREFIX  = 'riscv-none-embed-'
+    CC      = PREFIX + 'gcc'
+    CXX     = PREFIX + 'g++'
+    AS      = PREFIX + 'gcc'
+    AR      = PREFIX + 'ar'
+    LINK    = PREFIX + 'gcc'
+    TARGET_EXT = 'elf'
+    SIZE    = PREFIX + 'size'
+    OBJDUMP = PREFIX + 'objdump'
+    OBJCPY  = PREFIX + 'objcopy'
+
+    DEVICE  = ' -mcmodel=medany -march=rv64imafc -mabi=lp64f -fsingle-precision-constant'
+    CFLAGS  = DEVICE + ' -fno-common -ffunction-sections -fdata-sections -fstrict-volatile-bitfields'
+    AFLAGS  = ' -c' + DEVICE + ' -x assembler-with-cpp'
+    LFLAGS  = DEVICE + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,_start -T link.lds'
+    CPATH   = ''
+    LPATH   = ''
+
+    if BUILD == 'debug':
+        CFLAGS += ' -O0 -ggdb'
+        AFLAGS += ' -ggdb'
+    else:
+        CFLAGS += ' -O2 -Os'
+
+    CXXFLAGS = CFLAGS
+    # we use c++ 11, but -std=c++11 don't have 'struct siginfo', need gnu++11
+    CXXFLAGS += ' -std=gnu++11'
+
+POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'