optimize code standard
This commit is contained in:
parent
3ba05d0a71
commit
adcfd5e7f6
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@ -210,7 +210,7 @@ static inline unsigned long KSwitch0(unsigned int knum)
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{
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uintptr_t param[1] = {0};
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uint8_t num = 0;
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(struct Kernel_Service*)SERVICETABLE[knum].fun(knum, param, num);
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(struct KernelService*)SERVICETABLE[knum].fun(knum, param, num);
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}
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static inline unsigned long KSwitch1(unsigned int knum, unsigned long arg1)
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@ -218,7 +218,7 @@ static inline unsigned long KSwitch1(unsigned int knum, unsigned long arg1)
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uintptr_t param[1] = {0};
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uint8_t num = 1;
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param[0] = arg1;
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(struct Kernel_Service*)SERVICETABLE[knum].fun(knum, param, num);
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(struct KernelService*)SERVICETABLE[knum].fun(knum, param, num);
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}
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@ -229,7 +229,7 @@ static inline unsigned long KSwitch2(unsigned int knum, unsigned long arg1,
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uint8_t num = 2;
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param[0] = arg1;
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param[1] = arg2;
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(struct Kernel_Service*)SERVICETABLE[knum].fun(knum, param, num);
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(struct KernelService*)SERVICETABLE[knum].fun(knum, param, num);
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}
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@ -242,7 +242,7 @@ static inline unsigned long KSwitch3(unsigned int knum, unsigned long arg1,
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param[1] = arg2;
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param[2] = arg3;
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(struct Kernel_Service*)SERVICETABLE[knum].fun(knum, param, num);
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(struct KernelService*)SERVICETABLE[knum].fun(knum, param, num);
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}
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static inline unsigned long KSwitch4(unsigned int knum, unsigned long arg1,
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@ -255,7 +255,7 @@ static inline unsigned long KSwitch4(unsigned int knum, unsigned long arg1,
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param[1] = arg2;
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param[2] = arg3;
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param[3] = arg4;
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(struct Kernel_Service*)SERVICETABLE[knum].fun(knum, param, num);
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(struct KernelService*)SERVICETABLE[knum].fun(knum, param, num);
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}
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static inline unsigned long KSwitch5(unsigned int knum, unsigned long arg1,
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@ -269,7 +269,7 @@ static inline unsigned long KSwitch5(unsigned int knum, unsigned long arg1,
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param[2] = arg3;
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param[3] = arg4;
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param[4] = arg5;
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(struct Kernel_Service*)SERVICETABLE[knum].fun(knum, param, num);
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(struct KernelService*)SERVICETABLE[knum].fun(knum, param, num);
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}
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static inline unsigned long KSwitch6(unsigned int knum, unsigned long arg1,
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@ -285,7 +285,7 @@ static inline unsigned long KSwitch6(unsigned int knum, unsigned long arg1,
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param[3] = arg4;
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param[4] = arg5;
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param[5] = arg6;
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(struct Kernel_Service*)SERVICETABLE[knum].fun(knum, param, num);
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(struct KernelService*)SERVICETABLE[knum].fun(knum, param, num);
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}
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#endif
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@ -40,7 +40,6 @@ static struct CanSendConfigure can_send_deconfig =
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.data_lenth = 8
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};
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static void CanGPIOInit(void)
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{
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CAN_FilterInitTypeDef can1_filter;
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@ -129,8 +128,7 @@ static uint32 CanSendMsg(void * dev , struct BusBlockWriteParam *write_param )
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tx_data.RTR = 0;
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tx_data.DLC = write_param->size;
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for(i = 0;i<tx_data.DLC;i++)
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{
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for(i = 0;i < tx_data.DLC;i ++) {
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tx_data.Data[i] = data[i];
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}
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@ -162,7 +160,6 @@ static uint32 CanRecvMsg(void *dev , struct BusBlockReadParam *databuf)
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return msg.DLC;
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}
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static struct CanDevDone dev_done =
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{
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.open = NONE,
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@ -171,10 +168,8 @@ static struct CanDevDone dev_done =
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.read = CanRecvMsg
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};
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static struct CanHardwareDevice dev;
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#ifdef CAN_USING_INTERRUPT
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void CAN1_RX0_IRQHandler(void)
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{
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@ -187,7 +182,6 @@ void CAN1_RX0_IRQHandler(void)
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DECLARE_HW_IRQ(CAN1_RX0_IRQn, CAN1_RX0_IRQHandler, NONE);
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#endif
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static int BoardCanBusInit(struct Stm32Can *stm32can_bus, struct CanDriver *can_driver)
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{
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x_err_t ret = EOK;
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@ -205,6 +199,7 @@ static int BoardCanBusInit(struct Stm32Can *stm32can_bus, struct CanDriver *can_
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KPrintf("Board_can_init canDriverInit error %d\n", ret);
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return ERROR;
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}
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/*Attach the can driver to the can bus*/
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ret = CanDriverAttachToBus(CAN_DRIVER_NAME, stm32can_bus->bus_name);
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if (EOK != ret) {
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@ -215,8 +210,6 @@ static int BoardCanBusInit(struct Stm32Can *stm32can_bus, struct CanDriver *can_
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return ret;
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}
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static x_err_t HwCanDeviceAttach(const char *bus_name, const char *device_name)
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{
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NULL_PARAM_CHECK(bus_name);
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@ -249,7 +242,6 @@ static x_err_t HwCanDeviceAttach(const char *bus_name, const char *device_name)
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return result;
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}
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struct Stm32Can can1;
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int Stm32HwCanBusInit(void)
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@ -20,14 +20,14 @@
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#include <connect_ch438.h>
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static const uint8 offsetadd[] = {0x00,0x10,0x20,0x30,0x08,0x18,0x28,0x38,}; /* uart offset address*/
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static const uint8 Interruptnum[8] = {0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,}; /* SSR register data*/
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static const uint8 offset_addr[] = {0x00,0x10,0x20,0x30,0x08,0x18,0x28,0x38,}; /* uart offset address*/
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static const uint8 interrupt_num[8] = {0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,}; /* SSR register data*/
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static BusType ch438_pin;
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static int Ch438Sem = NONE;
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static int ch438_sem = NONE;
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static void Ch438Irq(void *parameter)
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{
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KSemaphoreAbandon(Ch438Sem);
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KSemaphoreAbandon(ch438_sem);
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}
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/**
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@ -43,8 +43,7 @@ static void Stm32Udelay(uint32 us)
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ticks = us * reload / (1000000 / TICK_PER_SECOND);
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told = SysTick->VAL;
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while (1)
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{
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while (1) {
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tnow = SysTick->VAL;
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if (tnow != told) {
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if (tnow < told) {
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@ -612,14 +611,13 @@ void WriteCH438Data(uint8 addr, uint8 dat)
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********************************************************************************************************/
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void WriteCH438Block(uint8 maddr, uint8 mlen, uint8 *mbuf)
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{
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while (mlen--)
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{
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while (mlen--) {
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WriteCH438Data(maddr, *mbuf++);
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}
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}
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/*********************************************************************************************************
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** Function name: CH438UartSend
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** Function name: Ch438UartSend
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** Function: active FIFO mode, CH438 send multibyte data by uart 0, max length is 128 bytes a single time
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** input: send data cache address, send data length
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**
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@ -631,15 +629,14 @@ void WriteCH438Block(uint8 maddr, uint8 mlen, uint8 *mbuf)
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** date:
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**-------------------------------------------------------------------------------------------------------
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********************************************************************************************************/
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void CH438UartSend( uint8 ext_uart_no,uint8 *data, uint8 Num )
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void Ch438UartSend( uint8 ext_uart_no,uint8 *data, uint8 Num )
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{
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uint8 REG_LSR_ADDR,REG_THR_ADDR;
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REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR;
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REG_THR_ADDR = offsetadd[ext_uart_no] | REG_THR0_ADDR;
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REG_LSR_ADDR = offset_addr[ext_uart_no] | REG_LSR0_ADDR;
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REG_THR_ADDR = offset_addr[ext_uart_no] | REG_THR0_ADDR;
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while (1)
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{
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while (1) {
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while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_TEMT) == 0); /* wait for sending data done, THR and TSR is NULL */
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if (Num <= 128) {
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@ -654,7 +651,7 @@ void CH438UartSend( uint8 ext_uart_no,uint8 *data, uint8 Num )
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}
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/*********************************************************************************************************
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** Function name: CH438UARTRcv
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** Function name: Ch438UartRcv
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** Function: forbidden FIFO mode, CH438 receive multibyte data from uart 0
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** input: recv data address
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**
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@ -666,7 +663,7 @@ void CH438UartSend( uint8 ext_uart_no,uint8 *data, uint8 Num )
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** date:
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**-------------------------------------------------------------------------------------------------------
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********************************************************************************************************/
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uint8 CH438UARTRcv(uint8 ext_uart_no, uint8 *buf, x_size_t size)
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uint8 Ch438UartRcv(uint8 ext_uart_no, uint8 *buf, x_size_t size)
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{
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uint8 rcv_num = 0;
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uint8 dat = 0;
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@ -676,13 +673,12 @@ uint8 CH438UARTRcv(uint8 ext_uart_no, uint8 *buf, x_size_t size)
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read_buffer = buf;
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REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR;
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REG_RBR_ADDR = offsetadd[ext_uart_no] | REG_RBR0_ADDR;
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REG_LSR_ADDR = offset_addr[ext_uart_no] | REG_LSR0_ADDR;
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REG_RBR_ADDR = offset_addr[ext_uart_no] | REG_RBR0_ADDR;
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while ((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0); /* wait for data is ready */
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while (((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0x01) && (size != 0))
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{
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while (((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0x01) && (size != 0)) {
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dat = ReadCH438Data(REG_RBR_ADDR);
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*read_buffer = dat;
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@ -705,50 +701,42 @@ static void Timeout438Proc(void *parameter)
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{
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uint8_t rbr,lsr;
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while( ( ReadCH438Data( REG_LSR0_ADDR ) & BIT_LSR_DATARDY ) == 0x01 )
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{
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while( ( ReadCH438Data( REG_LSR0_ADDR ) & BIT_LSR_DATARDY ) == 0x01 ) {
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rbr = ReadCH438Data( REG_RBR0_ADDR );
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KPrintf("0.RBR=%02x\r\n",rbr);
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}
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while( ( ReadCH438Data( REG_LSR1_ADDR ) & BIT_LSR_DATARDY ) == 0x01 )
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{
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while( ( ReadCH438Data( REG_LSR1_ADDR ) & BIT_LSR_DATARDY ) == 0x01 ) {
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rbr = ReadCH438Data( REG_RBR1_ADDR );
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KPrintf("1.RBR=%02x\r\n",rbr);
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}
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while( ( ReadCH438Data( REG_LSR2_ADDR ) & BIT_LSR_DATARDY ) == 0x01 )
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{
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while( ( ReadCH438Data( REG_LSR2_ADDR ) & BIT_LSR_DATARDY ) == 0x01 ) {
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rbr = ReadCH438Data( REG_RBR2_ADDR );
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KPrintf("2.RBR=%02x\r\n",rbr);
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}
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while( ( ReadCH438Data( REG_LSR3_ADDR ) & BIT_LSR_DATARDY ) == 0x01 )
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{
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while( ( ReadCH438Data( REG_LSR3_ADDR ) & BIT_LSR_DATARDY ) == 0x01 ) {
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rbr = ReadCH438Data( REG_RBR3_ADDR );
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KPrintf("3.RBR=%02x\r\n",rbr);
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}
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while( ( ReadCH438Data( REG_LSR4_ADDR ) & BIT_LSR_DATARDY ) == 0x01 )
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{
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while( ( ReadCH438Data( REG_LSR4_ADDR ) & BIT_LSR_DATARDY ) == 0x01 ) {
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rbr = ReadCH438Data( REG_RBR4_ADDR );
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KPrintf("4.RBR=%02x\r\n",rbr);
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}
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while( ( ReadCH438Data( REG_LSR5_ADDR ) & BIT_LSR_DATARDY ) == 0x01 )
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{
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while( ( ReadCH438Data( REG_LSR5_ADDR ) & BIT_LSR_DATARDY ) == 0x01 ) {
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rbr = ReadCH438Data( REG_RBR5_ADDR );
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KPrintf("5.RBR=%02x\r\n",rbr);
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}
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while( ( ReadCH438Data( REG_LSR6_ADDR ) & BIT_LSR_DATARDY ) == 0x01 )
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{
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while( ( ReadCH438Data( REG_LSR6_ADDR ) & BIT_LSR_DATARDY ) == 0x01 ) {
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rbr = ReadCH438Data( REG_RBR6_ADDR );
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KPrintf("6.RBR=%02x\r\n",rbr);
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}
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while( ( ReadCH438Data( REG_LSR7_ADDR ) & BIT_LSR_DATARDY ) == 0x01 )
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{
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while( ( ReadCH438Data( REG_LSR7_ADDR ) & BIT_LSR_DATARDY ) == 0x01 ) {
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rbr = ReadCH438Data( REG_RBR7_ADDR );
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KPrintf("7.RBR=%02x\r\n",rbr);
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}
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@ -804,7 +792,7 @@ void Set485Output(uint8 ch_no)
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}
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}
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void CH438_PORT_INIT( uint8 ext_uart_no,uint32 BaudRate )
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void Ch438PortInit( uint8 ext_uart_no,uint32 BaudRate )
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{
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uint32 div;
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uint8 DLL,DLM,dlab;
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@ -818,15 +806,15 @@ void CH438_PORT_INIT( uint8 ext_uart_no,uint32 BaudRate )
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uint8 REG_THR_ADDR;
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uint8 REG_IIR_ADDR;
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REG_LCR_ADDR = offsetadd[ext_uart_no] | REG_LCR0_ADDR;
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REG_DLL_ADDR = offsetadd[ext_uart_no] | REG_DLL0_ADDR;
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REG_DLM_ADDR = offsetadd[ext_uart_no] | REG_DLM0_ADDR;
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REG_IER_ADDR = offsetadd[ext_uart_no] | REG_IER0_ADDR;
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REG_MCR_ADDR = offsetadd[ext_uart_no] | REG_MCR0_ADDR;
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REG_FCR_ADDR = offsetadd[ext_uart_no] | REG_FCR0_ADDR;
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REG_RBR_ADDR = offsetadd[ext_uart_no] | REG_RBR0_ADDR;
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REG_THR_ADDR = offsetadd[ext_uart_no] | REG_THR0_ADDR;
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REG_IIR_ADDR = offsetadd[ext_uart_no] | REG_IIR0_ADDR;
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REG_LCR_ADDR = offset_addr[ext_uart_no] | REG_LCR0_ADDR;
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REG_DLL_ADDR = offset_addr[ext_uart_no] | REG_DLL0_ADDR;
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REG_DLM_ADDR = offset_addr[ext_uart_no] | REG_DLM0_ADDR;
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REG_IER_ADDR = offset_addr[ext_uart_no] | REG_IER0_ADDR;
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REG_MCR_ADDR = offset_addr[ext_uart_no] | REG_MCR0_ADDR;
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REG_FCR_ADDR = offset_addr[ext_uart_no] | REG_FCR0_ADDR;
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REG_RBR_ADDR = offset_addr[ext_uart_no] | REG_RBR0_ADDR;
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REG_THR_ADDR = offset_addr[ext_uart_no] | REG_THR0_ADDR;
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REG_IIR_ADDR = offset_addr[ext_uart_no] | REG_IIR0_ADDR;
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WriteCH438Data(REG_IER_ADDR, BIT_IER_RESET); /* reset the uart */
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MdelayKTask(50);
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uint8 REG_THR_ADDR;
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uint8 REG_IIR_ADDR;
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REG_LCR_ADDR = offsetadd[ext_uart_no] | REG_LCR0_ADDR;
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REG_DLL_ADDR = offsetadd[ext_uart_no] | REG_DLL0_ADDR;
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REG_DLM_ADDR = offsetadd[ext_uart_no] | REG_DLM0_ADDR;
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REG_IER_ADDR = offsetadd[ext_uart_no] | REG_IER0_ADDR;
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REG_MCR_ADDR = offsetadd[ext_uart_no] | REG_MCR0_ADDR;
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REG_FCR_ADDR = offsetadd[ext_uart_no] | REG_FCR0_ADDR;
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REG_RBR_ADDR = offsetadd[ext_uart_no] | REG_RBR0_ADDR;
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REG_THR_ADDR = offsetadd[ext_uart_no] | REG_THR0_ADDR;
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REG_IIR_ADDR = offsetadd[ext_uart_no] | REG_IIR0_ADDR;
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REG_LCR_ADDR = offset_addr[ext_uart_no] | REG_LCR0_ADDR;
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REG_DLL_ADDR = offset_addr[ext_uart_no] | REG_DLL0_ADDR;
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REG_DLM_ADDR = offset_addr[ext_uart_no] | REG_DLM0_ADDR;
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REG_IER_ADDR = offset_addr[ext_uart_no] | REG_IER0_ADDR;
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REG_MCR_ADDR = offset_addr[ext_uart_no] | REG_MCR0_ADDR;
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REG_FCR_ADDR = offset_addr[ext_uart_no] | REG_FCR0_ADDR;
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REG_RBR_ADDR = offset_addr[ext_uart_no] | REG_RBR0_ADDR;
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REG_THR_ADDR = offset_addr[ext_uart_no] | REG_THR0_ADDR;
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REG_IIR_ADDR = offset_addr[ext_uart_no] | REG_IIR0_ADDR;
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WriteCH438Data(REG_IER_ADDR, BIT_IER_RESET); /* reset the uart */
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MdelayKTask(50);
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@ -913,7 +901,7 @@ static uint32 Stm32Ch438Configure(struct SerialCfgParam *ext_serial_cfg)
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switch (ext_serial_cfg->data_cfg.port_configure)
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{
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case PORT_CFG_INIT:
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CH438_PORT_INIT(ext_serial_cfg->data_cfg.ext_uart_no, ext_serial_cfg->data_cfg.serial_baud_rate);
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Ch438PortInit(ext_serial_cfg->data_cfg.ext_uart_no, ext_serial_cfg->data_cfg.serial_baud_rate);
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break;
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case PORT_CFG_PARITY_CHECK:
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CH438PortInitParityCheck(ext_serial_cfg->data_cfg.ext_uart_no, ext_serial_cfg->data_cfg.serial_baud_rate);
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@ -1058,7 +1046,7 @@ static uint32 Stm32Ch438WriteData(void *dev, struct BusBlockWriteParam *write_pa
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struct SerialHardwareDevice *serial_dev = (struct SerialHardwareDevice *)dev;
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struct SerialDevParam *dev_param = (struct SerialDevParam *)serial_dev->haldev.private_data;
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|
||||
CH438UartSend(dev_param->ext_uart_no, (uint8 *)write_param->buffer, write_param->size);
|
||||
Ch438UartSend(dev_param->ext_uart_no, (uint8 *)write_param->buffer, write_param->size);
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
@ -1088,7 +1076,7 @@ static uint32 Stm32Ch438ReadData(void *dev, struct BusBlockReadParam *read_param
|
|||
struct SerialHardwareDevice *serial_dev = (struct SerialHardwareDevice *)dev;
|
||||
struct SerialDevParam *dev_param = (struct SerialDevParam *)serial_dev->haldev.private_data;
|
||||
|
||||
result = KSemaphoreObtain(Ch438Sem, WAITING_FOREVER);
|
||||
result = KSemaphoreObtain(ch438_sem, WAITING_FOREVER);
|
||||
if (EOK == result) {
|
||||
gInterruptStatus = ReadCH438Data(REG_SSR_ADDR);
|
||||
if (!gInterruptStatus) {
|
||||
|
@ -1102,18 +1090,18 @@ static uint32 Stm32Ch438ReadData(void *dev, struct BusBlockReadParam *read_param
|
|||
dat = ReadCH438Data(REG_IIR0_ADDR);
|
||||
dat = dat ;
|
||||
} else {
|
||||
if (gInterruptStatus & Interruptnum[dev_param->ext_uart_no]) { /* check which uart port triggers interrupt*/
|
||||
REG_LCR_ADDR = offsetadd[dev_param->ext_uart_no] | REG_LCR0_ADDR;
|
||||
REG_DLL_ADDR = offsetadd[dev_param->ext_uart_no] | REG_DLL0_ADDR;
|
||||
REG_DLM_ADDR = offsetadd[dev_param->ext_uart_no] | REG_DLM0_ADDR;
|
||||
REG_IER_ADDR = offsetadd[dev_param->ext_uart_no] | REG_IER0_ADDR;
|
||||
REG_MCR_ADDR = offsetadd[dev_param->ext_uart_no] | REG_MCR0_ADDR;
|
||||
REG_FCR_ADDR = offsetadd[dev_param->ext_uart_no] | REG_FCR0_ADDR;
|
||||
REG_RBR_ADDR = offsetadd[dev_param->ext_uart_no] | REG_RBR0_ADDR;
|
||||
REG_THR_ADDR = offsetadd[dev_param->ext_uart_no] | REG_THR0_ADDR;
|
||||
REG_IIR_ADDR = offsetadd[dev_param->ext_uart_no] | REG_IIR0_ADDR;
|
||||
REG_LSR_ADDR = offsetadd[dev_param->ext_uart_no] | REG_LSR0_ADDR;
|
||||
REG_MSR_ADDR = offsetadd[dev_param->ext_uart_no] | REG_MSR0_ADDR;
|
||||
if (gInterruptStatus & interrupt_num[dev_param->ext_uart_no]) { /* check which uart port triggers interrupt*/
|
||||
REG_LCR_ADDR = offset_addr[dev_param->ext_uart_no] | REG_LCR0_ADDR;
|
||||
REG_DLL_ADDR = offset_addr[dev_param->ext_uart_no] | REG_DLL0_ADDR;
|
||||
REG_DLM_ADDR = offset_addr[dev_param->ext_uart_no] | REG_DLM0_ADDR;
|
||||
REG_IER_ADDR = offset_addr[dev_param->ext_uart_no] | REG_IER0_ADDR;
|
||||
REG_MCR_ADDR = offset_addr[dev_param->ext_uart_no] | REG_MCR0_ADDR;
|
||||
REG_FCR_ADDR = offset_addr[dev_param->ext_uart_no] | REG_FCR0_ADDR;
|
||||
REG_RBR_ADDR = offset_addr[dev_param->ext_uart_no] | REG_RBR0_ADDR;
|
||||
REG_THR_ADDR = offset_addr[dev_param->ext_uart_no] | REG_THR0_ADDR;
|
||||
REG_IIR_ADDR = offset_addr[dev_param->ext_uart_no] | REG_IIR0_ADDR;
|
||||
REG_LSR_ADDR = offset_addr[dev_param->ext_uart_no] | REG_LSR0_ADDR;
|
||||
REG_MSR_ADDR = offset_addr[dev_param->ext_uart_no] | REG_MSR0_ADDR;
|
||||
|
||||
InterruptStatus = ReadCH438Data( REG_IIR_ADDR ) & 0x0f; /* read the status of the uart port*/
|
||||
|
||||
|
@ -1125,7 +1113,7 @@ static uint32 Stm32Ch438ReadData(void *dev, struct BusBlockReadParam *read_param
|
|||
break;
|
||||
case INT_RCV_OVERTIME: /* RECV OVERTIME INTERRUPT*/
|
||||
case INT_RCV_SUCCESS: /* RECV INTERRUPT SUCCESSFULLY*/
|
||||
rcv_num = CH438UARTRcv(dev_param->ext_uart_no, (uint8 *)read_param->buffer, read_param->size);
|
||||
rcv_num = Ch438UartRcv(dev_param->ext_uart_no, (uint8 *)read_param->buffer, read_param->size);
|
||||
read_param->read_length = rcv_num;
|
||||
break;
|
||||
case INT_RCV_LINES: /* RECV LINES INTERRUPT */
|
||||
|
@ -1162,8 +1150,8 @@ static void Stm32Ch438InitDefault(struct SerialDriver *serial_drv)
|
|||
configure_info.configure_cmd = OPE_CFG;
|
||||
configure_info.private_data = (void *)&PinCfg;
|
||||
|
||||
Ch438Sem = KSemaphoreCreate(0);
|
||||
if (Ch438Sem < 0) {
|
||||
ch438_sem = KSemaphoreCreate(0);
|
||||
if (ch438_sem < 0) {
|
||||
KPrintf("Ch438InitDefault create sem failed .\n");
|
||||
return ;
|
||||
}
|
||||
|
@ -1375,21 +1363,21 @@ void CH438RegTest(unsigned char num)//for test
|
|||
{
|
||||
uint8 dat;
|
||||
|
||||
KPrintf("current test serilnum: %02x \r\n",offsetadd[num]);
|
||||
KPrintf("IER: %02x\r\n",ReadCH438Data(offsetadd[num] | REG_IER0_ADDR));//?IER
|
||||
KPrintf("IIR: %02x\r\n",ReadCH438Data(offsetadd[num] | REG_IIR0_ADDR));//?IIR
|
||||
KPrintf("LCR: %02x\r\n",ReadCH438Data(offsetadd[num] | REG_LCR0_ADDR));//?LCR
|
||||
KPrintf("MCR: %02x\r\n",ReadCH438Data(offsetadd[num] | REG_MCR0_ADDR));//?MCR
|
||||
KPrintf("LSR: %02x\r\n",ReadCH438Data(offsetadd[num] | REG_LSR0_ADDR));//?LSR
|
||||
KPrintf("MSR: %02x\r\n",ReadCH438Data(offsetadd[num] | REG_MSR0_ADDR));//?MSR
|
||||
KPrintf("FCR: %02x\r\n",ReadCH438Data(offsetadd[num] | REG_FCR0_ADDR));//?FCR
|
||||
KPrintf("SSR: %02x\r\n",ReadCH438Data( offsetadd[num] | REG_SSR_ADDR ));//?SSR
|
||||
KPrintf("current test serilnum: %02x \r\n",offset_addr[num]);
|
||||
KPrintf("IER: %02x\r\n",ReadCH438Data(offset_addr[num] | REG_IER0_ADDR));//?IER
|
||||
KPrintf("IIR: %02x\r\n",ReadCH438Data(offset_addr[num] | REG_IIR0_ADDR));//?IIR
|
||||
KPrintf("LCR: %02x\r\n",ReadCH438Data(offset_addr[num] | REG_LCR0_ADDR));//?LCR
|
||||
KPrintf("MCR: %02x\r\n",ReadCH438Data(offset_addr[num] | REG_MCR0_ADDR));//?MCR
|
||||
KPrintf("LSR: %02x\r\n",ReadCH438Data(offset_addr[num] | REG_LSR0_ADDR));//?LSR
|
||||
KPrintf("MSR: %02x\r\n",ReadCH438Data(offset_addr[num] | REG_MSR0_ADDR));//?MSR
|
||||
KPrintf("FCR: %02x\r\n",ReadCH438Data(offset_addr[num] | REG_FCR0_ADDR));//?FCR
|
||||
KPrintf("SSR: %02x\r\n",ReadCH438Data( offset_addr[num] | REG_SSR_ADDR ));//?SSR
|
||||
|
||||
KPrintf("SCR0: %02x\r\n",(unsigned short)ReadCH438Data(offsetadd[num] | REG_SCR0_ADDR));//?SCR
|
||||
KPrintf("SCR0: %02x\r\n",(unsigned short)ReadCH438Data(offset_addr[num] | REG_SCR0_ADDR));//?SCR
|
||||
dat = 0x55;
|
||||
WriteCH438Data(offsetadd[num] | REG_SCR0_ADDR, dat);
|
||||
KPrintf("SCR55: %02x\r\n",(unsigned short)ReadCH438Data(offsetadd[num] | REG_SCR0_ADDR));//?SCR
|
||||
WriteCH438Data(offset_addr[num] | REG_SCR0_ADDR, dat);
|
||||
KPrintf("SCR55: %02x\r\n",(unsigned short)ReadCH438Data(offset_addr[num] | REG_SCR0_ADDR));//?SCR
|
||||
dat = 0xAA;
|
||||
WriteCH438Data(offsetadd[num] | REG_SCR0_ADDR, dat);
|
||||
KPrintf("SCRAA: %02x\r\n",(unsigned short)ReadCH438Data(offsetadd[num] | REG_SCR0_ADDR));//?SCR
|
||||
WriteCH438Data(offset_addr[num] | REG_SCR0_ADDR, dat);
|
||||
KPrintf("SCRAA: %02x\r\n",(unsigned short)ReadCH438Data(offset_addr[num] | REG_SCR0_ADDR));//?SCR
|
||||
}
|
||||
|
|
|
@ -55,7 +55,7 @@ struct PinIrq
|
|||
{
|
||||
uint8 port_source;
|
||||
uint8 pin_source;
|
||||
enum IRQn irq_exti_Channel;
|
||||
enum IRQn irq_exti_channel;
|
||||
uint32 exti_line;
|
||||
};
|
||||
|
||||
|
@ -510,8 +510,7 @@ static int32 GpioConfigMode(int mode, const struct PinIndex* index)
|
|||
|
||||
static __inline int32 Bit2Bitnum(uint32 bit)
|
||||
{
|
||||
for (int i = 0; i < 32; i++)
|
||||
{
|
||||
for (int i = 0; i < 32; i++) {
|
||||
if ((1UL << i) == bit) {
|
||||
return i;
|
||||
}
|
||||
|
@ -523,8 +522,7 @@ static __inline int32 Bitno2Bit(uint32 bitno)
|
|||
{
|
||||
if (bitno <= 32) {
|
||||
return 1UL << bitno;
|
||||
}
|
||||
else{
|
||||
} else {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
@ -542,35 +540,35 @@ static const struct PinIrq *GetPinIrq(uint16_t pin)
|
|||
irq.port_source = ((uint32_t)index->gpio - GPIOA_BASE) / (GPIOB_BASE - GPIOA_BASE);
|
||||
switch (irq.pin_source)
|
||||
{
|
||||
case 0 : irq.irq_exti_Channel = EXTI0_IRQn;break;
|
||||
case 1 : irq.irq_exti_Channel = EXTI1_IRQn;break;
|
||||
case 2 : irq.irq_exti_Channel = EXTI2_IRQn;break;
|
||||
case 3 : irq.irq_exti_Channel = EXTI3_IRQn;break;
|
||||
case 4 : irq.irq_exti_Channel = EXTI4_IRQn;break;
|
||||
case 0 : irq.irq_exti_channel = EXTI0_IRQn;break;
|
||||
case 1 : irq.irq_exti_channel = EXTI1_IRQn;break;
|
||||
case 2 : irq.irq_exti_channel = EXTI2_IRQn;break;
|
||||
case 3 : irq.irq_exti_channel = EXTI3_IRQn;break;
|
||||
case 4 : irq.irq_exti_channel = EXTI4_IRQn;break;
|
||||
case 5 :
|
||||
case 6 :
|
||||
case 7 :
|
||||
case 8 :
|
||||
case 9 : irq.irq_exti_Channel = EXTI9_5_IRQn;break;
|
||||
case 9 : irq.irq_exti_channel = EXTI9_5_IRQn;break;
|
||||
case 10 :
|
||||
case 11 :
|
||||
case 12 :
|
||||
case 13 :
|
||||
case 14 :
|
||||
case 15 : irq.irq_exti_Channel = EXTI15_10_IRQn;break;
|
||||
case 15 : irq.irq_exti_channel = EXTI15_10_IRQn;break;
|
||||
default : return NONE;
|
||||
}
|
||||
|
||||
return &irq;
|
||||
};
|
||||
|
||||
static int32 GpioIrqRegister(int32 pin, int32 mode, void (*hdr)(void *args), void *args)
|
||||
{
|
||||
const struct PinIndex* index = GetPin(pin);
|
||||
int32 irqindex = -1;
|
||||
|
||||
irqindex = Bit2Bitnum(index->pin);
|
||||
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_hdr_tab))
|
||||
{
|
||||
if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_hdr_tab)) {
|
||||
return -ENONESYS;
|
||||
}
|
||||
|
||||
|
@ -661,7 +659,7 @@ static int32 GpioIrqEnable(x_base pin)
|
|||
}
|
||||
exit_init_structure.EXTI_LineCmd = ENABLE;
|
||||
EXTI_Init(&exit_init_structure);
|
||||
NVIC_InitStructure.NVIC_IRQChannel = irq->irq_exti_Channel;
|
||||
NVIC_InitStructure.NVIC_IRQChannel = irq->irq_exti_channel;
|
||||
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;
|
||||
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2;
|
||||
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
||||
|
@ -766,8 +764,7 @@ uint32 Stm32PinWrite(void *dev, struct BusBlockWriteParam *write_param)
|
|||
|
||||
if (GPIO_LOW == pinstat->val) {
|
||||
GPIO_ResetBits(index->gpio, index->pin);
|
||||
}
|
||||
else{
|
||||
} else {
|
||||
GPIO_SetBits(index->gpio, index->pin);
|
||||
}
|
||||
return EOK;
|
||||
|
@ -843,8 +840,7 @@ int Stm32HwGpioInit(void)
|
|||
static __inline void PinIrqHdr(int irqno)
|
||||
{
|
||||
EXTI_ClearITPendingBit(Bitno2Bit(irqno));
|
||||
if (pin_irq_hdr_tab[irqno].hdr)
|
||||
{
|
||||
if (pin_irq_hdr_tab[irqno].hdr) {
|
||||
pin_irq_hdr_tab[irqno].hdr(pin_irq_hdr_tab[irqno].args);
|
||||
}
|
||||
}
|
||||
|
|
|
@ -117,7 +117,6 @@ static void I2cGpioInit(const I2cBusParam *bus_param)
|
|||
i2c_sda_stat.val = GPIO_HIGH;
|
||||
write_param.buffer = (void *)&i2c_sda_stat;
|
||||
BusDevWriteData(pin->owner_haldev, &write_param);
|
||||
|
||||
}
|
||||
|
||||
static void SetSdaState(void *data, uint8 sda_state)
|
||||
|
@ -192,8 +191,7 @@ static uint8 GetSclState(void *data)
|
|||
|
||||
ticks = us * reload / (1000000 / TICK_PER_SECOND);
|
||||
told = SysTick->VAL;
|
||||
while (1)
|
||||
{
|
||||
while (1) {
|
||||
tnow = SysTick->VAL;
|
||||
if (tnow != told) {
|
||||
if (tnow < told) {
|
||||
|
@ -227,8 +225,7 @@ static x_err_t I2cBusReset(const I2cBusParam *bus_param)
|
|||
int32 i = 0;
|
||||
|
||||
if (GPIO_LOW == GetSdaState((void *)bus_param)) {
|
||||
while (i++ < 9)
|
||||
{
|
||||
while (i++ < 9) {
|
||||
SetSclState((void *)bus_param,GPIO_HIGH);
|
||||
Stm32Udelay(100);
|
||||
SetSclState((void *)bus_param,GPIO_LOW);
|
||||
|
@ -262,8 +259,7 @@ static x_err_t SclHigh(struct I2cHalDrvDone *done)
|
|||
goto done;
|
||||
|
||||
start = CurrentTicksGain();
|
||||
while (!GET_SCL(done))
|
||||
{
|
||||
while (!GET_SCL(done)) {
|
||||
if ((CurrentTicksGain() - start) > done->timeout)
|
||||
return -ETIMEOUT;
|
||||
DelayKTask((done->timeout + 1) >> 1);
|
||||
|
@ -384,8 +380,7 @@ static x_size_t I2cSendBytes(struct I2cBus *bus, struct I2cDataStandard *msg)
|
|||
int32 count = msg->len;
|
||||
uint16 ignore_nack = msg->flags & I2C_IGNORE_NACK;
|
||||
|
||||
while (count > 0)
|
||||
{
|
||||
while (count > 0) {
|
||||
ret = I2cWriteb(bus, *ptr);
|
||||
|
||||
if ((ret > 0) || (ignore_nack && (ret == 0))) {
|
||||
|
@ -431,8 +426,7 @@ static x_size_t I2cRecvBytes(struct I2cBus *bus, struct I2cDataStandard *msg)
|
|||
int32 count = msg->len;
|
||||
const uint32 flags = msg->flags;
|
||||
|
||||
while (count > 0)
|
||||
{
|
||||
while (count > 0) {
|
||||
val = I2cReadb(bus);
|
||||
if (val >= 0) {
|
||||
*ptr = val;
|
||||
|
@ -536,8 +530,7 @@ static uint32 I2cWriteData(struct I2cHardwareDevice *i2c_dev, struct I2cDataStan
|
|||
uint16 ignore_nack;
|
||||
|
||||
I2cStart(done);
|
||||
while (NONE != msg)
|
||||
{
|
||||
while (NONE != msg) {
|
||||
ignore_nack = msg->flags & I2C_IGNORE_NACK;
|
||||
if (!(msg->flags & I2C_NO_START)) {
|
||||
if (i) {
|
||||
|
@ -579,8 +572,7 @@ static uint32 I2cReadData(struct I2cHardwareDevice *i2c_dev, struct I2cDataStand
|
|||
uint16 ignore_nack;
|
||||
|
||||
I2cStart(done);
|
||||
while (NONE != msg)
|
||||
{
|
||||
while (NONE != msg) {
|
||||
ignore_nack = msg->flags & I2C_IGNORE_NACK;
|
||||
if (!(msg->flags & I2C_NO_START)) {
|
||||
if (i) {
|
||||
|
|
|
@ -32,13 +32,10 @@ struct Stm32Can
|
|||
|
||||
CAN_InitTypeDef init;
|
||||
|
||||
|
||||
uint8 can_flag;
|
||||
struct CanBus can_bus;
|
||||
};
|
||||
|
||||
|
||||
int Stm32HwCanBusInit(void);
|
||||
|
||||
|
||||
#endif
|
|
@ -54,7 +54,7 @@ struct Stm32Spi
|
|||
{
|
||||
SPI_TypeDef *instance;
|
||||
|
||||
char *BusName;
|
||||
char *bus_name;
|
||||
|
||||
SPI_InitTypeDef init;
|
||||
|
||||
|
@ -65,11 +65,11 @@ struct Stm32Spi
|
|||
}dma;
|
||||
|
||||
uint8 spi_dma_flag;
|
||||
struct SpiBus SpiBus;
|
||||
struct SpiBus spi_bus;
|
||||
};
|
||||
|
||||
int Stm32HwSpiInit(void);
|
||||
x_err_t HwSpiDeviceAttach(const char *BusName, const char *device_name, GPIO_TypeDef *cs_gpiox, uint16_t cs_gpio_pin);
|
||||
x_err_t HwSpiDeviceAttach(const char *bus_name, const char *device_name, GPIO_TypeDef *cs_gpiox, uint16_t cs_gpio_pin);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
|
|
@ -20,7 +20,7 @@
|
|||
#include <stm32f4xx.h>
|
||||
|
||||
#define BITBAND(addr, bitnum) ((addr & 0xF0000000)+0x2000000+((addr &0xFFFFF)<<5)+(bitnum<<2))
|
||||
#define MEM_ADDR(addr) *((volatile unsigned long *)(addr))
|
||||
#define MEM_ADDR(addr) (*((volatile unsigned long *)(addr)))
|
||||
#define BIT_ADDR(addr, bitnum) MEM_ADDR(BITBAND(addr, bitnum))
|
||||
|
||||
#define GPIOA_ODR_Addr (GPIOA_BASE+20) //0x40020014
|
||||
|
@ -90,7 +90,8 @@ typedef struct
|
|||
extern touch_device_info tp_dev;
|
||||
|
||||
//save data struct
|
||||
typedef struct {
|
||||
typedef struct
|
||||
{
|
||||
s32 ty_xfac;
|
||||
s32 ty_yfac;
|
||||
short x_pos;
|
||||
|
|
|
@ -51,7 +51,7 @@ struct Stm32Usart
|
|||
x_size_t LastRecvIndex;
|
||||
} dma;
|
||||
|
||||
struct SerialBus SerialBus;
|
||||
struct SerialBus serial_bus;
|
||||
};
|
||||
|
||||
int Stm32HwUsartInit(void);
|
||||
|
|
|
@ -40,8 +40,7 @@ static uint32 SdioConfigure(void *drv, struct BusConfigureInfo *ConfigureInfo)
|
|||
NULL_PARAM_CHECK(drv);
|
||||
NULL_PARAM_CHECK(ConfigureInfo);
|
||||
|
||||
if(ConfigureInfo->configure_cmd == OPER_BLK_GETGEOME)
|
||||
{
|
||||
if (ConfigureInfo->configure_cmd == OPER_BLK_GETGEOME) {
|
||||
NULL_PARAM_CHECK(ConfigureInfo->private_data);
|
||||
struct DeviceBlockArrange *args = (struct DeviceBlockArrange *)ConfigureInfo->private_data;
|
||||
SD_GetCardInfo(&SDCardInfo);
|
||||
|
@ -64,13 +63,11 @@ static uint32 SdioOpen(void *dev)
|
|||
{
|
||||
NULL_PARAM_CHECK(dev);
|
||||
|
||||
if(SDLock >= 0)
|
||||
{
|
||||
if (SDLock >= 0) {
|
||||
KSemaphoreDelete(SDLock);
|
||||
}
|
||||
SDLock = KSemaphoreCreate(1);
|
||||
if (SDLock < 0)
|
||||
{
|
||||
if (SDLock < 0) {
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
|
@ -92,26 +89,22 @@ static uint32 SdioRead(void *dev, struct BusBlockReadParam *read_param)
|
|||
|
||||
KSemaphoreObtain(SDLock, WAITING_FOREVER);
|
||||
|
||||
if(((uint32)read_param->buffer & 0x03) != 0)
|
||||
{
|
||||
if (((uint32)read_param->buffer & 0x03) != 0) {
|
||||
uint64_t sector;
|
||||
uint8_t* temp;
|
||||
|
||||
sector = (uint64_t)read_param->pos * SDCARD_SECTOR_SIZE;
|
||||
temp = (uint8_t*)read_param->buffer;
|
||||
|
||||
for (uint8 i = 0; i < read_param->size; i++)
|
||||
{
|
||||
for (uint8 i = 0; i < read_param->size; i++) {
|
||||
ret = SD_ReadBlock((uint8_t *)SDBuffer, sector, 1);
|
||||
if(ret != SD_OK)
|
||||
{
|
||||
if (ret != SD_OK) {
|
||||
KPrintf("read failed: %d, buffer 0x%08x\n", ret, temp);
|
||||
return 0;
|
||||
}
|
||||
#if defined (SD_DMA_MODE)
|
||||
ret = SD_WaitReadOperation();
|
||||
if(ret != SD_OK)
|
||||
{
|
||||
if (ret != SD_OK) {
|
||||
KPrintf("read failed: %d, buffer 0x%08x\n", ret, temp);
|
||||
return 0;
|
||||
}
|
||||
|
@ -121,19 +114,15 @@ static uint32 SdioRead(void *dev, struct BusBlockReadParam *read_param)
|
|||
sector += SDCARD_SECTOR_SIZE;
|
||||
temp += SDCARD_SECTOR_SIZE;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
} else {
|
||||
ret = SD_ReadBlock((uint8_t *)read_param->buffer, (uint64_t)read_param->pos * SDCARD_SECTOR_SIZE, read_param->size);
|
||||
if(ret != SD_OK)
|
||||
{
|
||||
if (ret != SD_OK) {
|
||||
KPrintf("read failed: %d, buffer 0x%08x\n", ret, (uint8_t *)read_param->buffer);
|
||||
return 0;
|
||||
}
|
||||
#if defined (SD_DMA_MODE)
|
||||
ret = SD_WaitReadOperation();
|
||||
if(ret != SD_OK)
|
||||
{
|
||||
if (ret != SD_OK) {
|
||||
KPrintf("read failed: %d, buffer 0x%08x\n", ret, (uint8_t *)read_param->buffer);
|
||||
return 0;
|
||||
}
|
||||
|
@ -151,28 +140,24 @@ static uint32 SdioWrite(void *dev, struct BusBlockWriteParam *write_param)
|
|||
|
||||
KSemaphoreObtain(SDLock, WAITING_FOREVER);
|
||||
|
||||
if(((uint32)write_param->buffer & 0x03) != 0)
|
||||
{
|
||||
if (((uint32)write_param->buffer & 0x03) != 0) {
|
||||
uint64_t sector;
|
||||
uint8_t* temp;
|
||||
|
||||
sector = (uint64_t)write_param->pos * SDCARD_SECTOR_SIZE;
|
||||
temp = (uint8_t*)write_param->buffer;
|
||||
|
||||
for (uint8 i = 0; i < write_param->size; i++)
|
||||
{
|
||||
for (uint8 i = 0; i < write_param->size; i++) {
|
||||
memcpy(SDBuffer, temp, SDCARD_SECTOR_SIZE);
|
||||
|
||||
ret = SD_WriteBlock((uint8_t *)SDBuffer, sector, 1);
|
||||
if(ret != SD_OK)
|
||||
{
|
||||
if (ret != SD_OK) {
|
||||
KPrintf("write failed: %d, buffer 0x%08x\n", ret, temp);
|
||||
return 0;
|
||||
}
|
||||
#if defined (SD_DMA_MODE)
|
||||
ret = SD_WaitWriteOperation();
|
||||
if(ret != SD_OK)
|
||||
{
|
||||
if (ret != SD_OK) {
|
||||
KPrintf("write failed: %d, buffer 0x%08x\n", ret, temp);
|
||||
return 0;
|
||||
}
|
||||
|
@ -180,19 +165,15 @@ static uint32 SdioWrite(void *dev, struct BusBlockWriteParam *write_param)
|
|||
sector += SDCARD_SECTOR_SIZE;
|
||||
temp += SDCARD_SECTOR_SIZE;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
} else {
|
||||
ret = SD_WriteBlock((uint8_t *)write_param->buffer, (uint64_t)write_param->pos * SDCARD_SECTOR_SIZE, write_param->size);
|
||||
if(ret != SD_OK)
|
||||
{
|
||||
if (ret != SD_OK) {
|
||||
KPrintf("write failed: %d, buffer 0x%08x\n", ret, (uint8_t *)write_param->buffer);
|
||||
return 0;
|
||||
}
|
||||
#if defined (SD_DMA_MODE)
|
||||
ret = SD_WaitWriteOperation();
|
||||
if(ret != SD_OK)
|
||||
{
|
||||
if (ret != SD_OK) {
|
||||
KPrintf("write failed: %d, buffer 0x%08x\n", ret, (uint8_t *)write_param->buffer);
|
||||
return 0;
|
||||
}
|
||||
|
@ -220,42 +201,36 @@ int HwSdioInit(void)
|
|||
|
||||
x_err_t ret = EOK;
|
||||
ret = SD_Init();
|
||||
if(ret != SD_OK)
|
||||
{
|
||||
if (ret != SD_OK) {
|
||||
KPrintf("SD init failed!");
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = SdioBusInit(&bus, SDIO_BUS_NAME);
|
||||
if(ret != EOK)
|
||||
{
|
||||
if (ret != EOK) {
|
||||
KPrintf("Sdio bus init error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = SdioDriverInit(&drv, SDIO_DRIVER_NAME);
|
||||
if(ret != EOK)
|
||||
{
|
||||
if (ret != EOK) {
|
||||
KPrintf("Sdio driver init error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
ret = SdioDriverAttachToBus(SDIO_DRIVER_NAME, SDIO_BUS_NAME);
|
||||
if(ret != EOK)
|
||||
{
|
||||
if (ret != EOK) {
|
||||
KPrintf("Sdio driver attach error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
dev.dev_done = &dev_done;
|
||||
ret = SdioDeviceRegister(&dev, SDIO_DEVICE_NAME);
|
||||
if(ret != EOK)
|
||||
{
|
||||
if (ret != EOK) {
|
||||
KPrintf("Sdio device register error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
ret = SdioDeviceAttachToBus(SDIO_DEVICE_NAME, SDIO_BUS_NAME);
|
||||
if(ret != EOK)
|
||||
{
|
||||
if (ret != EOK) {
|
||||
KPrintf("Sdio device register error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
|
|
@ -42,13 +42,11 @@ int FlashW25qxxSpiDeviceInit(void)
|
|||
tmpreg = RCC->AHB1ENR & RCC_AHB1ENR_GPIOBEN;
|
||||
(void)tmpreg;
|
||||
|
||||
if(EOK != HwSpiDeviceAttach(SPI_BUS_NAME_1, "spi1_dev0", GPIOB, GPIO_Pin_0))
|
||||
{
|
||||
if (EOK != HwSpiDeviceAttach(SPI_BUS_NAME_1, "spi1_dev0", GPIOB, GPIO_Pin_0)) {
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
if(NONE == SpiFlashInit(SPI_BUS_NAME_1, "spi1_dev0", SPI_1_DRV_NAME, "W25Q64"))
|
||||
{
|
||||
if (NONE == SpiFlashInit(SPI_BUS_NAME_1, "spi1_dev0", SPI_1_DRV_NAME, "W25Q64")) {
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
|
|
|
@ -251,7 +251,7 @@ static x_err_t Stm32SpiInit(struct Stm32Spi *SpiDrv, struct SpiMasterParam *cfg)
|
|||
/**
|
||||
* This function Use DMA during spi transfer
|
||||
*
|
||||
* @param SpiBus SPI bus handle
|
||||
* @param spi_bus SPI bus handle
|
||||
*
|
||||
* @param SettingLen Set data length
|
||||
*
|
||||
|
@ -262,9 +262,9 @@ static x_err_t Stm32SpiInit(struct Stm32Spi *SpiDrv, struct SpiMasterParam *cfg)
|
|||
* @return none
|
||||
*/
|
||||
|
||||
static void DmaSpiConfig(struct SpiBus *SpiBus, uint32_t setting_len, void *rx_base_addr, void *tx_base_addr)
|
||||
static void DmaSpiConfig(struct SpiBus *spi_bus, uint32_t setting_len, void *rx_base_addr, void *tx_base_addr)
|
||||
{
|
||||
struct Stm32Spi *spi = (struct Stm32Spi *)SpiBus->private_data;
|
||||
struct Stm32Spi *spi = (struct Stm32Spi *)spi_bus->private_data;
|
||||
uint32 tmpreg = 0x00U;
|
||||
NVIC_InitTypeDef NVIC_InitStructure;
|
||||
|
||||
|
@ -351,13 +351,13 @@ static void DmaSpiConfig(struct SpiBus *SpiBus, uint32_t setting_len, void *rx_b
|
|||
/**
|
||||
* This function DMA receiving completion interrupt
|
||||
*
|
||||
* @param SpiBus SPI bus pointer
|
||||
* @param spi_bus SPI bus pointer
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
static void DmaRxDoneIsr(struct SpiBus *SpiBus)
|
||||
static void DmaRxDoneIsr(struct SpiBus *spi_bus)
|
||||
{
|
||||
struct Stm32Spi *spi = (struct Stm32Spi *) SpiBus->bus.private_data;
|
||||
struct Stm32Spi *spi = (struct Stm32Spi *) spi_bus->bus.private_data;
|
||||
x_size_t recv_len;
|
||||
x_base level;
|
||||
|
||||
|
@ -375,13 +375,13 @@ static void DmaRxDoneIsr(struct SpiBus *SpiBus)
|
|||
/**
|
||||
* This function DMA sending completion interrupt
|
||||
*
|
||||
* @param SpiBus SPI bus pointer
|
||||
* @param spi_bus SPI bus pointer
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
static void DmaTxDoneIsr(struct SpiBus *SpiBus)
|
||||
static void DmaTxDoneIsr(struct SpiBus *spi_bus)
|
||||
{
|
||||
struct Stm32Spi *spi = (struct Stm32Spi *) SpiBus->bus.private_data;
|
||||
struct Stm32Spi *spi = (struct Stm32Spi *) spi_bus->bus.private_data;
|
||||
x_size_t send_len;
|
||||
x_base level;
|
||||
|
||||
|
@ -1158,27 +1158,23 @@ static uint32 Stm32SpiWriteData(struct SpiHardwareDevice *spi_dev, struct SpiDat
|
|||
NULL_PARAM_CHECK(spi_dev);
|
||||
NULL_PARAM_CHECK(spi_datacfg);
|
||||
|
||||
struct Stm32Spi *StmSpi = CONTAINER_OF(spi_dev->haldev.owner_bus, struct Stm32Spi, SpiBus);
|
||||
struct Stm32Spi *StmSpi = CONTAINER_OF(spi_dev->haldev.owner_bus, struct Stm32Spi, spi_bus);
|
||||
SPI_TypeDef *SpiInstance = StmSpi->instance;
|
||||
SPI_InitTypeDef *SpiInit = &StmSpi->init;
|
||||
struct Stm32HwSpiCs *cs = (struct Stm32HwSpiCs *)spi_dev->haldev.private_data;
|
||||
struct Stm32HwSpiCs *cs = (struct Stm32HwSpiCs *)spi_dev->private_data;
|
||||
|
||||
while(NONE != spi_datacfg)
|
||||
{
|
||||
if(spi_datacfg->spi_chip_select)
|
||||
{
|
||||
while(NONE != spi_datacfg) {
|
||||
if (spi_datacfg->spi_chip_select) {
|
||||
GPIO_WriteBit(cs->GPIOx, cs->GPIO_Pin, Bit_RESET);
|
||||
}
|
||||
|
||||
message_length = spi_datacfg->length;
|
||||
WriteBuf = spi_datacfg->tx_buff;
|
||||
while (message_length)
|
||||
{
|
||||
while (message_length) {
|
||||
if (message_length > 65535) {
|
||||
send_length = 65535;
|
||||
message_length = message_length - 65535;
|
||||
}
|
||||
else{
|
||||
} else {
|
||||
send_length = message_length;
|
||||
message_length = 0;
|
||||
}
|
||||
|
@ -1188,12 +1184,10 @@ static uint32 Stm32SpiWriteData(struct SpiHardwareDevice *spi_dev, struct SpiDat
|
|||
WriteBuf = (uint8 *)spi_datacfg->tx_buff + already_send_length;
|
||||
|
||||
/* start once data exchange in DMA mode */
|
||||
if (spi_datacfg->tx_buff)
|
||||
{
|
||||
if (spi_datacfg->tx_buff) {
|
||||
if (StmSpi->spi_dma_flag & SPI_USING_TX_DMA_FLAG) {
|
||||
state = SpiTransmitDma(*SpiInit, SpiInstance, StmSpi->dma.dma_tx.init, StmSpi->dma.dma_tx.instance, (uint8_t *)WriteBuf, send_length);
|
||||
}
|
||||
else{
|
||||
} else {
|
||||
state = SpiTransmit(*SpiInit, SpiInstance, (uint8_t *)WriteBuf, send_length, 1000);
|
||||
}
|
||||
}
|
||||
|
@ -1233,26 +1227,23 @@ static uint32 Stm32SpiReadData(struct SpiHardwareDevice *spi_dev, struct SpiData
|
|||
NULL_PARAM_CHECK(spi_dev);
|
||||
NULL_PARAM_CHECK(spi_datacfg);
|
||||
|
||||
struct Stm32Spi *StmSpi = CONTAINER_OF(spi_dev->haldev.owner_bus, struct Stm32Spi, SpiBus);
|
||||
struct Stm32Spi *StmSpi = CONTAINER_OF(spi_dev->haldev.owner_bus, struct Stm32Spi, spi_bus);
|
||||
SPI_TypeDef *SpiInstance = StmSpi->instance;
|
||||
SPI_InitTypeDef *SpiInit = &StmSpi->init;
|
||||
struct Stm32HwSpiCs *cs = (struct Stm32HwSpiCs *)spi_dev->haldev.private_data;
|
||||
struct Stm32HwSpiCs *cs = (struct Stm32HwSpiCs *)spi_dev->private_data;
|
||||
|
||||
while(NONE != spi_datacfg)
|
||||
{
|
||||
while(NONE != spi_datacfg) {
|
||||
if(spi_datacfg->spi_chip_select) {
|
||||
GPIO_WriteBit(cs->GPIOx, cs->GPIO_Pin, Bit_RESET);
|
||||
}
|
||||
|
||||
message_length = spi_datacfg->length;
|
||||
ReadBuf = spi_datacfg->rx_buff;
|
||||
while (message_length)
|
||||
{
|
||||
while (message_length) {
|
||||
if (message_length > 65535){
|
||||
send_length = 65535;
|
||||
message_length = message_length - 65535;
|
||||
}
|
||||
else{
|
||||
} else {
|
||||
send_length = message_length;
|
||||
message_length = 0;
|
||||
}
|
||||
|
@ -1262,13 +1253,11 @@ static uint32 Stm32SpiReadData(struct SpiHardwareDevice *spi_dev, struct SpiData
|
|||
ReadBuf = (uint8 *)spi_datacfg->rx_buff + already_send_length;
|
||||
|
||||
/* start once data exchange in DMA mode */
|
||||
if (spi_datacfg->rx_buff)
|
||||
{
|
||||
if (spi_datacfg->rx_buff) {
|
||||
memset((uint8_t *)ReadBuf, 0xff, send_length);
|
||||
if (StmSpi->spi_dma_flag & SPI_USING_RX_DMA_FLAG) {
|
||||
state = SpiReceiveDma(*SpiInit, SpiInstance, StmSpi->dma.dma_rx.init, StmSpi->dma.dma_rx.instance, StmSpi->dma.dma_tx.init, StmSpi->dma.dma_tx.instance, (uint8_t *)ReadBuf, send_length);
|
||||
}
|
||||
else{
|
||||
} else {
|
||||
state = SpiReceive(*SpiInit, SpiInstance, (uint8_t *)ReadBuf, send_length, 1000);
|
||||
}
|
||||
}
|
||||
|
@ -1302,7 +1291,7 @@ static uint32 SpiDrvInit(struct SpiDriver *spi_drv)
|
|||
|
||||
SpiDeviceParam *dev_param = (SpiDeviceParam *)(spi_drv->driver.private_data);
|
||||
|
||||
struct Stm32Spi *StmSpi = CONTAINER_OF(spi_drv->driver.owner_bus, struct Stm32Spi, SpiBus);
|
||||
struct Stm32Spi *StmSpi = CONTAINER_OF(spi_drv->driver.owner_bus, struct Stm32Spi, spi_bus);
|
||||
|
||||
return Stm32SpiInit(StmSpi, dev_param->spi_master_param);
|
||||
}
|
||||
|
@ -1369,7 +1358,7 @@ struct Stm32Spi spi1;
|
|||
#if defined(BSP_SPI1_TX_USING_DMA)
|
||||
void DMA2_Stream3_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
DmaTxDoneIsr(&spi1.SpiBus);
|
||||
DmaTxDoneIsr(&spi1.spi_bus);
|
||||
}
|
||||
DECLARE_HW_IRQ(DMA2_Stream3_IRQn, DMA2_Stream3_IRQHandler, NONE);
|
||||
#endif
|
||||
|
@ -1377,7 +1366,7 @@ DECLARE_HW_IRQ(DMA2_Stream3_IRQn, DMA2_Stream3_IRQHandler, NONE);
|
|||
#if defined(BSP_SPI1_RX_USING_DMA)
|
||||
void DMA2_Stream0_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
DmaRxDoneIsr(&spi1.SpiBus);
|
||||
DmaRxDoneIsr(&spi1.spi_bus);
|
||||
}
|
||||
DECLARE_HW_IRQ(DMA2_Stream0_IRQn, DMA2_Stream0_IRQHandler, NONE);
|
||||
#endif
|
||||
|
@ -1388,7 +1377,7 @@ struct Stm32Spi spi2;
|
|||
#if defined(BSP_SPI2_TX_USING_DMA)
|
||||
void DMA1_Stream4_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
DmaTxDoneIsr(&spi2.SpiBus);
|
||||
DmaTxDoneIsr(&spi2.spi_bus);
|
||||
}
|
||||
DECLARE_HW_IRQ(DMA1_Stream4_IRQn, DMA1_Stream4_IRQHandler, NONE);
|
||||
#endif
|
||||
|
@ -1396,7 +1385,7 @@ DECLARE_HW_IRQ(DMA1_Stream4_IRQn, DMA1_Stream4_IRQHandler, NONE);
|
|||
#if defined(BSP_SPI2_RX_USING_DMA)
|
||||
void DMA1_Stream3_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
DmaTxDoneIsr(&spi2.SpiBus);
|
||||
DmaTxDoneIsr(&spi2.spi_bus);
|
||||
}
|
||||
DECLARE_HW_IRQ(DMA1_Stream3_IRQn, DMA1_Stream3_IRQHandler, NONE);
|
||||
#endif
|
||||
|
@ -1407,7 +1396,7 @@ struct Stm32Spi spi3;
|
|||
#if defined(BSP_SPI3_TX_USING_DMA)
|
||||
void DMA1_Stream7_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
DmaTxDoneIsr(&spi3.SpiBus);
|
||||
DmaTxDoneIsr(&spi3.spi_bus);
|
||||
}
|
||||
DECLARE_HW_IRQ(DMA1_Stream7_IRQn, DMA1_Stream7_IRQHandler, NONE);
|
||||
#endif
|
||||
|
@ -1420,11 +1409,12 @@ DECLARE_HW_IRQ(DMA1_Stream7_IRQn, DMA1_Stream7_IRQHandler, NONE);
|
|||
*/
|
||||
void DMA1_Stream2_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
DmaRxDoneIsr(&spi3.SpiBus);
|
||||
DmaRxDoneIsr(&spi3.spi_bus);
|
||||
}
|
||||
DECLARE_HW_IRQ(DMA1_Stream2_IRQn, DMA1_Stream2_IRQHandler, NONE);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/**
|
||||
* This function RCC clock configuration function
|
||||
*
|
||||
|
@ -1507,7 +1497,6 @@ static void GPIOConfiguration(void)
|
|||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* This function Init the spi bus 、spi driver and attach to the bus
|
||||
*
|
||||
|
@ -1522,7 +1511,7 @@ static int BoardSpiBusInit(struct Stm32Spi *stm32spi_bus, struct SpiDriver *spi_
|
|||
x_err_t ret = EOK;
|
||||
|
||||
/*Init the spi bus */
|
||||
ret = SpiBusInit(&stm32spi_bus->SpiBus, stm32spi_bus->BusName);
|
||||
ret = SpiBusInit(&stm32spi_bus->spi_bus, stm32spi_bus->bus_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("Board_Spi_init SpiBusInit error %d\n", ret);
|
||||
return ERROR;
|
||||
|
@ -1536,7 +1525,7 @@ static int BoardSpiBusInit(struct Stm32Spi *stm32spi_bus, struct SpiDriver *spi_
|
|||
}
|
||||
|
||||
/*Attach the spi driver to the spi bus*/
|
||||
ret = SpiDriverAttachToBus(drv_name, stm32spi_bus->BusName);
|
||||
ret = SpiDriverAttachToBus(drv_name, stm32spi_bus->bus_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("Board_Spi_init SpiDriverAttachToBus error %d\n", ret);
|
||||
return ERROR;
|
||||
|
@ -1561,9 +1550,9 @@ static int Stm32HwSpiBusInit(void)
|
|||
#ifdef BSP_USING_SPI1
|
||||
StmSpiBus = &spi1;
|
||||
StmSpiBus->instance = SPI1;
|
||||
StmSpiBus->BusName = SPI_BUS_NAME_1;
|
||||
StmSpiBus->SpiBus.private_data = &spi1;
|
||||
DmaSpiConfig(&StmSpiBus->SpiBus, 0, NONE, NONE);
|
||||
StmSpiBus->bus_name = SPI_BUS_NAME_1;
|
||||
StmSpiBus->spi_bus.private_data = &spi1;
|
||||
DmaSpiConfig(&StmSpiBus->spi_bus, 0, NONE, NONE);
|
||||
|
||||
static struct SpiDriver spi_driver_1;
|
||||
memset(&spi_driver_1, 0, sizeof(struct SpiDriver));
|
||||
|
@ -1571,9 +1560,8 @@ static int Stm32HwSpiBusInit(void)
|
|||
spi_driver_1.configure = &(Stm32SpiDrvConfigure);
|
||||
|
||||
ret = BoardSpiBusInit(StmSpiBus, &spi_driver_1, SPI_1_DRV_NAME);
|
||||
if(EOK != ret)
|
||||
{
|
||||
KPrintf("Board_Spi_Init spi_bus_init %s error ret %u\n", StmSpiBus->BusName, ret);
|
||||
if (EOK != ret) {
|
||||
KPrintf("Board_Spi_Init spi_bus_init %s error ret %u\n", StmSpiBus->bus_name, ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
@ -1581,9 +1569,9 @@ static int Stm32HwSpiBusInit(void)
|
|||
#ifdef BSP_USING_SPI2
|
||||
StmSpiBus = &spi2;
|
||||
StmSpiBus->instance = SPI2;
|
||||
StmSpiBus->BusName = SPI_BUS_NAME_2;
|
||||
StmSpiBus->SpiBus.private_data = &spi2;
|
||||
DmaSpiConfig(&StmSpiBus->SpiBus, 0, NONE, NONE);
|
||||
StmSpiBus->bus_name = SPI_BUS_NAME_2;
|
||||
StmSpiBus->spi_bus.private_data = &spi2;
|
||||
DmaSpiConfig(&StmSpiBus->spi_bus, 0, NONE, NONE);
|
||||
|
||||
static struct SpiDriver spi_driver_2;
|
||||
memset(&spi_driver_2, 0, sizeof(struct SpiDriver));
|
||||
|
@ -1591,8 +1579,7 @@ static int Stm32HwSpiBusInit(void)
|
|||
spi_driver_2.configure = &(Stm32SpiDrvConfigure);
|
||||
|
||||
ret = BoardSpiBusInit(StmSpiBus, &spi_driver_2, SPI_2_DRV_NAME);
|
||||
if(EOK != ret)
|
||||
{
|
||||
if (EOK != ret) {
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
@ -1600,9 +1587,9 @@ static int Stm32HwSpiBusInit(void)
|
|||
#ifdef BSP_USING_SPI3
|
||||
StmSpiBus = &spi3;
|
||||
StmSpiBus->instance = SPI3;
|
||||
StmSpiBus->BusName = SPI_BUS_NAME_3;
|
||||
StmSpiBus->SpiBus.private_data = &spi3;
|
||||
DmaSpiConfig(&StmSpiBus->SpiBus, 0, NONE, NONE);
|
||||
StmSpiBus->bus_name = SPI_BUS_NAME_3;
|
||||
StmSpiBus->spi_bus.private_data = &spi3;
|
||||
DmaSpiConfig(&StmSpiBus->spi_bus, 0, NONE, NONE);
|
||||
|
||||
static struct SpiDriver spi_driver_3;
|
||||
memset(&spi_driver_3, 0, sizeof(struct SpiDriver));
|
||||
|
@ -1610,9 +1597,8 @@ static int Stm32HwSpiBusInit(void)
|
|||
spi_driver_3.configure = &(Stm32SpiDrvConfigure);
|
||||
|
||||
ret = BoardSpiBusInit(StmSpiBus, &spi_driver_3, SPI_3_DRV_NAME);
|
||||
if(EOK != ret)
|
||||
{
|
||||
KPrintf("Board_Spi_Init spi_bus_init %s error ret %u\n", StmSpiBus->BusName, ret);
|
||||
if (EOK != ret) {
|
||||
KPrintf("Board_Spi_Init spi_bus_init %s error ret %u\n", StmSpiBus->bus_name, ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
@ -1622,7 +1608,7 @@ static int Stm32HwSpiBusInit(void)
|
|||
/**
|
||||
* This function Mount the spi device to the bus
|
||||
*
|
||||
* @param BusName Bus Name
|
||||
* @param bus_name Bus Name
|
||||
*
|
||||
* @param device_name spi device name
|
||||
*
|
||||
|
@ -1632,14 +1618,16 @@ static int Stm32HwSpiBusInit(void)
|
|||
*
|
||||
* @return EOK
|
||||
*/
|
||||
x_err_t HwSpiDeviceAttach(const char *BusName, const char *device_name, GPIO_TypeDef *cs_gpiox, uint16_t cs_gpio_pin)
|
||||
x_err_t HwSpiDeviceAttach(const char *bus_name, const char *device_name, GPIO_TypeDef *cs_gpiox, uint16_t cs_gpio_pin)
|
||||
{
|
||||
NULL_PARAM_CHECK(BusName);
|
||||
NULL_PARAM_CHECK(bus_name);
|
||||
NULL_PARAM_CHECK(device_name);
|
||||
|
||||
x_err_t result;
|
||||
struct SpiHardwareDevice *SpiDevice;
|
||||
struct Stm32HwSpiCs *CsPin;
|
||||
struct SpiHardwareDevice *spi_device;
|
||||
struct Stm32HwSpiCs *cs_pin_param;
|
||||
static SpiDeviceParam spi_dev_param;
|
||||
memset(&spi_dev_param, 0, sizeof(SpiDeviceParam));
|
||||
|
||||
/* initialize the cs pin && select the slave*/
|
||||
GPIO_InitTypeDef GPIO_Initure;
|
||||
|
@ -1651,34 +1639,35 @@ x_err_t HwSpiDeviceAttach(const char *BusName, const char *device_name, GPIO_Typ
|
|||
GPIO_WriteBit(cs_gpiox, cs_gpio_pin, Bit_SET);
|
||||
|
||||
/* attach the device to spi bus*/
|
||||
SpiDevice = (struct SpiHardwareDevice *)x_malloc(sizeof(struct SpiHardwareDevice));
|
||||
CHECK(SpiDevice);
|
||||
memset(SpiDevice, 0, sizeof(struct SpiHardwareDevice));
|
||||
CsPin = (struct Stm32HwSpiCs *)x_malloc(sizeof(struct Stm32HwSpiCs));
|
||||
CHECK(CsPin);
|
||||
memset(CsPin, 0, sizeof(struct Stm32HwSpiCs));
|
||||
CsPin->GPIOx = cs_gpiox;
|
||||
CsPin->GPIO_Pin = cs_gpio_pin;
|
||||
spi_device = (struct SpiHardwareDevice *)x_malloc(sizeof(struct SpiHardwareDevice));
|
||||
CHECK(spi_device);
|
||||
memset(spi_device, 0, sizeof(struct SpiHardwareDevice));
|
||||
cs_pin_param = (struct Stm32HwSpiCs *)x_malloc(sizeof(struct Stm32HwSpiCs));
|
||||
CHECK(cs_pin_param);
|
||||
memset(cs_pin_param, 0, sizeof(struct Stm32HwSpiCs));
|
||||
cs_pin_param->GPIOx = cs_gpiox;
|
||||
cs_pin_param->GPIO_Pin = cs_gpio_pin;
|
||||
|
||||
SpiDevice->spi_dev_done = &spi_dev_done;
|
||||
spi_device->spi_dev_done = &spi_dev_done;
|
||||
spi_device->private_data = (void *)cs_pin_param;
|
||||
|
||||
result = SpiDeviceRegister(SpiDevice, (void *)CsPin, device_name);
|
||||
if (result != EOK)
|
||||
{
|
||||
SYS_ERR("%s device %p register faild, %d\n", device_name, SpiDevice, result);
|
||||
result = SpiDeviceRegister(spi_device, (void *)&spi_dev_param, device_name);
|
||||
if (result != EOK) {
|
||||
SYS_ERR("%s device %p register faild, %d\n", device_name, spi_device, result);
|
||||
}
|
||||
|
||||
result = SpiDeviceAttachToBus(device_name, BusName);
|
||||
result = SpiDeviceAttachToBus(device_name, bus_name);
|
||||
if (result != EOK) {
|
||||
SYS_ERR("%s attach to %s faild, %d\n", device_name, BusName, result);
|
||||
SYS_ERR("%s attach to %s faild, %d\n", device_name, bus_name, result);
|
||||
}
|
||||
|
||||
CHECK(result == EOK);
|
||||
|
||||
KPrintf("%s attach to %s done\n", device_name, BusName);
|
||||
KPrintf("%s attach to %s done\n", device_name, bus_name);
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
/**
|
||||
* This function Get DMA information
|
||||
*
|
||||
|
@ -1731,6 +1720,7 @@ static void Stm32GetDmaInfo(void)
|
|||
spi3.dma.dma_tx.dma_irq = DMA1_Stream7_IRQn; /*Enable DMA interrupt line*/
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* This function hardware spi initialization
|
||||
*
|
||||
|
|
|
@ -40,17 +40,15 @@ Modification:
|
|||
|
||||
static struct HwtimerCallBackInfo *ptim2_cb_info = NULL;
|
||||
|
||||
|
||||
#ifdef ENABLE_TIM2
|
||||
void TIM2_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
TIM_ClearITPendingBit(TIM2, TIM_IT_Update);
|
||||
KPrintf("hwtimer 2 ... come ...\n");
|
||||
|
||||
if (ptim2_cb_info)
|
||||
{
|
||||
if (ptim2_cb_info->TimeoutCb){
|
||||
ptim2_cb_info->TimeoutCb(ptim2_cb_info->param);
|
||||
if (ptim2_cb_info) {
|
||||
if (ptim2_cb_info->timeout_callback){
|
||||
ptim2_cb_info->timeout_callback(ptim2_cb_info->param);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -171,7 +169,6 @@ int Stm32HwTimerInit(void)
|
|||
static struct HwtimerDriver hwtimer_driver;
|
||||
memset(&hwtimer_driver, 0, sizeof(struct HwtimerDriver));
|
||||
|
||||
|
||||
ret = BoardHwtimerBusInit(&hwtimer_bus, &hwtimer_driver);
|
||||
if (EOK != ret) {
|
||||
KPrintf("board_hwtimer_Init error ret %u\n", ret);
|
||||
|
|
|
@ -44,13 +44,11 @@ touch_device_info tp_dev=
|
|||
0,
|
||||
};
|
||||
|
||||
|
||||
|
||||
unsigned char CMD_RDX=0XD0;
|
||||
unsigned char CMD_RDY=0X90;
|
||||
|
||||
|
||||
TP_modify_save modify_save={
|
||||
TP_modify_save modify_save =
|
||||
{
|
||||
0,0,0,0,0,0
|
||||
};
|
||||
|
||||
|
@ -62,8 +60,7 @@ unsigned char CMD_RDY=0X90;
|
|||
|
||||
ticks = us * reload / (1000000 / TICK_PER_SECOND);
|
||||
told = SysTick->VAL;
|
||||
while (1)
|
||||
{
|
||||
while (1) {
|
||||
tnow = SysTick->VAL;
|
||||
if (tnow != told) {
|
||||
if (tnow < told) {
|
||||
|
@ -83,10 +80,11 @@ unsigned char CMD_RDY=0X90;
|
|||
void TouchWriteByte(unsigned char num)
|
||||
{
|
||||
u8 count=0;
|
||||
for(count=0;count<8;count++)
|
||||
{
|
||||
if(num&0x80)T_MOSI=1;
|
||||
else T_MOSI=0;
|
||||
for(count = 0;count < 8;count ++) {
|
||||
if (num & 0x80)
|
||||
T_MOSI=1;
|
||||
else
|
||||
T_MOSI=0;
|
||||
num <<= 1;
|
||||
T_CLK = 0;
|
||||
Stm32Udelay(1);
|
||||
|
@ -94,50 +92,53 @@ void TouchWriteByte(unsigned char num)
|
|||
}
|
||||
}
|
||||
|
||||
u16 TP_Read_AD(u8 cmd)
|
||||
u16 TpReadAd(u8 cmd)
|
||||
{
|
||||
u8 count = 0;
|
||||
u16 Num = 0;
|
||||
|
||||
T_CLK =0;
|
||||
T_MOSI = 0;
|
||||
TCS = 0;
|
||||
|
||||
TouchWriteByte(cmd);
|
||||
Stm32Udelay(6);
|
||||
T_CLK = 0;
|
||||
|
||||
Stm32Udelay(1);
|
||||
T_CLK = 1;
|
||||
|
||||
Stm32Udelay(1);
|
||||
T_CLK = 0;
|
||||
for(count=0;count<16;count++)
|
||||
{
|
||||
|
||||
for(count = 0;count < 16;count ++) {
|
||||
Num <<= 1;
|
||||
T_CLK = 0;
|
||||
Stm32Udelay(1);
|
||||
T_CLK =1;
|
||||
if(T_MISO == 1)Num++;
|
||||
if (T_MISO == 1)
|
||||
Num++;
|
||||
}
|
||||
Num >>= 4;
|
||||
TCS = 1;
|
||||
|
||||
return(Num);
|
||||
}
|
||||
|
||||
|
||||
|
||||
#define READ_TIMES 5
|
||||
#define LOST_VAL 1
|
||||
u16 TP_Read_XOY(u8 xy)
|
||||
|
||||
u16 TpReadXoy(u8 xy)
|
||||
{
|
||||
u16 i, j;
|
||||
u16 buf[READ_TIMES];
|
||||
u16 sum=0;
|
||||
u16 temp;
|
||||
for(i=0;i<READ_TIMES;i++)buf[i]=TP_Read_AD(xy);
|
||||
for(i=0;i<READ_TIMES-1; i++)
|
||||
{
|
||||
for(j=i+1;j<READ_TIMES;j++)
|
||||
{
|
||||
if(buf[i]>buf[j])
|
||||
{
|
||||
for(i = 0;i < READ_TIMES;i ++)
|
||||
buf[i]=TpReadAd(xy);
|
||||
for(i = 0;i < READ_TIMES-1; i ++) {
|
||||
for(j = i+1;j < READ_TIMES;j ++) {
|
||||
if (buf[i] > buf[j]) {
|
||||
temp=buf[i];
|
||||
buf[i]=buf[j];
|
||||
buf[j]=temp;
|
||||
|
@ -145,16 +146,17 @@ u16 TP_Read_XOY(u8 xy)
|
|||
}
|
||||
}
|
||||
sum=0;
|
||||
for(i=LOST_VAL;i<READ_TIMES-LOST_VAL;i++)sum+=buf[i];
|
||||
for(i = LOST_VAL;i < READ_TIMES - LOST_VAL;i ++)
|
||||
sum+=buf[i];
|
||||
temp=sum/(READ_TIMES-2*LOST_VAL);
|
||||
return temp;
|
||||
}
|
||||
|
||||
u8 TP_Read_XY(u16 *x,u16 *y)
|
||||
u8 TpReadXy(u16 *x, u16 *y)
|
||||
{
|
||||
u16 xtemp,ytemp;
|
||||
xtemp=TP_Read_XOY(CMD_RDX);
|
||||
ytemp=TP_Read_XOY(CMD_RDY);
|
||||
xtemp=TpReadXoy(CMD_RDX);
|
||||
ytemp=TpReadXoy(CMD_RDY);
|
||||
|
||||
*x=xtemp;
|
||||
*y=ytemp;
|
||||
|
@ -166,19 +168,16 @@ static uint32 TouchRead(void *dev, struct BusBlockReadParam *read_param)
|
|||
uint32 ret = EOK;
|
||||
NULL_PARAM_CHECK(read_param);
|
||||
struct TouchDataStandard * data = ( struct TouchDataStandard*)read_param->buffer;
|
||||
TP_Read_XY(&data->x,&data->y);
|
||||
TpReadXy(&data->x,&data->y);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
|
||||
static uint32 TouchConfigure(void *drv, struct BusConfigureInfo *configure_info)
|
||||
{
|
||||
GPIO_InitTypeDef gpio_initstructure;
|
||||
|
||||
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB|RCC_AHB1Periph_GPIOG|RCC_AHB1Periph_GPIOD, ENABLE);
|
||||
|
||||
|
||||
gpio_initstructure.GPIO_Pin =GPIO_Pin_4;
|
||||
gpio_initstructure.GPIO_Mode = GPIO_Mode_IN;
|
||||
gpio_initstructure.GPIO_OType = GPIO_OType_PP;
|
||||
|
@ -202,25 +201,21 @@ static uint32 TouchConfigure(void *drv, struct BusConfigureInfo *configure_info
|
|||
gpio_initstructure.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_Init(GPIOD, &gpio_initstructure);
|
||||
|
||||
|
||||
return 0;
|
||||
|
||||
}
|
||||
|
||||
|
||||
struct TouchDevDone touch_dev_done ={
|
||||
struct TouchDevDone touch_dev_done =
|
||||
{
|
||||
.open = NONE,
|
||||
.close = NONE,
|
||||
.write = NONE,
|
||||
.read = TouchRead
|
||||
};
|
||||
|
||||
|
||||
|
||||
struct Stm32Touch
|
||||
{
|
||||
char *BusName;
|
||||
struct TouchBus touchbus;
|
||||
char *bus_name;
|
||||
struct TouchBus touch_bus;
|
||||
};
|
||||
|
||||
struct Stm32Touch touch;
|
||||
|
@ -230,7 +225,7 @@ static int BoardTouchBusInit(struct Stm32Touch *stm32touch_bus, struct TouchDriv
|
|||
x_err_t ret = EOK;
|
||||
|
||||
/*Init the touch bus */
|
||||
ret = TouchBusInit(&stm32touch_bus->touchbus, stm32touch_bus->BusName);
|
||||
ret = TouchBusInit(&stm32touch_bus->touch_bus, stm32touch_bus->bus_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("Board_touch_init touchBusInit error %d\n", ret);
|
||||
return ERROR;
|
||||
|
@ -244,7 +239,7 @@ static int BoardTouchBusInit(struct Stm32Touch *stm32touch_bus, struct TouchDriv
|
|||
}
|
||||
|
||||
/*Attach the touch driver to the touch bus*/
|
||||
ret = TouchDriverAttachToBus(TOUCH_DRV_NAME_1, stm32touch_bus->BusName);
|
||||
ret = TouchDriverAttachToBus(TOUCH_DRV_NAME_1, stm32touch_bus->bus_name);
|
||||
if (EOK != ret){
|
||||
KPrintf("Board_touch_init TouchDriverAttachToBus error %d\n", ret);
|
||||
return ERROR;
|
||||
|
@ -253,8 +248,6 @@ static int BoardTouchBusInit(struct Stm32Touch *stm32touch_bus, struct TouchDriv
|
|||
return ret;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*Attach the touch device to the touch bus*/
|
||||
static int BoardTouchDevBend(void)
|
||||
{
|
||||
|
@ -290,13 +283,14 @@ int Stm32HwTouchBusInit(void)
|
|||
touch_driver.configure = TouchConfigure;
|
||||
|
||||
Stmtouch = &touch;
|
||||
Stmtouch->BusName = TOUCH_BUS_NAME_1;
|
||||
Stmtouch->touchbus.private_data = &touch;
|
||||
Stmtouch->bus_name = TOUCH_BUS_NAME_1;
|
||||
Stmtouch->touch_bus.private_data = &touch;
|
||||
|
||||
ret = BoardTouchBusInit(Stmtouch, &touch_driver);
|
||||
if (EOK != ret) {
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = BoardTouchDevBend();
|
||||
if (EOK != ret) {
|
||||
KPrintf("board_touch_Init error ret %u\n", ret);
|
||||
|
|
|
@ -198,7 +198,7 @@ static void DmaUartConfig(struct Stm32UsartDma *dma, USART_TypeDef *uart_device,
|
|||
|
||||
static void DMAConfiguration(struct SerialHardwareDevice *serial_dev, USART_TypeDef *uart_device)
|
||||
{
|
||||
struct Stm32Usart *serial = CONTAINER_OF(serial_dev->haldev.owner_bus, struct Stm32Usart, SerialBus);
|
||||
struct Stm32Usart *serial = CONTAINER_OF(serial_dev->haldev.owner_bus, struct Stm32Usart, serial_bus);
|
||||
struct Stm32UsartDma *dma = &serial->dma;
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_dev->private_data;
|
||||
|
||||
|
@ -275,25 +275,21 @@ static uint32 Stm32SerialInit(struct SerialDriver *serial_drv, struct BusConfigu
|
|||
|
||||
if (serial_cfg->data_cfg.serial_data_bits == DATA_BITS_8) {
|
||||
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
|
||||
}
|
||||
else if (serial_cfg->data_cfg.serial_data_bits == DATA_BITS_9){
|
||||
} else if (serial_cfg->data_cfg.serial_data_bits == DATA_BITS_9) {
|
||||
USART_InitStructure.USART_WordLength = USART_WordLength_9b;
|
||||
}
|
||||
|
||||
if (serial_cfg->data_cfg.serial_stop_bits == STOP_BITS_1) {
|
||||
USART_InitStructure.USART_StopBits = USART_StopBits_1;
|
||||
}
|
||||
else if (serial_cfg->data_cfg.serial_stop_bits == STOP_BITS_2) {
|
||||
} else if (serial_cfg->data_cfg.serial_stop_bits == STOP_BITS_2) {
|
||||
USART_InitStructure.USART_StopBits = USART_StopBits_2;
|
||||
}
|
||||
|
||||
if (serial_cfg->data_cfg.serial_parity_mode == PARITY_NONE) {
|
||||
USART_InitStructure.USART_Parity = USART_Parity_No;
|
||||
}
|
||||
else if (serial_cfg->data_cfg.serial_parity_mode == PARITY_ODD){
|
||||
} else if (serial_cfg->data_cfg.serial_parity_mode == PARITY_ODD) {
|
||||
USART_InitStructure.USART_Parity = USART_Parity_Odd;
|
||||
}
|
||||
else if (serial_cfg->data_cfg.serial_parity_mode == PARITY_EVEN){
|
||||
} else if (serial_cfg->data_cfg.serial_parity_mode == PARITY_EVEN) {
|
||||
USART_InitStructure.USART_Parity = USART_Parity_Even;
|
||||
}
|
||||
|
||||
|
@ -681,7 +677,7 @@ int Stm32HwUsartInit(void)
|
|||
|
||||
NVIC_Configuration(serial_hw_cfg_1.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_1.SerialBus, &serial_driver_1, SERIAL_BUS_NAME_1, SERIAL_DRV_NAME_1);
|
||||
ret = BoardSerialBusInit(&serial_1.serial_bus, &serial_driver_1, SERIAL_BUS_NAME_1, SERIAL_DRV_NAME_1);
|
||||
if (EOK != ret) {
|
||||
KPrintf("Stm32HwUsartInit usart1 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
|
@ -723,7 +719,7 @@ int Stm32HwUsartInit(void)
|
|||
|
||||
NVIC_Configuration(serial_hw_cfg_2.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_2.SerialBus, &serial_driver_2, SERIAL_BUS_NAME_2, SERIAL_DRV_NAME_2);
|
||||
ret = BoardSerialBusInit(&serial_2.serial_bus, &serial_driver_2, SERIAL_BUS_NAME_2, SERIAL_DRV_NAME_2);
|
||||
if (EOK != ret) {
|
||||
KPrintf("Stm32HwUsartInit usart2 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
|
@ -765,7 +761,7 @@ int Stm32HwUsartInit(void)
|
|||
|
||||
NVIC_Configuration(serial_hw_cfg_3.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_3.SerialBus, &serial_driver_3, SERIAL_BUS_NAME_3, SERIAL_DRV_NAME_3);
|
||||
ret = BoardSerialBusInit(&serial_3.serial_bus, &serial_driver_3, SERIAL_BUS_NAME_3, SERIAL_DRV_NAME_3);
|
||||
if (EOK != ret) {
|
||||
KPrintf("Stm32HwUsartInit usart3 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
|
@ -806,7 +802,7 @@ int Stm32HwUsartInit(void)
|
|||
|
||||
NVIC_Configuration(serial_hw_cfg_4.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_4.SerialBus, &serial_driver_4, SERIAL_BUS_NAME_4, SERIAL_DRV_NAME_4);
|
||||
ret = BoardSerialBusInit(&serial_4.serial_bus, &serial_driver_4, SERIAL_BUS_NAME_4, SERIAL_DRV_NAME_4);
|
||||
if (EOK != ret) {
|
||||
KPrintf("Stm32HwUsartInit usart4 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
|
@ -847,7 +843,7 @@ int Stm32HwUsartInit(void)
|
|||
|
||||
NVIC_Configuration(serial_hw_cfg_5.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_5.SerialBus, &serial_driver_5, SERIAL_BUS_NAME_5, SERIAL_DRV_NAME_5);
|
||||
ret = BoardSerialBusInit(&serial_5.serial_bus, &serial_driver_5, SERIAL_BUS_NAME_5, SERIAL_DRV_NAME_5);
|
||||
if (EOK != ret) {
|
||||
KPrintf("Stm32HwUsartInit usart5 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
|
|
|
@ -107,7 +107,6 @@ int Stm32HwUsbInit(void)
|
|||
static struct UsbDriver usb_driver;
|
||||
memset(&usb_driver, 0, sizeof(struct UsbDriver));
|
||||
|
||||
|
||||
ret = BoardUsbBusInit(&usb_bus, &usb_driver);
|
||||
if (EOK != ret) {
|
||||
KPrintf("board_usb_Init error ret %u\n", ret);
|
||||
|
|
|
@ -49,7 +49,7 @@ static uint32 Ch376Configure(void *drv, struct BusConfigureInfo *configure_info)
|
|||
|
||||
static int HwCh376RxInd(void *dev, x_size_t length)
|
||||
{
|
||||
sdio.MsgLen += length;
|
||||
sdio.msg_len += length;
|
||||
KSemaphoreAbandon(sdio.sem);
|
||||
|
||||
return EOK;
|
||||
|
@ -115,9 +115,9 @@ static uint32 Ch376Read(void *dev, struct BusBlockReadParam *read_param)
|
|||
{
|
||||
if (KSemaphoreObtain(sdio.sem, WAITING_FOREVER) == EOK) {
|
||||
while(KSemaphoreObtain(sdio.sem, TICK_PER_SECOND) != -ETIMEOUT);
|
||||
read_param->size = sdio.MsgLen;
|
||||
read_param->size = sdio.msg_len;
|
||||
BusDevReadData(sdio.dev, read_param);
|
||||
sdio.MsgLen = 0;
|
||||
sdio.msg_len = 0;
|
||||
}
|
||||
|
||||
return read_param->read_length;
|
||||
|
|
|
@ -23,29 +23,29 @@
|
|||
#include <gpiohs.h>
|
||||
#include <sleep.h>
|
||||
|
||||
static uint8 offsetadd[] = {0x00,0x10,0x20,0x30,0x08,0x18,0x28,0x38,}; /* Offset address of serial port number */
|
||||
static uint8 Interruptnum[8] = {0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,};
|
||||
static uint8 offset_addr[] = {0x00,0x10,0x20,0x30,0x08,0x18,0x28,0x38,}; /* Offset address of serial port number */
|
||||
static uint8 interrupt_num[8] = {0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,};
|
||||
|
||||
static BusType ch438_pin;
|
||||
static int Ch438Sem = NONE;
|
||||
static int ch438_sem = NONE;
|
||||
|
||||
static plic_irq_callback_t Ch438Irq(void *parameter)
|
||||
{
|
||||
KSemaphoreAbandon(Ch438Sem);
|
||||
KSemaphoreAbandon(ch438_sem);
|
||||
}
|
||||
|
||||
static void CH438SetOutput(void)
|
||||
{
|
||||
struct PinParam PinCfg;
|
||||
struct PinParam pin_cfg;
|
||||
int ret = 0;
|
||||
|
||||
struct BusConfigureInfo configure_info;
|
||||
configure_info.configure_cmd = OPE_CFG;
|
||||
configure_info.private_data = (void *)&PinCfg;
|
||||
configure_info.private_data = (void *)&pin_cfg;
|
||||
|
||||
PinCfg.cmd = GPIO_CONFIG_MODE;
|
||||
PinCfg.pin = BSP_CH438_D0_PIN;
|
||||
PinCfg.mode = GPIO_CFG_OUTPUT;
|
||||
pin_cfg.cmd = GPIO_CONFIG_MODE;
|
||||
pin_cfg.pin = BSP_CH438_D0_PIN;
|
||||
pin_cfg.mode = GPIO_CFG_OUTPUT;
|
||||
|
||||
ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info);
|
||||
if (ret != EOK) {
|
||||
|
@ -53,49 +53,49 @@ static void CH438SetOutput(void)
|
|||
return ;
|
||||
}
|
||||
|
||||
PinCfg.pin = BSP_CH438_D1_PIN;
|
||||
pin_cfg.pin = BSP_CH438_D1_PIN;
|
||||
ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info);
|
||||
if (ret != EOK) {
|
||||
KPrintf("config CH438_D1_PIN pin %d failed!\n", BSP_CH438_D1_PIN);
|
||||
return ;
|
||||
}
|
||||
|
||||
PinCfg.pin = BSP_CH438_D2_PIN;
|
||||
pin_cfg.pin = BSP_CH438_D2_PIN;
|
||||
ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info);
|
||||
if (ret != EOK) {
|
||||
KPrintf("config CH438_D2_PIN pin %d failed!\n", BSP_CH438_D2_PIN);
|
||||
return ;
|
||||
}
|
||||
|
||||
PinCfg.pin = BSP_CH438_D3_PIN;
|
||||
pin_cfg.pin = BSP_CH438_D3_PIN;
|
||||
ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info);
|
||||
if (ret != EOK) {
|
||||
KPrintf("config CH438_D3_PIN pin %d failed!\n", BSP_CH438_D3_PIN);
|
||||
return ;
|
||||
}
|
||||
|
||||
PinCfg.pin = BSP_CH438_D4_PIN;
|
||||
pin_cfg.pin = BSP_CH438_D4_PIN;
|
||||
ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info);
|
||||
if (ret != EOK) {
|
||||
KPrintf("config CH438_D4_PIN pin %d failed!\n", BSP_CH438_D4_PIN);
|
||||
return ;
|
||||
}
|
||||
|
||||
PinCfg.pin = BSP_CH438_D5_PIN;
|
||||
pin_cfg.pin = BSP_CH438_D5_PIN;
|
||||
ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info);
|
||||
if (ret != EOK) {
|
||||
KPrintf("config CH438_D5_PIN pin %d failed!\n", BSP_CH438_D5_PIN);
|
||||
return ;
|
||||
}
|
||||
|
||||
PinCfg.pin = BSP_CH438_D6_PIN;
|
||||
pin_cfg.pin = BSP_CH438_D6_PIN;
|
||||
ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info);
|
||||
if (ret != EOK) {
|
||||
KPrintf("config CH438_D6_PIN pin %d failed!\n", BSP_CH438_D6_PIN);
|
||||
return ;
|
||||
}
|
||||
|
||||
PinCfg.pin = BSP_CH438_D7_PIN;
|
||||
pin_cfg.pin = BSP_CH438_D7_PIN;
|
||||
ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info);
|
||||
if (ret != EOK) {
|
||||
KPrintf("config CH438_D7_PIN pin %d failed!\n", BSP_CH438_D7_PIN);
|
||||
|
@ -105,65 +105,65 @@ static void CH438SetOutput(void)
|
|||
|
||||
static void CH438SetInput(void)
|
||||
{
|
||||
struct PinParam PinCfg;
|
||||
struct PinParam pin_cfg;
|
||||
int ret = 0;
|
||||
|
||||
struct BusConfigureInfo configure_info;
|
||||
configure_info.configure_cmd = OPE_CFG;
|
||||
configure_info.private_data = (void *)&PinCfg;
|
||||
configure_info.private_data = (void *)&pin_cfg;
|
||||
|
||||
PinCfg.cmd = GPIO_CONFIG_MODE;
|
||||
PinCfg.pin = BSP_CH438_D0_PIN;
|
||||
PinCfg.mode = GPIO_CFG_INPUT_PULLUP;
|
||||
pin_cfg.cmd = GPIO_CONFIG_MODE;
|
||||
pin_cfg.pin = BSP_CH438_D0_PIN;
|
||||
pin_cfg.mode = GPIO_CFG_INPUT_PULLUP;
|
||||
ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info);
|
||||
if (ret != EOK) {
|
||||
KPrintf("config CH438_D0_PIN pin %d INPUT_PULLUP failed!\n", BSP_CH438_D0_PIN);
|
||||
return ;
|
||||
}
|
||||
|
||||
PinCfg.pin = BSP_CH438_D1_PIN;
|
||||
pin_cfg.pin = BSP_CH438_D1_PIN;
|
||||
ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info);
|
||||
if (ret != EOK) {
|
||||
KPrintf("config CH438_D1_PIN pin %d INPUT_PULLUP failed!\n", BSP_CH438_D1_PIN);
|
||||
return ;
|
||||
}
|
||||
|
||||
PinCfg.pin = BSP_CH438_D2_PIN;
|
||||
pin_cfg.pin = BSP_CH438_D2_PIN;
|
||||
ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info);
|
||||
if (ret != EOK) {
|
||||
KPrintf("config CH438_D2_PIN pin %d INPUT_PULLUP failed!\n", BSP_CH438_D2_PIN);
|
||||
return ;
|
||||
}
|
||||
|
||||
PinCfg.pin = BSP_CH438_D3_PIN;
|
||||
pin_cfg.pin = BSP_CH438_D3_PIN;
|
||||
ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info);
|
||||
if (ret != EOK) {
|
||||
KPrintf("config CH438_D3_PIN pin %d INPUT_PULLUP failed!\n", BSP_CH438_D3_PIN);
|
||||
return ;
|
||||
}
|
||||
|
||||
PinCfg.pin = BSP_CH438_D4_PIN;
|
||||
pin_cfg.pin = BSP_CH438_D4_PIN;
|
||||
ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info);
|
||||
if (ret != EOK) {
|
||||
KPrintf("config CH438_D4_PIN pin %d INPUT_PULLUP failed!\n", BSP_CH438_D4_PIN);
|
||||
return ;
|
||||
}
|
||||
|
||||
PinCfg.pin = BSP_CH438_D5_PIN;
|
||||
pin_cfg.pin = BSP_CH438_D5_PIN;
|
||||
ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info);
|
||||
if (ret != EOK) {
|
||||
KPrintf("config CH438_D5_PIN pin %d INPUT_PULLUP failed!\n", BSP_CH438_D5_PIN);
|
||||
return ;
|
||||
}
|
||||
|
||||
PinCfg.pin = BSP_CH438_D6_PIN;
|
||||
pin_cfg.pin = BSP_CH438_D6_PIN;
|
||||
ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info);
|
||||
if (ret != EOK) {
|
||||
KPrintf("config CH438_D6_PIN pin %d INPUT_PULLUP failed!\n", BSP_CH438_D6_PIN);
|
||||
return ;
|
||||
}
|
||||
|
||||
PinCfg.pin = BSP_CH438_D7_PIN;
|
||||
pin_cfg.pin = BSP_CH438_D7_PIN;
|
||||
ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info);
|
||||
if (ret != EOK) {
|
||||
KPrintf("config CH438_D7_PIN pin %d INPUT_PULLUP failed!\n", BSP_CH438_D7_PIN);
|
||||
|
@ -586,8 +586,8 @@ void CH438UartSend( uint8 ext_uart_no,uint8 *Data, uint8 Num )
|
|||
{
|
||||
uint8 REG_LSR_ADDR,REG_THR_ADDR;
|
||||
|
||||
REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR;
|
||||
REG_THR_ADDR = offsetadd[ext_uart_no] | REG_THR0_ADDR;
|
||||
REG_LSR_ADDR = offset_addr[ext_uart_no] | REG_LSR0_ADDR;
|
||||
REG_THR_ADDR = offset_addr[ext_uart_no] | REG_THR0_ADDR;
|
||||
|
||||
while (1)
|
||||
{
|
||||
|
@ -612,8 +612,8 @@ uint8 CH438UARTRcv(uint8 ext_uart_no, uint8 *buf, x_size_t size )
|
|||
uint8 *read_buffer;
|
||||
x_size_t buffer_index = 0;
|
||||
|
||||
REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR;
|
||||
REG_RBR_ADDR = offsetadd[ext_uart_no] | REG_RBR0_ADDR;
|
||||
REG_LSR_ADDR = offset_addr[ext_uart_no] | REG_LSR0_ADDR;
|
||||
REG_RBR_ADDR = offset_addr[ext_uart_no] | REG_RBR0_ADDR;
|
||||
|
||||
read_buffer = buf;
|
||||
|
||||
|
@ -653,15 +653,15 @@ void CH438_PORT_INIT( uint8 ext_uart_no,uint32 BaudRate )
|
|||
uint8 REG_THR_ADDR;
|
||||
uint8 REG_IIR_ADDR;
|
||||
|
||||
REG_LCR_ADDR = offsetadd[ext_uart_no] | REG_LCR0_ADDR;
|
||||
REG_DLL_ADDR = offsetadd[ext_uart_no] | REG_DLL0_ADDR;
|
||||
REG_DLM_ADDR = offsetadd[ext_uart_no] | REG_DLM0_ADDR;
|
||||
REG_IER_ADDR = offsetadd[ext_uart_no] | REG_IER0_ADDR;
|
||||
REG_MCR_ADDR = offsetadd[ext_uart_no] | REG_MCR0_ADDR;
|
||||
REG_FCR_ADDR = offsetadd[ext_uart_no] | REG_FCR0_ADDR;
|
||||
REG_RBR_ADDR = offsetadd[ext_uart_no] | REG_RBR0_ADDR;
|
||||
REG_THR_ADDR = offsetadd[ext_uart_no] | REG_THR0_ADDR;
|
||||
REG_IIR_ADDR = offsetadd[ext_uart_no] | REG_IIR0_ADDR;
|
||||
REG_LCR_ADDR = offset_addr[ext_uart_no] | REG_LCR0_ADDR;
|
||||
REG_DLL_ADDR = offset_addr[ext_uart_no] | REG_DLL0_ADDR;
|
||||
REG_DLM_ADDR = offset_addr[ext_uart_no] | REG_DLM0_ADDR;
|
||||
REG_IER_ADDR = offset_addr[ext_uart_no] | REG_IER0_ADDR;
|
||||
REG_MCR_ADDR = offset_addr[ext_uart_no] | REG_MCR0_ADDR;
|
||||
REG_FCR_ADDR = offset_addr[ext_uart_no] | REG_FCR0_ADDR;
|
||||
REG_RBR_ADDR = offset_addr[ext_uart_no] | REG_RBR0_ADDR;
|
||||
REG_THR_ADDR = offset_addr[ext_uart_no] | REG_THR0_ADDR;
|
||||
REG_IIR_ADDR = offset_addr[ext_uart_no] | REG_IIR0_ADDR;
|
||||
|
||||
WriteCH438Data(REG_IER_ADDR, BIT_IER_RESET); /* Reset the serial port */
|
||||
MdelayKTask(50);
|
||||
|
@ -704,15 +704,15 @@ void CH438PortInitParityCheck(uint8 ext_uart_no,uint32 BaudRate)
|
|||
uint8 REG_THR_ADDR;
|
||||
uint8 REG_IIR_ADDR;
|
||||
|
||||
REG_LCR_ADDR = offsetadd[ext_uart_no] | REG_LCR0_ADDR;
|
||||
REG_DLL_ADDR = offsetadd[ext_uart_no] | REG_DLL0_ADDR;
|
||||
REG_DLM_ADDR = offsetadd[ext_uart_no] | REG_DLM0_ADDR;
|
||||
REG_IER_ADDR = offsetadd[ext_uart_no] | REG_IER0_ADDR;
|
||||
REG_MCR_ADDR = offsetadd[ext_uart_no] | REG_MCR0_ADDR;
|
||||
REG_FCR_ADDR = offsetadd[ext_uart_no] | REG_FCR0_ADDR;
|
||||
REG_RBR_ADDR = offsetadd[ext_uart_no] | REG_RBR0_ADDR;
|
||||
REG_THR_ADDR = offsetadd[ext_uart_no] | REG_THR0_ADDR;
|
||||
REG_IIR_ADDR = offsetadd[ext_uart_no] | REG_IIR0_ADDR;
|
||||
REG_LCR_ADDR = offset_addr[ext_uart_no] | REG_LCR0_ADDR;
|
||||
REG_DLL_ADDR = offset_addr[ext_uart_no] | REG_DLL0_ADDR;
|
||||
REG_DLM_ADDR = offset_addr[ext_uart_no] | REG_DLM0_ADDR;
|
||||
REG_IER_ADDR = offset_addr[ext_uart_no] | REG_IER0_ADDR;
|
||||
REG_MCR_ADDR = offset_addr[ext_uart_no] | REG_MCR0_ADDR;
|
||||
REG_FCR_ADDR = offset_addr[ext_uart_no] | REG_FCR0_ADDR;
|
||||
REG_RBR_ADDR = offset_addr[ext_uart_no] | REG_RBR0_ADDR;
|
||||
REG_THR_ADDR = offset_addr[ext_uart_no] | REG_THR0_ADDR;
|
||||
REG_IIR_ADDR = offset_addr[ext_uart_no] | REG_IIR0_ADDR;
|
||||
|
||||
WriteCH438Data(REG_IER_ADDR, BIT_IER_RESET);/* Reset the serial port */
|
||||
MdelayKTask(50);
|
||||
|
@ -755,15 +755,15 @@ void CH438_PORT_DISABLE(uint8 ext_uart_no, uint32 BaudRate)
|
|||
uint8 REG_THR_ADDR;
|
||||
uint8 REG_IIR_ADDR;
|
||||
|
||||
REG_LCR_ADDR = offsetadd[ext_uart_no] | REG_LCR0_ADDR;
|
||||
REG_DLL_ADDR = offsetadd[ext_uart_no] | REG_DLL0_ADDR;
|
||||
REG_DLM_ADDR = offsetadd[ext_uart_no] | REG_DLM0_ADDR;
|
||||
REG_IER_ADDR = offsetadd[ext_uart_no] | REG_IER0_ADDR;
|
||||
REG_MCR_ADDR = offsetadd[ext_uart_no] | REG_MCR0_ADDR;
|
||||
REG_FCR_ADDR = offsetadd[ext_uart_no] | REG_FCR0_ADDR;
|
||||
REG_RBR_ADDR = offsetadd[ext_uart_no] | REG_RBR0_ADDR;
|
||||
REG_THR_ADDR = offsetadd[ext_uart_no] | REG_THR0_ADDR;
|
||||
REG_IIR_ADDR = offsetadd[ext_uart_no] | REG_IIR0_ADDR;
|
||||
REG_LCR_ADDR = offset_addr[ext_uart_no] | REG_LCR0_ADDR;
|
||||
REG_DLL_ADDR = offset_addr[ext_uart_no] | REG_DLL0_ADDR;
|
||||
REG_DLM_ADDR = offset_addr[ext_uart_no] | REG_DLM0_ADDR;
|
||||
REG_IER_ADDR = offset_addr[ext_uart_no] | REG_IER0_ADDR;
|
||||
REG_MCR_ADDR = offset_addr[ext_uart_no] | REG_MCR0_ADDR;
|
||||
REG_FCR_ADDR = offset_addr[ext_uart_no] | REG_FCR0_ADDR;
|
||||
REG_RBR_ADDR = offset_addr[ext_uart_no] | REG_RBR0_ADDR;
|
||||
REG_THR_ADDR = offset_addr[ext_uart_no] | REG_THR0_ADDR;
|
||||
REG_IIR_ADDR = offset_addr[ext_uart_no] | REG_IIR0_ADDR;
|
||||
|
||||
WriteCH438Data(REG_IER_ADDR, BIT_IER_RESET); /* Reset the serial port */
|
||||
MdelayKTask(50);
|
||||
|
@ -806,15 +806,15 @@ void CH438_PORT6_INIT(uint8 ext_uart_no, uint32 BaudRate)
|
|||
uint8 REG_THR_ADDR;
|
||||
uint8 REG_IIR_ADDR;
|
||||
|
||||
REG_LCR_ADDR = offsetadd[ext_uart_no] | REG_LCR0_ADDR;
|
||||
REG_DLL_ADDR = offsetadd[ext_uart_no] | REG_DLL0_ADDR;
|
||||
REG_DLM_ADDR = offsetadd[ext_uart_no] | REG_DLM0_ADDR;
|
||||
REG_IER_ADDR = offsetadd[ext_uart_no] | REG_IER0_ADDR;
|
||||
REG_MCR_ADDR = offsetadd[ext_uart_no] | REG_MCR0_ADDR;
|
||||
REG_FCR_ADDR = offsetadd[ext_uart_no] | REG_FCR0_ADDR;
|
||||
REG_RBR_ADDR = offsetadd[ext_uart_no] | REG_RBR0_ADDR;
|
||||
REG_THR_ADDR = offsetadd[ext_uart_no] | REG_THR0_ADDR;
|
||||
REG_IIR_ADDR = offsetadd[ext_uart_no] | REG_IIR0_ADDR;
|
||||
REG_LCR_ADDR = offset_addr[ext_uart_no] | REG_LCR0_ADDR;
|
||||
REG_DLL_ADDR = offset_addr[ext_uart_no] | REG_DLL0_ADDR;
|
||||
REG_DLM_ADDR = offset_addr[ext_uart_no] | REG_DLM0_ADDR;
|
||||
REG_IER_ADDR = offset_addr[ext_uart_no] | REG_IER0_ADDR;
|
||||
REG_MCR_ADDR = offset_addr[ext_uart_no] | REG_MCR0_ADDR;
|
||||
REG_FCR_ADDR = offset_addr[ext_uart_no] | REG_FCR0_ADDR;
|
||||
REG_RBR_ADDR = offset_addr[ext_uart_no] | REG_RBR0_ADDR;
|
||||
REG_THR_ADDR = offset_addr[ext_uart_no] | REG_THR0_ADDR;
|
||||
REG_IIR_ADDR = offset_addr[ext_uart_no] | REG_IIR0_ADDR;
|
||||
|
||||
WriteCH438Data(REG_IER_ADDR, BIT_IER_RESET);/* Reset the serial port */
|
||||
MdelayKTask(50);
|
||||
|
@ -875,13 +875,13 @@ static uint32 Ch438Init(struct SerialDriver *serial_drv, struct SerialCfgParam *
|
|||
{
|
||||
NULL_PARAM_CHECK(serial_drv);
|
||||
|
||||
struct PinParam PinCfg;
|
||||
struct PinParam pin_cfg;
|
||||
struct PinStat pin_stat;
|
||||
int ret = 0;
|
||||
|
||||
struct BusConfigureInfo configure_info;
|
||||
configure_info.configure_cmd = OPE_CFG;
|
||||
configure_info.private_data = (void *)&PinCfg;
|
||||
configure_info.private_data = (void *)&pin_cfg;
|
||||
|
||||
struct BusBlockWriteParam write_param;
|
||||
write_param.buffer = (void *)&pin_stat;
|
||||
|
@ -891,9 +891,9 @@ static uint32 Ch438Init(struct SerialDriver *serial_drv, struct SerialCfgParam *
|
|||
CH438SetOutput();
|
||||
|
||||
/* config NWR pin as output*/
|
||||
PinCfg.cmd = GPIO_CONFIG_MODE;
|
||||
PinCfg.pin = BSP_CH438_NWR_PIN;
|
||||
PinCfg.mode = GPIO_CFG_OUTPUT;
|
||||
pin_cfg.cmd = GPIO_CONFIG_MODE;
|
||||
pin_cfg.pin = BSP_CH438_NWR_PIN;
|
||||
pin_cfg.mode = GPIO_CFG_OUTPUT;
|
||||
|
||||
ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info);
|
||||
if (ret != EOK) {
|
||||
|
@ -902,7 +902,7 @@ static uint32 Ch438Init(struct SerialDriver *serial_drv, struct SerialCfgParam *
|
|||
}
|
||||
|
||||
/* config NRD pin as output*/
|
||||
PinCfg.pin = BSP_CH438_NRD_PIN;
|
||||
pin_cfg.pin = BSP_CH438_NRD_PIN;
|
||||
ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info);
|
||||
if (ret != EOK) {
|
||||
KPrintf("config NRD pin %d failed!\n", BSP_CH438_NRD_PIN);
|
||||
|
@ -910,7 +910,7 @@ static uint32 Ch438Init(struct SerialDriver *serial_drv, struct SerialCfgParam *
|
|||
}
|
||||
|
||||
/* config ALE pin as output*/
|
||||
PinCfg.pin = BSP_CH438_ALE_PIN;
|
||||
pin_cfg.pin = BSP_CH438_ALE_PIN;
|
||||
ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info);
|
||||
if (ret != EOK) {
|
||||
KPrintf("config ALE pin %d failed!\n", BSP_CH438_ALE_PIN);
|
||||
|
@ -918,7 +918,7 @@ static uint32 Ch438Init(struct SerialDriver *serial_drv, struct SerialCfgParam *
|
|||
}
|
||||
|
||||
/* config ALE pin as output*/
|
||||
PinCfg.pin = BSP_485_dir;
|
||||
pin_cfg.pin = BSP_485_dir;
|
||||
ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info);
|
||||
if (ret != EOK) {
|
||||
KPrintf("config ALE pin %d failed!\n", BSP_485_dir);
|
||||
|
@ -926,8 +926,8 @@ static uint32 Ch438Init(struct SerialDriver *serial_drv, struct SerialCfgParam *
|
|||
}
|
||||
|
||||
/* config ALE pin as input pullup*/
|
||||
PinCfg.pin = BSP_CH438_INT_PIN;
|
||||
PinCfg.mode = GPIO_CFG_INPUT_PULLUP;
|
||||
pin_cfg.pin = BSP_CH438_INT_PIN;
|
||||
pin_cfg.mode = GPIO_CFG_INPUT_PULLUP;
|
||||
ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info);
|
||||
if (ret != EOK) {
|
||||
KPrintf("config INIT pin %d failed!\n", BSP_CH438_INT_PIN);
|
||||
|
@ -1012,7 +1012,7 @@ static uint32 Ch438ReadData(void *dev, struct BusBlockReadParam *read_param)
|
|||
struct SerialHardwareDevice *serial_dev = (struct SerialHardwareDevice *)dev;
|
||||
struct SerialDevParam *dev_param = (struct SerialDevParam *)serial_dev->haldev.private_data;
|
||||
|
||||
result = KSemaphoreObtain(Ch438Sem, WAITING_FOREVER);
|
||||
result = KSemaphoreObtain(ch438_sem, WAITING_FOREVER);
|
||||
if (EOK == result) {
|
||||
gInterruptStatus = ReadCH438Data(REG_SSR_ADDR);
|
||||
|
||||
|
@ -1027,18 +1027,18 @@ static uint32 Ch438ReadData(void *dev, struct BusBlockReadParam *read_param)
|
|||
dat = ReadCH438Data(REG_IIR0_ADDR);
|
||||
dat = dat;
|
||||
} else {
|
||||
if ( gInterruptStatus & Interruptnum[dev_param->ext_uart_no]) { /* Detect which serial port is interrupted */
|
||||
REG_LCR_ADDR = offsetadd[dev_param->ext_uart_no] | REG_LCR0_ADDR;
|
||||
REG_DLL_ADDR = offsetadd[dev_param->ext_uart_no] | REG_DLL0_ADDR;
|
||||
REG_DLM_ADDR = offsetadd[dev_param->ext_uart_no] | REG_DLM0_ADDR;
|
||||
REG_IER_ADDR = offsetadd[dev_param->ext_uart_no] | REG_IER0_ADDR;
|
||||
REG_MCR_ADDR = offsetadd[dev_param->ext_uart_no] | REG_MCR0_ADDR;
|
||||
REG_FCR_ADDR = offsetadd[dev_param->ext_uart_no] | REG_FCR0_ADDR;
|
||||
REG_RBR_ADDR = offsetadd[dev_param->ext_uart_no] | REG_RBR0_ADDR;
|
||||
REG_THR_ADDR = offsetadd[dev_param->ext_uart_no] | REG_THR0_ADDR;
|
||||
REG_IIR_ADDR = offsetadd[dev_param->ext_uart_no] | REG_IIR0_ADDR;
|
||||
REG_LSR_ADDR = offsetadd[dev_param->ext_uart_no] | REG_LSR0_ADDR;
|
||||
REG_MSR_ADDR = offsetadd[dev_param->ext_uart_no] | REG_MSR0_ADDR;
|
||||
if ( gInterruptStatus & interrupt_num[dev_param->ext_uart_no]) { /* Detect which serial port is interrupted */
|
||||
REG_LCR_ADDR = offset_addr[dev_param->ext_uart_no] | REG_LCR0_ADDR;
|
||||
REG_DLL_ADDR = offset_addr[dev_param->ext_uart_no] | REG_DLL0_ADDR;
|
||||
REG_DLM_ADDR = offset_addr[dev_param->ext_uart_no] | REG_DLM0_ADDR;
|
||||
REG_IER_ADDR = offset_addr[dev_param->ext_uart_no] | REG_IER0_ADDR;
|
||||
REG_MCR_ADDR = offset_addr[dev_param->ext_uart_no] | REG_MCR0_ADDR;
|
||||
REG_FCR_ADDR = offset_addr[dev_param->ext_uart_no] | REG_FCR0_ADDR;
|
||||
REG_RBR_ADDR = offset_addr[dev_param->ext_uart_no] | REG_RBR0_ADDR;
|
||||
REG_THR_ADDR = offset_addr[dev_param->ext_uart_no] | REG_THR0_ADDR;
|
||||
REG_IIR_ADDR = offset_addr[dev_param->ext_uart_no] | REG_IIR0_ADDR;
|
||||
REG_LSR_ADDR = offset_addr[dev_param->ext_uart_no] | REG_LSR0_ADDR;
|
||||
REG_MSR_ADDR = offset_addr[dev_param->ext_uart_no] | REG_MSR0_ADDR;
|
||||
|
||||
/* The interrupted state of a read serial port */
|
||||
InterruptStatus = ReadCH438Data(REG_IIR_ADDR) & 0x0f;
|
||||
|
@ -1079,45 +1079,45 @@ static const struct SerialDevDone dev_done =
|
|||
|
||||
static void Ch438InitDefault(struct SerialDriver *serial_drv)
|
||||
{
|
||||
struct PinParam PinCfg;
|
||||
struct PinParam pin_cfg;
|
||||
BusType ch438_pin;
|
||||
|
||||
struct BusConfigureInfo configure_info;
|
||||
|
||||
int ret = 0;
|
||||
configure_info.configure_cmd = OPE_CFG;
|
||||
configure_info.private_data = (void *)&PinCfg;
|
||||
configure_info.private_data = (void *)&pin_cfg;
|
||||
|
||||
Ch438Sem = KSemaphoreCreate(0);
|
||||
if (Ch438Sem < 0) {
|
||||
ch438_sem = KSemaphoreCreate(0);
|
||||
if (ch438_sem < 0) {
|
||||
KPrintf("Ch438InitDefault create sem failed .\n");
|
||||
return ;
|
||||
}
|
||||
|
||||
ch438_pin = PinBusInitGet();
|
||||
|
||||
PinCfg.cmd = GPIO_CONFIG_MODE;
|
||||
PinCfg.pin = BSP_CH438_INT_PIN;
|
||||
PinCfg.mode = GPIO_CFG_INPUT_PULLUP;
|
||||
pin_cfg.cmd = GPIO_CONFIG_MODE;
|
||||
pin_cfg.pin = BSP_CH438_INT_PIN;
|
||||
pin_cfg.mode = GPIO_CFG_INPUT_PULLUP;
|
||||
ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info);
|
||||
if (ret != EOK) {
|
||||
KPrintf("config BSP_CH438_INT_PIN pin %d failed!\n", BSP_CH438_INT_PIN);
|
||||
return;
|
||||
}
|
||||
|
||||
PinCfg.cmd = GPIO_IRQ_REGISTER;
|
||||
PinCfg.pin = BSP_CH438_INT_PIN;
|
||||
PinCfg.irq_set.irq_mode = GPIO_IRQ_EDGE_FALLING;
|
||||
PinCfg.irq_set.hdr = (void *)Ch438Irq;
|
||||
PinCfg.irq_set.args = NONE;
|
||||
pin_cfg.cmd = GPIO_IRQ_REGISTER;
|
||||
pin_cfg.pin = BSP_CH438_INT_PIN;
|
||||
pin_cfg.irq_set.irq_mode = GPIO_IRQ_EDGE_FALLING;
|
||||
pin_cfg.irq_set.hdr = (void *)Ch438Irq;
|
||||
pin_cfg.irq_set.args = NONE;
|
||||
ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info);
|
||||
if (ret != EOK) {
|
||||
KPrintf("config BSP_CH438_INT_PIN %d failed!\n", BSP_CH438_INT_PIN);
|
||||
return;
|
||||
}
|
||||
|
||||
PinCfg.cmd = GPIO_IRQ_ENABLE;
|
||||
PinCfg.pin = BSP_CH438_INT_PIN;
|
||||
pin_cfg.cmd = GPIO_IRQ_ENABLE;
|
||||
pin_cfg.pin = BSP_CH438_INT_PIN;
|
||||
ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info);
|
||||
if (ret != EOK) {
|
||||
KPrintf("config BSP_CH438_INT_PIN %d failed!\n", BSP_CH438_INT_PIN);
|
||||
|
|
|
@ -26,7 +26,7 @@
|
|||
struct HwCh376
|
||||
{
|
||||
HardwareDevType dev;
|
||||
x_size_t MsgLen;
|
||||
x_size_t msg_len;
|
||||
int sem;
|
||||
KTaskDescriptorType task;
|
||||
};
|
||||
|
|
|
@ -43,13 +43,10 @@ Modification:
|
|||
#include "connect_touch.h"
|
||||
#endif
|
||||
|
||||
void drv_lcd_clear(uint16_t color);
|
||||
void LCD_DrawLine(uint16 x1, uint16 y1, uint16 x2, uint16 y2,uint16 color);
|
||||
void LCD_DrawRectangle(uint16 x1, uint16 y1, uint16 x2, uint16 y2,uint16 color);
|
||||
void LCD_Draw_Circle(uint16 x0,uint16 y0,uint8 r,uint16 color);
|
||||
void DrvLcdClear(uint16_t color);
|
||||
void LcdDrawLine(uint16 x1, uint16 y1, uint16 x2, uint16 y2,uint16 color);
|
||||
void LcdDrawRectangle(uint16 x1, uint16 y1, uint16 x2, uint16 y2,uint16 color);
|
||||
void LcdDrawCircle(uint16 x0,uint16 y0,uint8 r,uint16 color);
|
||||
|
||||
void LCD_ShowChar(uint16 x,uint16 y,uint8 num,uint8 size,uint16 color,uint16 back_color);
|
||||
void LCD_ShowString(uint16 x,uint16 y,uint16 width,uint16 height,uint8 size,uint8 *p,uint16 color,uint16 back_color);
|
||||
void Clear_handwriting (void);
|
||||
int HwLcdInit(void);
|
||||
#endif
|
||||
|
|
|
@ -35,7 +35,6 @@
|
|||
#define TP_PRES_DOWN 0x80
|
||||
#define TP_CATH_PRES 0x40
|
||||
|
||||
|
||||
//touch screen control struct
|
||||
typedef struct
|
||||
{
|
||||
|
@ -52,7 +51,8 @@ typedef struct
|
|||
extern touch_device_info tp_dev;
|
||||
|
||||
//save data struct
|
||||
typedef struct {
|
||||
typedef struct
|
||||
{
|
||||
int ty_xfac;
|
||||
int ty_yfac;
|
||||
short x_pos;
|
||||
|
|
|
@ -135,7 +135,7 @@ typedef enum _lcd_dir
|
|||
#define LCD_SPI_CHANNEL SPI_DEVICE_0
|
||||
#define LCD_SPI_CHIP_SELECT SPI_CHIP_SELECT_0
|
||||
|
||||
typedef struct lcd_8080_device
|
||||
typedef struct Lcd8080Device
|
||||
{
|
||||
struct LcdBus lcd_bus;
|
||||
struct DeviceLcdInfo lcd_info;
|
||||
|
@ -143,11 +143,11 @@ typedef struct lcd_8080_device
|
|||
int cs;
|
||||
int dc_pin;
|
||||
int dma_channel;
|
||||
} * lcd_8080_device_t;
|
||||
} * Lcd8080DeviceType;
|
||||
|
||||
lcd_8080_device_t lcd ;
|
||||
Lcd8080DeviceType lcd ;
|
||||
|
||||
static void drv_lcd_cmd(uint8 cmd)
|
||||
static void DrvLcdCmd(uint8 cmd)
|
||||
{
|
||||
gpiohs_set_pin(lcd->dc_pin, GPIO_PV_LOW);
|
||||
spi_init(lcd->spi_channel, SPI_WORK_MODE_0, SPI_FF_OCTAL, 8, 0);
|
||||
|
@ -156,7 +156,7 @@ static void drv_lcd_cmd(uint8 cmd)
|
|||
spi_send_data_normal_dma(lcd->dma_channel, lcd->spi_channel, lcd->cs, &cmd, 1, SPI_TRANS_CHAR);
|
||||
}
|
||||
|
||||
static void drv_lcd_data_byte(uint8 *data_buf, uint32 length)
|
||||
static void DrvLcdDataByte(uint8 *data_buf, uint32 length)
|
||||
{
|
||||
gpiohs_set_pin(lcd->dc_pin, GPIO_PV_HIGH);
|
||||
spi_init(lcd->spi_channel, SPI_WORK_MODE_0, SPI_FF_OCTAL, 8, 0);
|
||||
|
@ -165,7 +165,7 @@ static void drv_lcd_data_byte(uint8 *data_buf, uint32 length)
|
|||
spi_send_data_normal_dma(lcd->dma_channel, lcd->spi_channel, lcd->cs, data_buf, length, SPI_TRANS_CHAR);
|
||||
}
|
||||
|
||||
static void drv_lcd_data_half_word(uint16 *data_buf, uint32 length)
|
||||
static void DrvLcdDataHalfWord(uint16 *data_buf, uint32 length)
|
||||
{
|
||||
gpiohs_set_pin(lcd->dc_pin, GPIO_PV_HIGH);
|
||||
spi_init(lcd->spi_channel, SPI_WORK_MODE_0, SPI_FF_OCTAL, 16, 0);
|
||||
|
@ -174,7 +174,7 @@ static void drv_lcd_data_half_word(uint16 *data_buf, uint32 length)
|
|||
spi_send_data_normal_dma(lcd->dma_channel, lcd->spi_channel, lcd->cs, data_buf, length, SPI_TRANS_SHORT);
|
||||
}
|
||||
|
||||
static void drv_lcd_data_word(uint32 *data_buf, uint32 length)
|
||||
static void DrvLcdDataWord(uint32 *data_buf, uint32 length)
|
||||
{
|
||||
gpiohs_set_pin(lcd->dc_pin, GPIO_PV_HIGH);
|
||||
/*spi num Polarity and phase mode Multi-line mode Data bit width little endian */
|
||||
|
@ -187,7 +187,7 @@ static void drv_lcd_data_word(uint32 *data_buf, uint32 length)
|
|||
spi_send_data_normal_dma(lcd->dma_channel, lcd->spi_channel, lcd->cs, data_buf, length, SPI_TRANS_INT);
|
||||
}
|
||||
|
||||
static void drv_lcd_hw_init(lcd_8080_device_t lcd)
|
||||
static void DrvLcdHwInit(Lcd8080DeviceType lcd)
|
||||
{
|
||||
gpiohs_set_drive_mode(lcd->dc_pin, GPIO_DM_OUTPUT);
|
||||
gpiohs_set_pin(lcd->dc_pin, GPIO_PV_HIGH);
|
||||
|
@ -195,27 +195,24 @@ static void drv_lcd_hw_init(lcd_8080_device_t lcd)
|
|||
spi_set_clk_rate(lcd->spi_channel, 25000000);
|
||||
}
|
||||
|
||||
static void drv_lcd_set_direction(lcd_dir_t dir)
|
||||
static void DrvLcdSetDirection(lcd_dir_t dir)
|
||||
{
|
||||
#if !BOARD_LICHEEDAN
|
||||
dir |= 0x08;
|
||||
#endif
|
||||
if (dir & DIR_XY_MASK)
|
||||
{
|
||||
if (dir & DIR_XY_MASK) {
|
||||
lcd->lcd_info.width = 320;
|
||||
lcd->lcd_info.height = 240;
|
||||
}
|
||||
else
|
||||
{
|
||||
} else {
|
||||
lcd->lcd_info.width = 240;
|
||||
lcd->lcd_info.height = 320;
|
||||
}
|
||||
|
||||
drv_lcd_cmd(MEMORY_ACCESS_CTL);
|
||||
drv_lcd_data_byte((uint8 *)&dir, 1);
|
||||
DrvLcdCmd(MEMORY_ACCESS_CTL);
|
||||
DrvLcdDataByte((uint8 *)&dir, 1);
|
||||
}
|
||||
|
||||
static void drv_lcd_set_area(uint16 x1, uint16 y1, uint16 x2, uint16 y2)
|
||||
static void DrvLcdSetArea(uint16 x1, uint16 y1, uint16 x2, uint16 y2)
|
||||
{
|
||||
uint8 data[4] = {0};
|
||||
|
||||
|
@ -223,23 +220,23 @@ static void drv_lcd_set_area(uint16 x1, uint16 y1, uint16 x2, uint16 y2)
|
|||
data[1] = (uint8)(x1);
|
||||
data[2] = (uint8)(x2 >> 8);
|
||||
data[3] = (uint8)(x2);
|
||||
drv_lcd_cmd(HORIZONTAL_ADDRESS_SET);
|
||||
drv_lcd_data_byte(data, 4);
|
||||
DrvLcdCmd(HORIZONTAL_ADDRESS_SET);
|
||||
DrvLcdDataByte(data, 4);
|
||||
|
||||
data[0] = (uint8)(y1 >> 8);
|
||||
data[1] = (uint8)(y1);
|
||||
data[2] = (uint8)(y2 >> 8);
|
||||
data[3] = (uint8)(y2);
|
||||
drv_lcd_cmd(VERTICAL_ADDRESS_SET);
|
||||
drv_lcd_data_byte(data, 4);
|
||||
DrvLcdCmd(VERTICAL_ADDRESS_SET);
|
||||
DrvLcdDataByte(data, 4);
|
||||
|
||||
drv_lcd_cmd(MEMORY_WRITE);
|
||||
DrvLcdCmd(MEMORY_WRITE);
|
||||
}
|
||||
|
||||
static void drv_lcd_set_pixel(uint16_t x, uint16_t y, uint16_t color)
|
||||
static void DrvLcdSetPixel(uint16_t x, uint16_t y, uint16_t color)
|
||||
{
|
||||
drv_lcd_set_area(x, y, x, y);
|
||||
drv_lcd_data_half_word(&color, 1);
|
||||
DrvLcdSetArea(x, y, x, y);
|
||||
DrvLcdDataHalfWord(&color, 1);
|
||||
}
|
||||
|
||||
void LcdShowChar(uint16 x,uint16 y,uint8 num,uint8 size,uint16 color,uint16 back_color)
|
||||
|
@ -248,31 +245,33 @@ void LcdShowChar(uint16 x,uint16 y,uint8 num,uint8 size,uint16 color,uint16 back
|
|||
uint16 y0=y;
|
||||
uint8 csize=(size/8+((size%8)?1:0))*(size/2);
|
||||
num=num-' ';
|
||||
for(t=0;t<csize;t++)
|
||||
{
|
||||
if(size==12)temp=asc2_1206[num][t]; //1206
|
||||
else if(size==16)temp=asc2_1608[num][t]; //1608
|
||||
else if(size==24)temp=asc2_2412[num][t]; //2412
|
||||
else if(size==32)temp=asc2_3216[num][t]; //3216
|
||||
else return;
|
||||
for(t1=0;t1<8;t1++)
|
||||
{
|
||||
if(temp&0x80)
|
||||
drv_lcd_set_pixel(x,y,color);
|
||||
for (t = 0;t < csize;t ++) {
|
||||
if (size==12)
|
||||
temp=asc2_1206[num][t]; //1206
|
||||
else if (size==16)
|
||||
temp=asc2_1608[num][t]; //1608
|
||||
else if (size==24)
|
||||
temp=asc2_2412[num][t]; //2412
|
||||
else if (size==32)
|
||||
temp=asc2_3216[num][t]; //3216
|
||||
else
|
||||
{
|
||||
drv_lcd_set_pixel(x,y,back_color);
|
||||
}
|
||||
return;
|
||||
|
||||
for(t1 = 0;t1 < 8;t1 ++) {
|
||||
if (temp&0x80)
|
||||
DrvLcdSetPixel(x,y,color);
|
||||
else
|
||||
DrvLcdSetPixel(x,y,back_color);
|
||||
|
||||
temp<<=1;
|
||||
y++;
|
||||
if(y>=lcd->lcd_info.height)return;
|
||||
if((y-y0)==size)
|
||||
{
|
||||
if(y>=lcd->lcd_info.height)
|
||||
return;
|
||||
if ((y-y0) == size) {
|
||||
y=y0;
|
||||
x++;
|
||||
if(x>=lcd->lcd_info.width)return;
|
||||
if(x>=lcd->lcd_info.width)
|
||||
return;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -284,10 +283,13 @@ void LcdShowString(uint16_t x,uint16_t y,uint16_t width,uint16_t height,uint8 si
|
|||
uint16_t x0 = x;
|
||||
width += x;
|
||||
height += y;
|
||||
while((*p<='~')&&(*p>=' '))
|
||||
{
|
||||
if(x>=width){x=x0;y+=size;}
|
||||
if(y>=height)break;
|
||||
while ((*p<='~')&&(*p>=' ')) {
|
||||
if (x>=width) {
|
||||
x=x0;
|
||||
y+=size;
|
||||
}
|
||||
if(y>=height)
|
||||
break;
|
||||
LcdShowChar(x,y,*p,size,color,back_color);
|
||||
x += size/2;
|
||||
p++;
|
||||
|
@ -299,11 +301,11 @@ void LcdShowString(uint16_t x,uint16_t y,uint16_t width,uint16_t height,uint8 si
|
|||
* para color
|
||||
* return none
|
||||
*/
|
||||
void drv_lcd_clear(uint16 color)
|
||||
void DrvLcdClear(uint16 color)
|
||||
{
|
||||
uint32 data = ((uint32)color << 16) | (uint32)color;
|
||||
|
||||
drv_lcd_set_area(0, 0, lcd->lcd_info.width - 1, lcd->lcd_info.height - 1);
|
||||
DrvLcdSetArea(0, 0, lcd->lcd_info.width - 1, lcd->lcd_info.height - 1);
|
||||
gpiohs_set_pin(lcd->dc_pin, GPIO_PV_HIGH);
|
||||
spi_init(lcd->spi_channel, SPI_WORK_MODE_0, SPI_FF_OCTAL, 32, 0);
|
||||
spi_init_non_standard(lcd->spi_channel,
|
||||
|
@ -314,69 +316,63 @@ void drv_lcd_clear(uint16 color)
|
|||
spi_fill_data_dma(lcd->dma_channel, lcd->spi_channel, lcd->cs, (const uint32_t *)&data, lcd->lcd_info.width * lcd->lcd_info.height / 2);
|
||||
}
|
||||
|
||||
static void drv_lcd_rect_update(uint16_t x1, uint16_t y1, uint16_t width, uint16_t height)
|
||||
static void DrvLcdRectUpdate(uint16_t x1, uint16_t y1, uint16_t width, uint16_t height)
|
||||
{
|
||||
static uint16 * rect_buffer = NONE;
|
||||
if(!rect_buffer)
|
||||
{
|
||||
if (!rect_buffer) {
|
||||
rect_buffer = x_malloc(lcd->lcd_info.height * lcd->lcd_info.width * (lcd->lcd_info.bits_per_pixel / 8));
|
||||
if(!rect_buffer)
|
||||
{
|
||||
if (!rect_buffer) {
|
||||
return;
|
||||
}
|
||||
}
|
||||
if(x1 == 0 && y1 == 0 && width == lcd->lcd_info.width && height == lcd->lcd_info.height)
|
||||
{
|
||||
drv_lcd_set_area(x1, y1, x1 + width - 1, y1 + height - 1);
|
||||
drv_lcd_data_word((uint32 *)lcd->lcd_info.framebuffer, width * height / (lcd->lcd_info.bits_per_pixel / 8));
|
||||
}
|
||||
else
|
||||
{
|
||||
drv_lcd_set_area(x1, y1, x1 + width - 1, y1 + height - 1);
|
||||
drv_lcd_data_word((uint32 *)rect_buffer, width * height / 2);
|
||||
if (x1 == 0 && y1 == 0 && width == lcd->lcd_info.width && height == lcd->lcd_info.height) {
|
||||
DrvLcdSetArea(x1, y1, x1 + width - 1, y1 + height - 1);
|
||||
DrvLcdDataWord((uint32 *)lcd->lcd_info.framebuffer, width * height / (lcd->lcd_info.bits_per_pixel / 8));
|
||||
} else {
|
||||
DrvLcdSetArea(x1, y1, x1 + width - 1, y1 + height - 1);
|
||||
DrvLcdDataWord((uint32 *)rect_buffer, width * height / 2);
|
||||
}
|
||||
}
|
||||
|
||||
x_err_t drv_lcd_init(lcd_8080_device_t dev)
|
||||
x_err_t DrvLcdInit(Lcd8080DeviceType dev)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
lcd = (lcd_8080_device_t)dev;
|
||||
lcd = (Lcd8080DeviceType)dev;
|
||||
uint8 data = 0;
|
||||
|
||||
if(!lcd)
|
||||
{
|
||||
if (!lcd) {
|
||||
return ERROR;
|
||||
}
|
||||
drv_lcd_hw_init(lcd);
|
||||
DrvLcdHwInit(lcd);
|
||||
/* reset LCD */
|
||||
drv_lcd_cmd(SOFTWARE_RESET);
|
||||
DrvLcdCmd(SOFTWARE_RESET);
|
||||
MdelayKTask(100);
|
||||
|
||||
/* Enter normal status */
|
||||
drv_lcd_cmd(SLEEP_OFF);
|
||||
DrvLcdCmd(SLEEP_OFF);
|
||||
MdelayKTask(100);
|
||||
|
||||
/* pixel format rgb565 */
|
||||
drv_lcd_cmd(PIXEL_FORMAT_SET);
|
||||
DrvLcdCmd(PIXEL_FORMAT_SET);
|
||||
data = 0x55;
|
||||
drv_lcd_data_byte(&data, 1);
|
||||
DrvLcdDataByte(&data, 1);
|
||||
|
||||
/* set direction */
|
||||
drv_lcd_set_direction(DIR_YX_RLUD);
|
||||
DrvLcdSetDirection(DIR_YX_RLUD);
|
||||
|
||||
lcd->lcd_info.framebuffer = x_malloc(lcd->lcd_info.height * lcd->lcd_info.width * (lcd->lcd_info.bits_per_pixel / 8));
|
||||
CHECK(lcd->lcd_info.framebuffer);
|
||||
|
||||
/*display on*/
|
||||
drv_lcd_cmd(DISPALY_ON);
|
||||
DrvLcdCmd(DISPALY_ON);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static x_err_t drv_lcd_control(lcd_8080_device_t dev, int cmd, void *args)
|
||||
static x_err_t drv_lcd_control(Lcd8080DeviceType dev, int cmd, void *args)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
lcd_8080_device_t lcd = (lcd_8080_device_t)dev;
|
||||
Lcd8080DeviceType lcd = (Lcd8080DeviceType)dev;
|
||||
x_base level;
|
||||
struct DeviceRectInfo* rect_info = (struct DeviceRectInfo*)args;
|
||||
|
||||
|
@ -390,7 +386,7 @@ static x_err_t drv_lcd_control(lcd_8080_device_t dev, int cmd, void *args)
|
|||
SYS_ERR("GRAPHIC_CTRL_RECT_UPDATE error args");
|
||||
return -ERROR;
|
||||
}
|
||||
drv_lcd_rect_update(rect_info->x, rect_info->y, rect_info->width, rect_info->height);
|
||||
DrvLcdRectUpdate(rect_info->x, rect_info->y, rect_info->width, rect_info->height);
|
||||
break;
|
||||
|
||||
case GRAPHIC_CTRL_POWERON:
|
||||
|
@ -424,7 +420,7 @@ static x_err_t drv_lcd_control(lcd_8080_device_t dev, int cmd, void *args)
|
|||
void ClearHandwriting (void)
|
||||
{
|
||||
//clear the lcd
|
||||
drv_lcd_clear(WHITE);
|
||||
DrvLcdClear(WHITE);
|
||||
|
||||
LcdShowString(10, 10, 100, 24, 24, "RST ", RED, WHITE);
|
||||
}
|
||||
|
@ -433,7 +429,7 @@ void ClearHandwriting (void)
|
|||
void HandTest(unsigned short *x_pos, unsigned short *y_pos)
|
||||
{
|
||||
float x1,y1;
|
||||
TP_Read_XY(x_pos,y_pos); //address
|
||||
TpReadXy(x_pos,y_pos); //address
|
||||
float a = 12.1875,b = 16.25;
|
||||
x1 = 320 - (*x_pos)/a +10;
|
||||
y1 = (* y_pos)/b;
|
||||
|
@ -441,23 +437,23 @@ void HandTest(unsigned short *x_pos, unsigned short *y_pos)
|
|||
if ((*x_pos> 500)&&(*y_pos<500)) {
|
||||
ClearHandwriting();
|
||||
} else {
|
||||
drv_lcd_set_pixel(x1, y1, RED);
|
||||
drv_lcd_set_pixel(x1+1, y1, RED);
|
||||
drv_lcd_set_pixel(x1-1, y1, RED);
|
||||
DrvLcdSetPixel(x1, y1, RED);
|
||||
DrvLcdSetPixel(x1+1, y1, RED);
|
||||
DrvLcdSetPixel(x1-1, y1, RED);
|
||||
|
||||
drv_lcd_set_pixel(x1, y1+1, RED);
|
||||
drv_lcd_set_pixel(x1, y1-1, RED);
|
||||
DrvLcdSetPixel(x1, y1+1, RED);
|
||||
DrvLcdSetPixel(x1, y1-1, RED);
|
||||
|
||||
drv_lcd_set_pixel(x1+1, y1+1, RED);
|
||||
drv_lcd_set_pixel(x1-1, y1-1, RED);
|
||||
DrvLcdSetPixel(x1+1, y1+1, RED);
|
||||
DrvLcdSetPixel(x1-1, y1-1, RED);
|
||||
|
||||
drv_lcd_set_pixel(x1+1, y1-1, RED);
|
||||
drv_lcd_set_pixel(x1-1, y1+1, RED);
|
||||
DrvLcdSetPixel(x1+1, y1-1, RED);
|
||||
DrvLcdSetPixel(x1-1, y1+1, RED);
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
static uint32 Lcd_Write(void *dev, struct BusBlockWriteParam *write_param)
|
||||
|
||||
static uint32 LcdWrite(void *dev, struct BusBlockWriteParam *write_param)
|
||||
{
|
||||
if (write_param == NONE) {
|
||||
return ERROR;
|
||||
|
@ -469,18 +465,18 @@ static uint32 Lcd_Write(void *dev, struct BusBlockWriteParam *write_param)
|
|||
LcdShowString(show->x_pos,show->y_pos,show->width,show->height,show->font_size,show->addr,show->font_color,show->back_color);
|
||||
return EOK;
|
||||
} else if (1==write_param->pos) { //output dot
|
||||
drv_lcd_set_pixel(show->x_pos, show->y_pos, show->font_color);
|
||||
DrvLcdSetPixel(show->x_pos, show->y_pos, show->font_color);
|
||||
return EOK;
|
||||
} else {
|
||||
return ERROR;
|
||||
}
|
||||
}
|
||||
|
||||
uint32 drv_lcd_clear_done(void * dev, struct BusConfigureInfo *configure_info)
|
||||
uint32 DrvLcdClearDone(void * dev, struct BusConfigureInfo *configure_info)
|
||||
{
|
||||
uint16 color = 0;
|
||||
color =(uint16)(configure_info->configure_cmd |0x0000ffff );
|
||||
drv_lcd_clear( color);
|
||||
DrvLcdClear( color);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -488,7 +484,7 @@ const struct LcdDevDone lcd_dev_done =
|
|||
{
|
||||
.open = NONE,
|
||||
.close = NONE,
|
||||
.write = Lcd_Write,
|
||||
.write = LcdWrite,
|
||||
.read = NONE
|
||||
};
|
||||
|
||||
|
@ -503,7 +499,7 @@ static int BoardLcdBusInit(struct LcdBus * lcd_bus, struct LcdDriver * lcd_drive
|
|||
return ERROR;
|
||||
}
|
||||
|
||||
lcd_driver->configure = drv_lcd_clear_done;
|
||||
lcd_driver->configure = DrvLcdClearDone;
|
||||
/*Init the lcd driver*/
|
||||
ret = LcdDriverInit( lcd_driver, LCD_DRV_NAME_1);
|
||||
if (EOK != ret) {
|
||||
|
@ -553,8 +549,8 @@ int HwLcdInit(void)
|
|||
static struct LcdDriver lcd_driver;
|
||||
memset(&lcd_driver, 0, sizeof(struct LcdDriver));
|
||||
|
||||
lcd_8080_device_t lcd_dev = (lcd_8080_device_t )malloc(sizeof( struct lcd_8080_device));
|
||||
memset(lcd_dev, 0, sizeof(struct lcd_8080_device));
|
||||
Lcd8080DeviceType lcd_dev = (Lcd8080DeviceType )malloc(sizeof( struct Lcd8080Device));
|
||||
memset(lcd_dev, 0, sizeof(struct Lcd8080Device));
|
||||
|
||||
if (!lcd_dev) {
|
||||
return -1;
|
||||
|
@ -591,14 +587,14 @@ int HwLcdInit(void)
|
|||
gpiohs_set_drive_mode(10, GPIO_DM_OUTPUT);
|
||||
gpiohs_set_pin(10, GPIO_PV_HIGH);
|
||||
KPrintf("LCD driver inited ...\r\n");
|
||||
drv_lcd_init(lcd_dev);
|
||||
DrvLcdInit(lcd_dev);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
//x1,y1:start
|
||||
//x2,y2:end
|
||||
void LCD_DrawLine(uint16 x1, uint16 y1, uint16 x2, uint16 y2,uint16 color)
|
||||
void LcdDrawLine(uint16 x1, uint16 y1, uint16 x2, uint16 y2,uint16 color)
|
||||
{
|
||||
uint16 t;
|
||||
int xerr = 0, yerr = 0, delta_x, delta_y, distance;
|
||||
|
@ -608,63 +604,73 @@ void LCD_DrawLine(uint16 x1, uint16 y1, uint16 x2, uint16 y2,uint16 color)
|
|||
uRow = x1;
|
||||
uCol = y1;
|
||||
|
||||
if(delta_x>0)incx=1;
|
||||
else if(delta_x==0)incx=0;
|
||||
else {incx=-1;delta_x=-delta_x;}
|
||||
if(delta_x>0)
|
||||
incx = 1;
|
||||
else if(delta_x==0)
|
||||
incx = 0;
|
||||
else {
|
||||
incx = -1;
|
||||
delta_x = -delta_x;
|
||||
}
|
||||
|
||||
if(delta_y>0)incy=1;
|
||||
else if(delta_y==0)incy=0;
|
||||
else{incy=-1;delta_y=-delta_y;}
|
||||
if(delta_y>0)
|
||||
incy = 1;
|
||||
else if(delta_y==0)
|
||||
incy = 0;
|
||||
else {
|
||||
incy= -1;
|
||||
delta_y = -delta_y;
|
||||
}
|
||||
|
||||
if( delta_x>delta_y)distance=delta_x;
|
||||
else distance=delta_y;
|
||||
if (delta_x>delta_y)
|
||||
distance=delta_x;
|
||||
else
|
||||
distance=delta_y;
|
||||
|
||||
for(t=0;t<=distance+1;t++ )
|
||||
{
|
||||
drv_lcd_set_pixel(uRow,uCol,color);
|
||||
for(t = 0;t <= distance+1;t ++ ) {
|
||||
DrvLcdSetPixel(uRow,uCol,color);
|
||||
xerr += delta_x ;
|
||||
yerr += delta_y ;
|
||||
if(xerr>distance)
|
||||
{
|
||||
if (xerr>distance) {
|
||||
xerr-=distance;
|
||||
uRow+=incx;
|
||||
}
|
||||
if(yerr>distance)
|
||||
{
|
||||
if (yerr>distance) {
|
||||
yerr-=distance;
|
||||
uCol+=incy;
|
||||
}
|
||||
}
|
||||
}
|
||||
void LCD_DrawRectangle(uint16 x1, uint16 y1, uint16 x2, uint16 y2,uint16 color)
|
||||
|
||||
void LcdDrawRectangle(uint16 x1, uint16 y1, uint16 x2, uint16 y2,uint16 color)
|
||||
{
|
||||
LCD_DrawLine(x1,y1,x2,y1,color);
|
||||
LCD_DrawLine(x1,y1,x1,y2,color);
|
||||
LCD_DrawLine(x1,y2,x2,y2,color);
|
||||
LCD_DrawLine(x2,y1,x2,y2,color);
|
||||
LcdDrawLine(x1,y1,x2,y1,color);
|
||||
LcdDrawLine(x1,y1,x1,y2,color);
|
||||
LcdDrawLine(x1,y2,x2,y2,color);
|
||||
LcdDrawLine(x2,y1,x2,y2,color);
|
||||
}
|
||||
|
||||
void LCD_Draw_Circle(uint16 x0,uint16 y0,uint8 r,uint16 color)
|
||||
void LcdDrawCircle(uint16 x0,uint16 y0,uint8 r,uint16 color)
|
||||
{
|
||||
int a,b;
|
||||
int di;
|
||||
a=0;b=r;
|
||||
a = 0;
|
||||
b = r;
|
||||
di = 3-(r<<1);
|
||||
while(a<=b)
|
||||
{
|
||||
drv_lcd_set_pixel(x0+a,y0-b,color); //5
|
||||
drv_lcd_set_pixel(x0+b,y0-a,color); //0
|
||||
drv_lcd_set_pixel(x0+b,y0+a,color); //4
|
||||
drv_lcd_set_pixel(x0+a,y0+b,color); //6
|
||||
drv_lcd_set_pixel(x0-a,y0+b,color); //1
|
||||
drv_lcd_set_pixel(x0-b,y0+a,color);
|
||||
drv_lcd_set_pixel(x0-a,y0-b,color); //2
|
||||
drv_lcd_set_pixel(x0-b,y0-a,color); //7
|
||||
while(a <= b) {
|
||||
DrvLcdSetPixel(x0+a,y0-b,color); //5
|
||||
DrvLcdSetPixel(x0+b,y0-a,color); //0
|
||||
DrvLcdSetPixel(x0+b,y0+a,color); //4
|
||||
DrvLcdSetPixel(x0+a,y0+b,color); //6
|
||||
DrvLcdSetPixel(x0-a,y0+b,color); //1
|
||||
DrvLcdSetPixel(x0-b,y0+a,color);
|
||||
DrvLcdSetPixel(x0-a,y0-b,color); //2
|
||||
DrvLcdSetPixel(x0-b,y0-a,color); //7
|
||||
a++;
|
||||
//Bresenham
|
||||
if(di<0)di +=4*a+6;
|
||||
else
|
||||
{
|
||||
if(di<0)
|
||||
di += 4*a+6;
|
||||
else {
|
||||
di += 10+4*(a-b);
|
||||
b--;
|
||||
}
|
||||
|
|
|
@ -31,8 +31,8 @@ static struct HwtimerCallBackInfo *ptim2_cb_info = NULL;
|
|||
int timer_callback(void *ctx)
|
||||
{
|
||||
if (ptim2_cb_info) {
|
||||
if (ptim2_cb_info->TimeoutCb) {
|
||||
ptim2_cb_info->TimeoutCb(ptim2_cb_info->param);
|
||||
if (ptim2_cb_info->timeout_callback) {
|
||||
ptim2_cb_info->timeout_callback(ptim2_cb_info->param);
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
|
|
|
@ -56,7 +56,7 @@ void TouchWriteByte(unsigned char num)
|
|||
}
|
||||
}
|
||||
|
||||
unsigned short TP_Read_AD(unsigned char CMD)
|
||||
unsigned short TpReadAd(unsigned char CMD)
|
||||
{
|
||||
unsigned char count=0;
|
||||
unsigned short Num=0;
|
||||
|
@ -87,13 +87,15 @@ unsigned short TP_Read_AD(unsigned char CMD)
|
|||
|
||||
#define READ_TIMES 5
|
||||
#define LOST_VAL 1
|
||||
unsigned short TP_Read_XOY(unsigned char xy)
|
||||
|
||||
unsigned short TpReadXoy(unsigned char xy)
|
||||
{
|
||||
unsigned short i, j;
|
||||
unsigned short buf[READ_TIMES];
|
||||
unsigned short sum=0;
|
||||
unsigned short temp;
|
||||
for (i=0;i<READ_TIMES;i++)buf[i]=TP_Read_AD(xy);
|
||||
for (i=0;i<READ_TIMES;i++)
|
||||
buf[i]=TpReadAd(xy);
|
||||
for (i=0;i<READ_TIMES-1; i++) {
|
||||
for (j=i+1;j<READ_TIMES;j++) {
|
||||
if (buf[i]>buf[j]) {
|
||||
|
@ -104,16 +106,17 @@ unsigned short TP_Read_XOY(unsigned char xy)
|
|||
}
|
||||
}
|
||||
sum=0;
|
||||
for(i=LOST_VAL;i<READ_TIMES-LOST_VAL;i++)sum+=buf[i];
|
||||
for(i=LOST_VAL;i<READ_TIMES-LOST_VAL;i++)
|
||||
sum+=buf[i];
|
||||
temp=sum/(READ_TIMES-2*LOST_VAL);
|
||||
return temp;
|
||||
}
|
||||
|
||||
unsigned char TP_Read_XY(unsigned short *x, unsigned short *y)
|
||||
unsigned char TpReadXy(unsigned short *x, unsigned short *y)
|
||||
{
|
||||
unsigned short xtemp,ytemp;
|
||||
xtemp=TP_Read_XOY(CMD_RDX);
|
||||
ytemp=TP_Read_XOY(CMD_RDY);
|
||||
xtemp=TpReadXoy(CMD_RDX);
|
||||
ytemp=TpReadXoy(CMD_RDY);
|
||||
|
||||
*x=xtemp;
|
||||
*y=ytemp;
|
||||
|
@ -125,7 +128,7 @@ uint32 TouchRead(void *dev, struct BusBlockReadParam *read_param)
|
|||
uint32 ret = EOK;
|
||||
NULL_PARAM_CHECK(read_param);
|
||||
struct TouchDataStandard *data = ( struct TouchDataStandard*)read_param->buffer;
|
||||
TP_Read_XY(&data->x,&data->y);
|
||||
TpReadXy(&data->x,&data->y);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -138,10 +141,10 @@ unsigned char TP_Read_XY_TWICE(unsigned short *x, unsigned short *y)
|
|||
{
|
||||
unsigned short fir_x, fir_y, sec_x, sec_y;
|
||||
unsigned char flag;
|
||||
flag = TP_Read_XY(&fir_x, &fir_y);
|
||||
flag = TpReadXy(&fir_x, &fir_y);
|
||||
if (flag == 0)
|
||||
return(0);
|
||||
flag = TP_Read_XY(&sec_x, &sec_y);
|
||||
flag = TpReadXy(&sec_x, &sec_y);
|
||||
if (flag == 0)
|
||||
return(0);
|
||||
if (((sec_x <= fir_x && fir_x < sec_x + band_error) || (fir_x <= sec_x && sec_x < fir_x + band_error))
|
||||
|
@ -182,9 +185,8 @@ struct TouchDevDone touch_dev_done =
|
|||
void TP_Init(void)
|
||||
{
|
||||
TouchConfigure(NONE,NONE);
|
||||
while (1)
|
||||
{
|
||||
TP_Read_XY(&tp_dev.x, &tp_dev.y);
|
||||
while (1) {
|
||||
TpReadXy(&tp_dev.x, &tp_dev.y);
|
||||
KPrintf("tp_dev.x = %8d *** tp_dev.y= %8d \r\n", tp_dev.x, tp_dev.y);
|
||||
MdelayKTask(100);
|
||||
}
|
||||
|
@ -201,7 +203,7 @@ unsigned short my_abs(unsigned short x1, unsigned short x2)
|
|||
struct RiscTouch
|
||||
{
|
||||
char *BusName;
|
||||
struct TouchBus touchbus;
|
||||
struct TouchBus touch_bus;
|
||||
};
|
||||
|
||||
struct RiscTouch touch;
|
||||
|
@ -211,7 +213,7 @@ static int BoardTouchBusInit(struct RiscTouch *risc_touch_bus, struct TouchDrive
|
|||
x_err_t ret = EOK;
|
||||
|
||||
/*Init the touch bus */
|
||||
ret = TouchBusInit(&risc_touch_bus->touchbus, risc_touch_bus->BusName);
|
||||
ret = TouchBusInit(&risc_touch_bus->touch_bus, risc_touch_bus->BusName);
|
||||
if (EOK != ret) {
|
||||
KPrintf("Board_touch_init touchBusInit error %d\n", ret);
|
||||
return ERROR;
|
||||
|
@ -270,7 +272,7 @@ int HwTouchBusInit(void)
|
|||
|
||||
risc_touch = &touch;
|
||||
risc_touch->BusName = TOUCH_BUS_NAME_1;
|
||||
risc_touch->touchbus.private_data = &touch;
|
||||
risc_touch->touch_bus.private_data = &touch;
|
||||
|
||||
TouchConfigure(NONE,NONE);
|
||||
|
||||
|
|
|
@ -32,38 +32,31 @@ static void SerialCfgParamCheck(struct SerialCfgParam *serial_cfg_default, struc
|
|||
struct SerialDataCfg *data_cfg_default = &serial_cfg_default->data_cfg;
|
||||
struct SerialDataCfg *data_cfg_new = &serial_cfg_new->data_cfg;
|
||||
|
||||
if((data_cfg_default->serial_baud_rate != data_cfg_new->serial_baud_rate) && (data_cfg_new->serial_baud_rate))
|
||||
{
|
||||
if ((data_cfg_default->serial_baud_rate != data_cfg_new->serial_baud_rate) && (data_cfg_new->serial_baud_rate)) {
|
||||
data_cfg_default->serial_baud_rate = data_cfg_new->serial_baud_rate;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_bit_order != data_cfg_new->serial_bit_order) && (data_cfg_new->serial_bit_order))
|
||||
{
|
||||
if ((data_cfg_default->serial_bit_order != data_cfg_new->serial_bit_order) && (data_cfg_new->serial_bit_order)) {
|
||||
data_cfg_default->serial_bit_order = data_cfg_new->serial_bit_order;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_buffer_size != data_cfg_new->serial_buffer_size) && (data_cfg_new->serial_buffer_size))
|
||||
{
|
||||
if ((data_cfg_default->serial_buffer_size != data_cfg_new->serial_buffer_size) && (data_cfg_new->serial_buffer_size)) {
|
||||
data_cfg_default->serial_buffer_size = data_cfg_new->serial_buffer_size;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_data_bits != data_cfg_new->serial_data_bits) && (data_cfg_new->serial_data_bits))
|
||||
{
|
||||
if ((data_cfg_default->serial_data_bits != data_cfg_new->serial_data_bits) && (data_cfg_new->serial_data_bits)) {
|
||||
data_cfg_default->serial_data_bits = data_cfg_new->serial_data_bits;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_invert_mode != data_cfg_new->serial_invert_mode) && (data_cfg_new->serial_invert_mode))
|
||||
{
|
||||
if ((data_cfg_default->serial_invert_mode != data_cfg_new->serial_invert_mode) && (data_cfg_new->serial_invert_mode)) {
|
||||
data_cfg_default->serial_invert_mode = data_cfg_new->serial_invert_mode;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_parity_mode != data_cfg_new->serial_parity_mode) && (data_cfg_new->serial_parity_mode))
|
||||
{
|
||||
if ((data_cfg_default->serial_parity_mode != data_cfg_new->serial_parity_mode) && (data_cfg_new->serial_parity_mode)) {
|
||||
data_cfg_default->serial_parity_mode = data_cfg_new->serial_parity_mode;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_stop_bits != data_cfg_new->serial_stop_bits) && (data_cfg_new->serial_stop_bits))
|
||||
{
|
||||
if ((data_cfg_default->serial_stop_bits != data_cfg_new->serial_stop_bits) && (data_cfg_new->serial_stop_bits)) {
|
||||
data_cfg_default->serial_stop_bits = data_cfg_new->serial_stop_bits;
|
||||
}
|
||||
}
|
||||
|
@ -81,8 +74,7 @@ static uint32 SerialInit(struct SerialDriver *serial_drv, struct BusConfigureInf
|
|||
NULL_PARAM_CHECK(serial_drv);
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_drv->private_data;
|
||||
|
||||
if(configure_info->private_data)
|
||||
{
|
||||
if (configure_info->private_data) {
|
||||
struct SerialCfgParam *serial_cfg_new = (struct SerialCfgParam *)configure_info->private_data;
|
||||
SerialCfgParamCheck(serial_cfg, serial_cfg_new);
|
||||
}
|
||||
|
@ -178,24 +170,21 @@ static int BoardSerialBusInit(struct SerialBus *serial_bus, struct SerialDriver
|
|||
|
||||
/*Init the serial bus */
|
||||
ret = SerialBusInit(serial_bus, bus_name);
|
||||
if(EOK != ret)
|
||||
{
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUart SerialBusInit error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
/*Init the serial driver*/
|
||||
ret = SerialDriverInit(serial_driver, drv_name);
|
||||
if(EOK != ret)
|
||||
{
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUart SerialDriverInit error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
/*Attach the serial driver to the serial bus*/
|
||||
ret = SerialDriverAttachToBus(drv_name, bus_name);
|
||||
if(EOK != ret)
|
||||
{
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUart SerialDriverAttachToBus error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
@ -209,15 +198,13 @@ static int BoardSerialDevBend(struct SerialHardwareDevice *serial_device, void *
|
|||
x_err_t ret = EOK;
|
||||
|
||||
ret = SerialDeviceRegister(serial_device, serial_param, dev_name);
|
||||
if(EOK != ret)
|
||||
{
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUart SerialDeviceInit device %s error %d\n", dev_name, ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = SerialDeviceAttachToBus(dev_name, bus_name);
|
||||
if(EOK != ret)
|
||||
{
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUart SerialDeviceAttachToBus device %s error %d\n", dev_name, ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
@ -258,15 +245,13 @@ int InitHwUart(void)
|
|||
serial_device.haldev.private_data = (void *)&serial_dev_param;
|
||||
|
||||
ret = BoardSerialBusInit(&serial_bus, &serial_driver, SERIAL_BUS_NAME, SERIAL_DRV_NAME);
|
||||
if(EOK != ret)
|
||||
{
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUart uarths error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = BoardSerialDevBend(&serial_device, (void *)&serial_cfg, SERIAL_BUS_NAME, SERIAL_DEVICE_NAME);
|
||||
if(EOK != ret)
|
||||
{
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUart uarths error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
|
|
@ -32,38 +32,31 @@ static void SerialCfgParamCheck(struct SerialCfgParam *serial_cfg_default, struc
|
|||
struct SerialDataCfg *data_cfg_default = &serial_cfg_default->data_cfg;
|
||||
struct SerialDataCfg *data_cfg_new = &serial_cfg_new->data_cfg;
|
||||
|
||||
if((data_cfg_default->serial_baud_rate != data_cfg_new->serial_baud_rate) && (data_cfg_new->serial_baud_rate))
|
||||
{
|
||||
if ((data_cfg_default->serial_baud_rate != data_cfg_new->serial_baud_rate) && (data_cfg_new->serial_baud_rate)) {
|
||||
data_cfg_default->serial_baud_rate = data_cfg_new->serial_baud_rate;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_bit_order != data_cfg_new->serial_bit_order) && (data_cfg_new->serial_bit_order))
|
||||
{
|
||||
if ((data_cfg_default->serial_bit_order != data_cfg_new->serial_bit_order) && (data_cfg_new->serial_bit_order)) {
|
||||
data_cfg_default->serial_bit_order = data_cfg_new->serial_bit_order;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_buffer_size != data_cfg_new->serial_buffer_size) && (data_cfg_new->serial_buffer_size))
|
||||
{
|
||||
if ((data_cfg_default->serial_buffer_size != data_cfg_new->serial_buffer_size) && (data_cfg_new->serial_buffer_size)) {
|
||||
data_cfg_default->serial_buffer_size = data_cfg_new->serial_buffer_size;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_data_bits != data_cfg_new->serial_data_bits) && (data_cfg_new->serial_data_bits))
|
||||
{
|
||||
if ((data_cfg_default->serial_data_bits != data_cfg_new->serial_data_bits) && (data_cfg_new->serial_data_bits)) {
|
||||
data_cfg_default->serial_data_bits = data_cfg_new->serial_data_bits;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_invert_mode != data_cfg_new->serial_invert_mode) && (data_cfg_new->serial_invert_mode))
|
||||
{
|
||||
if ((data_cfg_default->serial_invert_mode != data_cfg_new->serial_invert_mode) && (data_cfg_new->serial_invert_mode)) {
|
||||
data_cfg_default->serial_invert_mode = data_cfg_new->serial_invert_mode;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_parity_mode != data_cfg_new->serial_parity_mode) && (data_cfg_new->serial_parity_mode))
|
||||
{
|
||||
if ((data_cfg_default->serial_parity_mode != data_cfg_new->serial_parity_mode) && (data_cfg_new->serial_parity_mode)) {
|
||||
data_cfg_default->serial_parity_mode = data_cfg_new->serial_parity_mode;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_stop_bits != data_cfg_new->serial_stop_bits) && (data_cfg_new->serial_stop_bits))
|
||||
{
|
||||
if ((data_cfg_default->serial_stop_bits != data_cfg_new->serial_stop_bits) && (data_cfg_new->serial_stop_bits)) {
|
||||
data_cfg_default->serial_stop_bits = data_cfg_new->serial_stop_bits;
|
||||
}
|
||||
}
|
||||
|
@ -81,8 +74,7 @@ static uint32 SerialInit(struct SerialDriver *serial_drv, struct BusConfigureInf
|
|||
NULL_PARAM_CHECK(serial_drv);
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_drv->private_data;
|
||||
|
||||
if(configure_info->private_data)
|
||||
{
|
||||
if (configure_info->private_data) {
|
||||
struct SerialCfgParam *serial_cfg_new = (struct SerialCfgParam *)configure_info->private_data;
|
||||
SerialCfgParamCheck(serial_cfg, serial_cfg_new);
|
||||
}
|
||||
|
@ -178,24 +170,21 @@ static int BoardSerialBusInit(struct SerialBus *serial_bus, struct SerialDriver
|
|||
|
||||
/*Init the serial bus */
|
||||
ret = SerialBusInit(serial_bus, bus_name);
|
||||
if(EOK != ret)
|
||||
{
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUart SerialBusInit error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
/*Init the serial driver*/
|
||||
ret = SerialDriverInit(serial_driver, drv_name);
|
||||
if(EOK != ret)
|
||||
{
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUart SerialDriverInit error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
/*Attach the serial driver to the serial bus*/
|
||||
ret = SerialDriverAttachToBus(drv_name, bus_name);
|
||||
if(EOK != ret)
|
||||
{
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUart SerialDriverAttachToBus error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
@ -209,15 +198,13 @@ static int BoardSerialDevBend(struct SerialHardwareDevice *serial_device, void *
|
|||
x_err_t ret = EOK;
|
||||
|
||||
ret = SerialDeviceRegister(serial_device, serial_param, dev_name);
|
||||
if(EOK != ret)
|
||||
{
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUart SerialDeviceInit device %s error %d\n", dev_name, ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = SerialDeviceAttachToBus(dev_name, bus_name);
|
||||
if(EOK != ret)
|
||||
{
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUart SerialDeviceAttachToBus device %s error %d\n", dev_name, ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
@ -258,15 +245,13 @@ int InitHwUart(void)
|
|||
serial_device.haldev.private_data = (void *)&serial_dev_param;
|
||||
|
||||
ret = BoardSerialBusInit(&serial_bus, &serial_driver, SERIAL_BUS_NAME, SERIAL_DRV_NAME);
|
||||
if(EOK != ret)
|
||||
{
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUart uarths error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = BoardSerialDevBend(&serial_device, (void *)&serial_cfg, SERIAL_BUS_NAME, SERIAL_DEVICE_NAME);
|
||||
if(EOK != ret)
|
||||
{
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUart uarths error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
|
|
@ -124,8 +124,7 @@ static x_err_t I2cBusReset(const I2cBusParam *bus_param)
|
|||
int32 i = 0;
|
||||
gpio_set_drive_mode(bus_param->i2c_sda_pin, GPIO_DM_INPUT_PULL_UP );
|
||||
if (GPIO_LOW == gpio_get_pin(bus_param->i2c_sda_pin)) {
|
||||
while (i++ < 9)
|
||||
{
|
||||
while (i++ < 9) {
|
||||
gpio_set_drive_mode(bus_param->i2c_scl_pin, GPIO_DM_OUTPUT );
|
||||
gpio_set_pin(bus_param->i2c_scl_pin , GPIO_PV_HIGH );
|
||||
usleep(100);
|
||||
|
@ -160,8 +159,7 @@ static x_err_t SclHigh(struct I2cHalDrvDone *done)
|
|||
goto done;
|
||||
|
||||
start = CurrentTicksGain();
|
||||
while (!GET_SCL(done))
|
||||
{
|
||||
while (!GET_SCL(done)) {
|
||||
if ((CurrentTicksGain() - start) > done->timeout)
|
||||
return -ETIMEOUT;
|
||||
DelayKTask((done->timeout + 1) >> 1);
|
||||
|
@ -282,8 +280,7 @@ static x_size_t I2cSendBytes(struct I2cBus *bus, struct I2cDataStandard *msg)
|
|||
int32 count = msg->len;
|
||||
uint16 ignore_nack = msg->flags & I2C_IGNORE_NACK;
|
||||
|
||||
while (count > 0)
|
||||
{
|
||||
while (count > 0) {
|
||||
ret = I2cWriteb(bus, *ptr);
|
||||
|
||||
if ((ret > 0) || (ignore_nack && (ret == 0))) {
|
||||
|
@ -327,8 +324,7 @@ static x_size_t I2cRecvBytes(struct I2cBus *bus, struct I2cDataStandard *msg)
|
|||
int32 count = msg->len;
|
||||
const uint32 flags = msg->flags;
|
||||
|
||||
while (count > 0)
|
||||
{
|
||||
while (count > 0) {
|
||||
val = I2cReadb(bus);
|
||||
if (val >= 0) {
|
||||
*ptr = val;
|
||||
|
@ -427,8 +423,7 @@ static uint32 I2cWriteData(struct I2cHardwareDevice *i2c_dev, struct I2cDataStan
|
|||
uint16 ignore_nack;
|
||||
|
||||
I2cStart(done);
|
||||
while (NONE != msg)
|
||||
{
|
||||
while (NONE != msg) {
|
||||
ignore_nack = msg->flags & I2C_IGNORE_NACK;
|
||||
if (!(msg->flags & I2C_NO_START)) {
|
||||
if (i) {
|
||||
|
@ -471,8 +466,7 @@ static uint32 I2cReadData(struct I2cHardwareDevice *i2c_dev, struct I2cDataStand
|
|||
uint16 ignore_nack;
|
||||
|
||||
I2cStart(done);
|
||||
while (NONE != msg)
|
||||
{
|
||||
while (NONE != msg) {
|
||||
ignore_nack = msg->flags & I2C_IGNORE_NACK;
|
||||
if (!(msg->flags & I2C_NO_START)) {
|
||||
if (i) {
|
||||
|
|
|
@ -159,8 +159,7 @@ static uint32 SpiWriteData(struct SpiHardwareDevice *spi_dev, struct SpiDataStan
|
|||
uint8 device_master_id = dev_param->spi_dma_param->spi_master_id;
|
||||
uint8 cs_gpio_pin = dev_param->spi_slave_param->spi_cs_gpio_pin;
|
||||
|
||||
while (NONE != spi_datacfg)
|
||||
{
|
||||
while (NONE != spi_datacfg) {
|
||||
uint32_t * tx_buff = NONE;
|
||||
int i;
|
||||
x_ubase dummy = 0xFFFFFFFFU;
|
||||
|
@ -227,8 +226,7 @@ static uint32 SpiReadData(struct SpiHardwareDevice *spi_dev, struct SpiDataStand
|
|||
uint8 device_master_id = dev_param->spi_dma_param->spi_master_id;
|
||||
uint8 cs_gpio_pin = dev_param->spi_slave_param->spi_cs_gpio_pin;
|
||||
|
||||
while (NONE != spi_datacfg)
|
||||
{
|
||||
while (NONE != spi_datacfg) {
|
||||
uint32_t * rx_buff = NONE;
|
||||
int i;
|
||||
x_ubase dummy = 0xFFFFFFFFU;
|
||||
|
|
|
@ -32,8 +32,8 @@ static struct HwtimerCallBackInfo *ptim2_cb_info = NULL;
|
|||
int timer_callback(void *ctx)
|
||||
{
|
||||
if (ptim2_cb_info) {
|
||||
if (ptim2_cb_info->TimeoutCb) {
|
||||
ptim2_cb_info->TimeoutCb(ptim2_cb_info->param);
|
||||
if (ptim2_cb_info->timeout_callback) {
|
||||
ptim2_cb_info->timeout_callback(ptim2_cb_info->param);
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
|
|
|
@ -30,8 +30,6 @@ Modification:
|
|||
#include "misc.h"
|
||||
#include "hardware_rcc.h"
|
||||
#include "hardware_gpio.h"
|
||||
#include <xiuos.h>
|
||||
#include <device.h>
|
||||
|
||||
static struct CanSendConfigure can_send_deconfig =
|
||||
{
|
||||
|
@ -42,7 +40,6 @@ static struct CanSendConfigure can_send_deconfig =
|
|||
.data_lenth = 8
|
||||
};
|
||||
|
||||
|
||||
static void CanGPIOInit(void)
|
||||
{
|
||||
CAN_FilterInitTypeDef can1_filter;
|
||||
|
@ -131,8 +128,7 @@ static uint32 CanSendMsg(void * dev , struct BusBlockWriteParam *write_param )
|
|||
tx_data.RTR = 0;
|
||||
tx_data.DLC = write_param->size;
|
||||
|
||||
for(i = 0;i<tx_data.DLC;i++)
|
||||
{
|
||||
for(i = 0;i<tx_data.DLC;i++) {
|
||||
tx_data.Data[i] = data[i];
|
||||
}
|
||||
|
||||
|
@ -164,7 +160,6 @@ static uint32 CanRecvMsg(void *dev , struct BusBlockReadParam *databuf)
|
|||
return msg.DLC;
|
||||
}
|
||||
|
||||
|
||||
static struct CanDevDone dev_done =
|
||||
{
|
||||
.open = NONE,
|
||||
|
@ -173,7 +168,6 @@ static struct CanDevDone dev_done =
|
|||
.read = CanRecvMsg
|
||||
};
|
||||
|
||||
|
||||
static struct CanHardwareDevice dev;
|
||||
|
||||
#ifdef CAN_USING_INTERRUPT
|
||||
|
@ -215,8 +209,6 @@ static int BoardCanBusInit(struct Stm32Can *stm32can_bus, struct CanDriver *can_
|
|||
return ret;
|
||||
}
|
||||
|
||||
|
||||
|
||||
static x_err_t HwCanDeviceAttach(const char *bus_name, const char *device_name)
|
||||
{
|
||||
NULL_PARAM_CHECK(bus_name);
|
||||
|
@ -249,7 +241,6 @@ static x_err_t HwCanDeviceAttach(const char *bus_name, const char *device_name)
|
|||
return result;
|
||||
}
|
||||
|
||||
|
||||
struct Stm32Can can1;
|
||||
|
||||
int Stm32HwCanBusInit(void)
|
||||
|
|
|
@ -721,11 +721,11 @@ static uint32 Stm32PinConfigure(struct PinParam *param)
|
|||
|
||||
static uint32 Stm32PinInit(void)
|
||||
{
|
||||
static x_bool PinInitFlag = RET_FALSE;
|
||||
static x_bool pin_init_flag = RET_FALSE;
|
||||
|
||||
if(!PinInitFlag){
|
||||
if (!pin_init_flag) {
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
|
||||
PinInitFlag = RET_TRUE;
|
||||
pin_init_flag = RET_TRUE;
|
||||
}
|
||||
|
||||
return EOK;
|
||||
|
@ -765,8 +765,7 @@ uint32 Stm32PinWrite(void *dev, struct BusBlockWriteParam *write_param)
|
|||
|
||||
if (GPIO_LOW == pinstat->val) {
|
||||
GPIO_ResetBits(index->gpio, index->pin);
|
||||
}
|
||||
else{
|
||||
} else {
|
||||
GPIO_SetBits(index->gpio, index->pin);
|
||||
}
|
||||
return EOK;
|
||||
|
|
|
@ -192,8 +192,7 @@ static uint8 GetSclState(void *data)
|
|||
|
||||
ticks = us * reload / (1000000 / TICK_PER_SECOND);
|
||||
told = SysTick->VAL;
|
||||
while (1)
|
||||
{
|
||||
while (1) {
|
||||
tnow = SysTick->VAL;
|
||||
if (tnow != told) {
|
||||
if (tnow < told) {
|
||||
|
@ -227,8 +226,7 @@ static x_err_t I2cBusReset(const I2cBusParam *bus_param)
|
|||
int32 i = 0;
|
||||
|
||||
if (GPIO_LOW == GetSdaState((void *)bus_param)) {
|
||||
while (i++ < 9)
|
||||
{
|
||||
while (i++ < 9) {
|
||||
SetSclState((void *)bus_param,GPIO_HIGH);
|
||||
Stm32Udelay(100);
|
||||
SetSclState((void *)bus_param,GPIO_LOW);
|
||||
|
@ -384,8 +382,7 @@ static x_size_t I2cSendBytes(struct I2cBus *bus, struct I2cDataStandard *msg)
|
|||
int32 count = msg->len;
|
||||
uint16 ignore_nack = msg->flags & I2C_IGNORE_NACK;
|
||||
|
||||
while (count > 0)
|
||||
{
|
||||
while (count > 0) {
|
||||
ret = I2cWriteb(bus, *ptr);
|
||||
|
||||
if ((ret > 0) || (ignore_nack && (ret == 0))) {
|
||||
|
@ -430,8 +427,7 @@ static x_size_t I2cRecvBytes(struct I2cBus *bus, struct I2cDataStandard *msg)
|
|||
int32 count = msg->len;
|
||||
const uint32 flags = msg->flags;
|
||||
|
||||
while (count > 0)
|
||||
{
|
||||
while (count > 0) {
|
||||
val = I2cReadb(bus);
|
||||
if (val >= 0) {
|
||||
*ptr = val;
|
||||
|
@ -529,8 +525,7 @@ static uint32 I2cWriteData(struct I2cHardwareDevice *i2c_dev, struct I2cDataStan
|
|||
uint16 ignore_nack;
|
||||
|
||||
I2cStart(done);
|
||||
while (NONE != msg)
|
||||
{
|
||||
while (NONE != msg) {
|
||||
ignore_nack = msg->flags & I2C_IGNORE_NACK;
|
||||
if (!(msg->flags & I2C_NO_START)) {
|
||||
if (i) {
|
||||
|
@ -573,8 +568,7 @@ static uint32 I2cReadData(struct I2cHardwareDevice *i2c_dev, struct I2cDataStand
|
|||
uint16 ignore_nack;
|
||||
|
||||
I2cStart(done);
|
||||
while (NONE != msg)
|
||||
{
|
||||
while (NONE != msg) {
|
||||
ignore_nack = msg->flags & I2C_IGNORE_NACK;
|
||||
if (!(msg->flags & I2C_NO_START)) {
|
||||
if (i) {
|
||||
|
|
|
@ -21,6 +21,7 @@
|
|||
#ifndef CONNECT_CAN_H
|
||||
#define CONNECT_CAN_H
|
||||
|
||||
#include <device.h>
|
||||
#include "hardware_can.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
|
|
@ -56,7 +56,7 @@ struct Stm32Spi
|
|||
{
|
||||
SPI_TypeDef *instance;
|
||||
|
||||
char *BusName;
|
||||
char *bus_name;
|
||||
|
||||
SPI_InitTypeDef init;
|
||||
|
||||
|
@ -67,11 +67,11 @@ struct Stm32Spi
|
|||
}dma;
|
||||
|
||||
uint8 spi_dma_flag;
|
||||
struct SpiBus SpiBus;
|
||||
struct SpiBus spi_bus;
|
||||
};
|
||||
|
||||
int Stm32HwSpiInit(void);
|
||||
x_err_t HwSpiDeviceAttach(const char *BusName, const char *device_name, GPIO_TypeDef *cs_gpiox, uint16_t cs_gpio_pin);
|
||||
x_err_t HwSpiDeviceAttach(const char *bus_name, const char *device_name, GPIO_TypeDef *cs_gpiox, uint16_t cs_gpio_pin);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
|
|
@ -51,7 +51,7 @@ struct Stm32Usart
|
|||
x_size_t LastRecvIndex;
|
||||
} dma;
|
||||
|
||||
struct SerialBus SerialBus;
|
||||
struct SerialBus serial_bus;
|
||||
};
|
||||
|
||||
int Stm32HwUsartInit(void);
|
||||
|
|
|
@ -41,8 +41,7 @@ static uint32 SdioConfigure(void *drv, struct BusConfigureInfo *configure_info)
|
|||
NULL_PARAM_CHECK(drv);
|
||||
NULL_PARAM_CHECK(configure_info);
|
||||
|
||||
if(configure_info->configure_cmd == OPER_BLK_GETGEOME)
|
||||
{
|
||||
if (configure_info->configure_cmd == OPER_BLK_GETGEOME) {
|
||||
NULL_PARAM_CHECK(configure_info->private_data);
|
||||
struct DeviceBlockArrange *args = (struct DeviceBlockArrange *)configure_info->private_data;
|
||||
SD_GetCardInfo(&SDCardInfo);
|
||||
|
@ -91,16 +90,14 @@ static uint32 SdioRead(void *dev, struct BusBlockReadParam *read_param)
|
|||
|
||||
KSemaphoreObtain(sd_lock, WAITING_FOREVER);
|
||||
|
||||
if(((uint32)read_param->buffer & 0x03) != 0)
|
||||
{
|
||||
if (((uint32)read_param->buffer & 0x03) != 0) {
|
||||
uint64_t sector;
|
||||
uint8_t* temp;
|
||||
|
||||
sector = (uint64_t)read_param->pos * SDCARD_SECTOR_SIZE;
|
||||
temp = (uint8_t*)read_param->buffer;
|
||||
|
||||
for (uint8 i = 0; i < read_param->size; i++)
|
||||
{
|
||||
for (uint8 i = 0; i < read_param->size; i++) {
|
||||
ret = SD_ReadBlock((uint8_t *)SDBuffer, sector, 1);
|
||||
if(ret != SD_OK) {
|
||||
KPrintf("read failed: %d, buffer 0x%08x\n", ret, temp);
|
||||
|
@ -108,8 +105,7 @@ static uint32 SdioRead(void *dev, struct BusBlockReadParam *read_param)
|
|||
}
|
||||
#if defined (SD_DMA_MODE)
|
||||
ret = SD_WaitReadOperation();
|
||||
if(ret != SD_OK)
|
||||
{
|
||||
if (ret != SD_OK) {
|
||||
KPrintf("read failed: %d, buffer 0x%08x\n", ret, temp);
|
||||
return 0;
|
||||
}
|
||||
|
@ -119,9 +115,7 @@ static uint32 SdioRead(void *dev, struct BusBlockReadParam *read_param)
|
|||
sector += SDCARD_SECTOR_SIZE;
|
||||
temp += SDCARD_SECTOR_SIZE;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
} else {
|
||||
ret = SD_ReadBlock((uint8_t *)read_param->buffer, (uint64_t)read_param->pos * SDCARD_SECTOR_SIZE, read_param->size);
|
||||
if (ret != SD_OK) {
|
||||
KPrintf("read failed: %d, buffer 0x%08x\n", ret, (uint8_t *)read_param->buffer);
|
||||
|
@ -147,16 +141,14 @@ static uint32 SdioWrite(void *dev, struct BusBlockWriteParam *write_param)
|
|||
|
||||
KSemaphoreObtain(sd_lock, WAITING_FOREVER);
|
||||
|
||||
if(((uint32)write_param->buffer & 0x03) != 0)
|
||||
{
|
||||
if (((uint32)write_param->buffer & 0x03) != 0) {
|
||||
uint64_t sector;
|
||||
uint8_t* temp;
|
||||
|
||||
sector = (uint64_t)write_param->pos * SDCARD_SECTOR_SIZE;
|
||||
temp = (uint8_t*)write_param->buffer;
|
||||
|
||||
for (uint8 i = 0; i < write_param->size; i++)
|
||||
{
|
||||
for (uint8 i = 0; i < write_param->size; i++) {
|
||||
memcpy(SDBuffer, temp, SDCARD_SECTOR_SIZE);
|
||||
|
||||
ret = SD_WriteBlock((uint8_t *)SDBuffer, sector, 1);
|
||||
|
@ -174,9 +166,7 @@ static uint32 SdioWrite(void *dev, struct BusBlockWriteParam *write_param)
|
|||
sector += SDCARD_SECTOR_SIZE;
|
||||
temp += SDCARD_SECTOR_SIZE;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
} else {
|
||||
ret = SD_WriteBlock((uint8_t *)write_param->buffer, (uint64_t)write_param->pos * SDCARD_SECTOR_SIZE, write_param->size);
|
||||
if (ret != SD_OK) {
|
||||
KPrintf("write failed: %d, buffer 0x%08x\n", ret, (uint8_t *)write_param->buffer);
|
||||
|
|
|
@ -227,9 +227,9 @@ static x_err_t Stm32SpiInit(struct Stm32Spi *spi_drv, struct SpiMasterParam *cfg
|
|||
return EOK;
|
||||
}
|
||||
|
||||
static void DmaSpiConfig(struct SpiBus *SpiBus, uint32_t setting_len, void *rx_base_addr, void *tx_base_addr)
|
||||
static void DmaSpiConfig(struct SpiBus *spi_bus, uint32_t setting_len, void *rx_base_addr, void *tx_base_addr)
|
||||
{
|
||||
struct Stm32Spi *spi = (struct Stm32Spi *)SpiBus->private_data;
|
||||
struct Stm32Spi *spi = (struct Stm32Spi *)spi_bus->private_data;
|
||||
uint32 tmpreg = 0x00U;
|
||||
NVIC_InitTypeDef NVIC_InitStructure;
|
||||
|
||||
|
@ -314,9 +314,9 @@ static void DmaSpiConfig(struct SpiBus *SpiBus, uint32_t setting_len, void *rx_b
|
|||
}
|
||||
|
||||
|
||||
static void DmaRxDoneIsr(struct SpiBus *SpiBus)
|
||||
static void DmaRxDoneIsr(struct SpiBus *spi_bus)
|
||||
{
|
||||
struct Stm32Spi *spi = (struct Stm32Spi *) SpiBus->bus.private_data;
|
||||
struct Stm32Spi *spi = (struct Stm32Spi *) spi_bus->bus.private_data;
|
||||
x_size_t recv_len;
|
||||
x_base level;
|
||||
|
||||
|
@ -332,9 +332,9 @@ static void DmaRxDoneIsr(struct SpiBus *SpiBus)
|
|||
}
|
||||
|
||||
|
||||
static void DmaTxDoneIsr(struct SpiBus *SpiBus)
|
||||
static void DmaTxDoneIsr(struct SpiBus *spi_bus)
|
||||
{
|
||||
struct Stm32Spi *spi = (struct Stm32Spi *) SpiBus->bus.private_data;
|
||||
struct Stm32Spi *spi = (struct Stm32Spi *) spi_bus->bus.private_data;
|
||||
x_size_t send_len;
|
||||
x_base level;
|
||||
|
||||
|
@ -1062,26 +1062,23 @@ static uint32 Stm32SpiWriteData(struct SpiHardwareDevice *spi_dev, struct SpiDat
|
|||
NULL_PARAM_CHECK(spi_dev);
|
||||
NULL_PARAM_CHECK(spi_datacfg);
|
||||
|
||||
struct Stm32Spi *StmSpi = CONTAINER_OF(spi_dev->haldev.owner_bus, struct Stm32Spi, SpiBus);
|
||||
struct Stm32Spi *StmSpi = CONTAINER_OF(spi_dev->haldev.owner_bus, struct Stm32Spi, spi_bus);
|
||||
SPI_TypeDef *spi_instance = StmSpi->instance;
|
||||
SPI_InitTypeDef *spi_init = &StmSpi->init;
|
||||
struct Stm32HwSpiCs *cs = (struct Stm32HwSpiCs *)spi_dev->haldev.private_data;
|
||||
struct Stm32HwSpiCs *cs = (struct Stm32HwSpiCs *)spi_dev->private_data;
|
||||
|
||||
while(NONE != spi_datacfg)
|
||||
{
|
||||
while(NONE != spi_datacfg) {
|
||||
if(spi_datacfg->spi_chip_select) {
|
||||
GPIO_WriteBit(cs->GPIOx, cs->GPIO_Pin, Bit_RESET);
|
||||
}
|
||||
|
||||
message_length = spi_datacfg->length;
|
||||
WriteBuf = spi_datacfg->tx_buff;
|
||||
while (message_length)
|
||||
{
|
||||
while (message_length) {
|
||||
if (message_length > 65535){
|
||||
send_length = 65535;
|
||||
message_length = message_length - 65535;
|
||||
}
|
||||
else{
|
||||
} else {
|
||||
send_length = message_length;
|
||||
message_length = 0;
|
||||
}
|
||||
|
@ -1091,12 +1088,10 @@ static uint32 Stm32SpiWriteData(struct SpiHardwareDevice *spi_dev, struct SpiDat
|
|||
WriteBuf = (uint8 *)spi_datacfg->tx_buff + already_send_length;
|
||||
|
||||
/* start once data exchange in DMA mode */
|
||||
if (spi_datacfg->tx_buff)
|
||||
{
|
||||
if (spi_datacfg->tx_buff) {
|
||||
if (StmSpi->spi_dma_flag & SPI_USING_TX_DMA_FLAG) {
|
||||
state = SpiTransmitDma(*spi_init, spi_instance, StmSpi->dma.dma_tx.init, StmSpi->dma.dma_tx.instance, (uint8_t *)WriteBuf, send_length);
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
state = SpiTransmit(*spi_init, spi_instance, (uint8_t *)WriteBuf, send_length, 1000);
|
||||
}
|
||||
}
|
||||
|
@ -1136,26 +1131,23 @@ static uint32 Stm32SpiReadData(struct SpiHardwareDevice *spi_dev, struct SpiData
|
|||
NULL_PARAM_CHECK(spi_dev);
|
||||
NULL_PARAM_CHECK(spi_datacfg);
|
||||
|
||||
struct Stm32Spi *StmSpi = CONTAINER_OF(spi_dev->haldev.owner_bus, struct Stm32Spi, SpiBus);
|
||||
struct Stm32Spi *StmSpi = CONTAINER_OF(spi_dev->haldev.owner_bus, struct Stm32Spi, spi_bus);
|
||||
SPI_TypeDef *spi_instance = StmSpi->instance;
|
||||
SPI_InitTypeDef *spi_init = &StmSpi->init;
|
||||
struct Stm32HwSpiCs *cs = (struct Stm32HwSpiCs *)spi_dev->haldev.private_data;
|
||||
struct Stm32HwSpiCs *cs = (struct Stm32HwSpiCs *)spi_dev->private_data;
|
||||
|
||||
while(NONE != spi_datacfg)
|
||||
{
|
||||
while (NONE != spi_datacfg) {
|
||||
if (spi_datacfg->spi_chip_select) {
|
||||
GPIO_WriteBit(cs->GPIOx, cs->GPIO_Pin, Bit_RESET);
|
||||
}
|
||||
|
||||
message_length = spi_datacfg->length;
|
||||
ReadBuf = spi_datacfg->rx_buff;
|
||||
while (message_length)
|
||||
{
|
||||
while (message_length) {
|
||||
if (message_length > 65535) {
|
||||
send_length = 65535;
|
||||
message_length = message_length - 65535;
|
||||
}
|
||||
else{
|
||||
} else {
|
||||
send_length = message_length;
|
||||
message_length = 0;
|
||||
}
|
||||
|
@ -1169,8 +1161,7 @@ static uint32 Stm32SpiReadData(struct SpiHardwareDevice *spi_dev, struct SpiData
|
|||
memset((uint8_t *)ReadBuf, 0xff, send_length);
|
||||
if (StmSpi->spi_dma_flag & SPI_USING_RX_DMA_FLAG) {
|
||||
state = SpiReceiveDma(*spi_init, spi_instance, StmSpi->dma.dma_rx.init, StmSpi->dma.dma_rx.instance, StmSpi->dma.dma_tx.init, StmSpi->dma.dma_tx.instance, (uint8_t *)ReadBuf, send_length);
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
state = SpiReceive(*spi_init, spi_instance, (uint8_t *)ReadBuf, send_length, 1000);
|
||||
}
|
||||
}
|
||||
|
@ -1204,7 +1195,7 @@ static uint32 SpiDrvInit(struct SpiDriver *spi_drv)
|
|||
|
||||
SpiDeviceParam *dev_param = (SpiDeviceParam *)(spi_drv->driver.private_data);
|
||||
|
||||
struct Stm32Spi *StmSpi = CONTAINER_OF(spi_drv->driver.owner_bus, struct Stm32Spi, SpiBus);
|
||||
struct Stm32Spi *StmSpi = CONTAINER_OF(spi_drv->driver.owner_bus, struct Stm32Spi, spi_bus);
|
||||
|
||||
return Stm32SpiInit(StmSpi, dev_param->spi_master_param);
|
||||
}
|
||||
|
@ -1271,7 +1262,7 @@ struct Stm32Spi spi1;
|
|||
#if defined(BSP_SPI1_TX_USING_DMA)
|
||||
void DMA2_Stream3_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
DmaTxDoneIsr(&spi1.SpiBus);
|
||||
DmaTxDoneIsr(&spi1.spi_bus);
|
||||
}
|
||||
DECLARE_HW_IRQ(DMA2_Stream3_IRQn, DMA2_Stream3_IRQHandler, NONE);
|
||||
#endif
|
||||
|
@ -1279,7 +1270,7 @@ DECLARE_HW_IRQ(DMA2_Stream3_IRQn, DMA2_Stream3_IRQHandler, NONE);
|
|||
#if defined(BSP_SPI1_RX_USING_DMA)
|
||||
void DMA2_Stream0_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
DmaRxDoneIsr(&spi1.SpiBus);
|
||||
DmaRxDoneIsr(&spi1.spi_bus);
|
||||
}
|
||||
DECLARE_HW_IRQ(DMA2_Stream0_IRQn, DMA2_Stream0_IRQHandler, NONE);
|
||||
#endif
|
||||
|
@ -1290,7 +1281,7 @@ struct Stm32Spi spi2;
|
|||
#if defined(BSP_SPI2_TX_USING_DMA)
|
||||
void DMA1_Stream4_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
DmaTxDoneIsr(&spi2.SpiBus);
|
||||
DmaTxDoneIsr(&spi2.spi_bus);
|
||||
}
|
||||
DECLARE_HW_IRQ(DMA1_Stream4_IRQn, DMA1_Stream4_IRQHandler, NONE);
|
||||
#endif
|
||||
|
@ -1298,7 +1289,7 @@ DECLARE_HW_IRQ(DMA1_Stream4_IRQn, DMA1_Stream4_IRQHandler, NONE);
|
|||
#if defined(BSP_SPI2_RX_USING_DMA)
|
||||
void DMA1_Stream3_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
DmaTxDoneIsr(&spi2.SpiBus);
|
||||
DmaTxDoneIsr(&spi2.spi_bus);
|
||||
}
|
||||
DECLARE_HW_IRQ(DMA1_Stream3_IRQn, DMA1_Stream3_IRQHandler, NONE);
|
||||
#endif
|
||||
|
@ -1309,7 +1300,7 @@ struct Stm32Spi spi3;
|
|||
#if defined(BSP_SPI3_TX_USING_DMA)
|
||||
void DMA1_Stream7_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
DmaTxDoneIsr(&spi3.SpiBus);
|
||||
DmaTxDoneIsr(&spi3.spi_bus);
|
||||
}
|
||||
DECLARE_HW_IRQ(DMA1_Stream7_IRQn, DMA1_Stream7_IRQHandler, NONE);
|
||||
#endif
|
||||
|
@ -1322,11 +1313,12 @@ DECLARE_HW_IRQ(DMA1_Stream7_IRQn, DMA1_Stream7_IRQHandler, NONE);
|
|||
*/
|
||||
void DMA1_Stream2_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
DmaRxDoneIsr(&spi3.SpiBus);
|
||||
DmaRxDoneIsr(&spi3.spi_bus);
|
||||
}
|
||||
DECLARE_HW_IRQ(DMA1_Stream2_IRQn, DMA1_Stream2_IRQHandler, NONE);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/**
|
||||
* This function RCC clock configuration function
|
||||
*
|
||||
|
@ -1409,7 +1401,6 @@ static void GPIOConfiguration(void)
|
|||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* This function Init the spi bus 、spi driver and attach to the bus
|
||||
*
|
||||
|
@ -1424,7 +1415,7 @@ static int BoardSpiBusInit(struct Stm32Spi *stm32spi_bus, struct SpiDriver *spi_
|
|||
x_err_t ret = EOK;
|
||||
|
||||
/*Init the spi bus */
|
||||
ret = SpiBusInit(&stm32spi_bus->SpiBus, stm32spi_bus->BusName);
|
||||
ret = SpiBusInit(&stm32spi_bus->spi_bus, stm32spi_bus->bus_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("Board_Spi_init SpiBusInit error %d\n", ret);
|
||||
return ERROR;
|
||||
|
@ -1438,7 +1429,7 @@ static int BoardSpiBusInit(struct Stm32Spi *stm32spi_bus, struct SpiDriver *spi_
|
|||
}
|
||||
|
||||
/*Attach the spi driver to the spi bus*/
|
||||
ret = SpiDriverAttachToBus(drv_name, stm32spi_bus->BusName);
|
||||
ret = SpiDriverAttachToBus(drv_name, stm32spi_bus->bus_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("Board_Spi_init SpiDriverAttachToBus error %d\n", ret);
|
||||
return ERROR;
|
||||
|
@ -1464,9 +1455,9 @@ static int Stm32HwSpiBusInit(void)
|
|||
#ifdef BSP_USING_SPI1
|
||||
StmSpiBus = &spi1;
|
||||
StmSpiBus->instance = SPI1;
|
||||
StmSpiBus->BusName = SPI_BUS_NAME_1;
|
||||
StmSpiBus->SpiBus.private_data = &spi1;
|
||||
DmaSpiConfig(&StmSpiBus->SpiBus, 0, NONE, NONE);
|
||||
StmSpiBus->bus_name = SPI_BUS_NAME_1;
|
||||
StmSpiBus->spi_bus.private_data = &spi1;
|
||||
DmaSpiConfig(&StmSpiBus->spi_bus, 0, NONE, NONE);
|
||||
|
||||
static struct SpiDriver spi_driver_1;
|
||||
memset(&spi_driver_1, 0, sizeof(struct SpiDriver));
|
||||
|
@ -1474,9 +1465,8 @@ static int Stm32HwSpiBusInit(void)
|
|||
spi_driver_1.configure = &(Stm32SpiDrvConfigure);
|
||||
|
||||
ret = BoardSpiBusInit(StmSpiBus, &spi_driver_1, SPI_1_DRV_NAME);
|
||||
if(EOK != ret)
|
||||
{
|
||||
KPrintf("Board_Spi_Init spi_bus_init %s error ret %u\n", StmSpiBus->BusName, ret);
|
||||
if (EOK != ret) {
|
||||
KPrintf("Board_Spi_Init spi_bus_init %s error ret %u\n", StmSpiBus->bus_name, ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
@ -1484,9 +1474,9 @@ static int Stm32HwSpiBusInit(void)
|
|||
#ifdef BSP_USING_SPI2
|
||||
StmSpiBus = &spi2;
|
||||
StmSpiBus->instance = SPI2;
|
||||
StmSpiBus->BusName = SPI_BUS_NAME_2;
|
||||
StmSpiBus->SpiBus.private_data = &spi2;
|
||||
DmaSpiConfig(&StmSpiBus->SpiBus, 0, NONE, NONE);
|
||||
StmSpiBus->bus_name = SPI_BUS_NAME_2;
|
||||
StmSpiBus->spi_bus.private_data = &spi2;
|
||||
DmaSpiConfig(&StmSpiBus->spi_bus, 0, NONE, NONE);
|
||||
|
||||
static struct SpiDriver spi_driver_2;
|
||||
memset(&spi_driver_2, 0, sizeof(struct SpiDriver));
|
||||
|
@ -1494,9 +1484,8 @@ static int Stm32HwSpiBusInit(void)
|
|||
spi_driver_2.configure = &(Stm32SpiDrvConfigure);
|
||||
|
||||
ret = BoardSpiBusInit(StmSpiBus, &spi_driver_2, SPI_2_DRV_NAME);
|
||||
if(EOK != ret)
|
||||
{
|
||||
KPrintf("Board_Spi_Init spi_bus_init %s error ret %u\n", StmSpiBus->BusName, ret);
|
||||
if (EOK != ret) {
|
||||
KPrintf("Board_Spi_Init spi_bus_init %s error ret %u\n", StmSpiBus->bus_name, ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
@ -1504,9 +1493,9 @@ static int Stm32HwSpiBusInit(void)
|
|||
#ifdef BSP_USING_SPI3
|
||||
StmSpiBus = &spi3;
|
||||
StmSpiBus->instance = SPI3;
|
||||
StmSpiBus->BusName = SPI_BUS_NAME_3;
|
||||
StmSpiBus->SpiBus.private_data = &spi3;
|
||||
DmaSpiConfig(&StmSpiBus->SpiBus, 0, NONE, NONE);
|
||||
StmSpiBus->bus_name = SPI_BUS_NAME_3;
|
||||
StmSpiBus->spi_bus.private_data = &spi3;
|
||||
DmaSpiConfig(&StmSpiBus->spi_bus, 0, NONE, NONE);
|
||||
|
||||
static struct SpiDriver spi_driver_3;
|
||||
memset(&spi_driver_3, 0, sizeof(struct SpiDriver));
|
||||
|
@ -1514,9 +1503,8 @@ static int Stm32HwSpiBusInit(void)
|
|||
spi_driver_3.configure = &(Stm32SpiDrvConfigure);
|
||||
|
||||
ret = BoardSpiBusInit(StmSpiBus, &spi_driver_3, SPI_3_DRV_NAME);
|
||||
if(EOK != ret)
|
||||
{
|
||||
KPrintf("Board_Spi_Init spi_bus_init %s error ret %u\n", StmSpiBus->BusName, ret);
|
||||
if (EOK != ret) {
|
||||
KPrintf("Board_Spi_Init spi_bus_init %s error ret %u\n", StmSpiBus->bus_name, ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
@ -1526,7 +1514,7 @@ static int Stm32HwSpiBusInit(void)
|
|||
/**
|
||||
* This function Mount the spi device to the bus
|
||||
*
|
||||
* @param BusName Bus Name
|
||||
* @param bus_name Bus Name
|
||||
*
|
||||
* @param device_name spi device name
|
||||
*
|
||||
|
@ -1536,15 +1524,17 @@ static int Stm32HwSpiBusInit(void)
|
|||
*
|
||||
* @return EOK
|
||||
*/
|
||||
x_err_t HwSpiDeviceAttach(const char *BusName, const char *device_name, GPIO_TypeDef *cs_gpiox, uint16_t cs_gpio_pin)
|
||||
x_err_t HwSpiDeviceAttach(const char *bus_name, const char *device_name, GPIO_TypeDef *cs_gpiox, uint16_t cs_gpio_pin)
|
||||
|
||||
{
|
||||
NULL_PARAM_CHECK(BusName);
|
||||
NULL_PARAM_CHECK(bus_name);
|
||||
NULL_PARAM_CHECK(device_name);
|
||||
|
||||
x_err_t result;
|
||||
struct SpiHardwareDevice *SpiDevice;
|
||||
struct Stm32HwSpiCs *CsPin;
|
||||
struct SpiHardwareDevice *spi_device;
|
||||
struct Stm32HwSpiCs *cs_pin_param;
|
||||
static SpiDeviceParam spi_dev_param;
|
||||
memset(&spi_dev_param, 0, sizeof(SpiDeviceParam));
|
||||
|
||||
/* initialize the cs pin && select the slave*/
|
||||
GPIO_InitTypeDef GPIO_Initure;
|
||||
|
@ -1556,31 +1546,33 @@ x_err_t HwSpiDeviceAttach(const char *BusName, const char *device_name, GPIO_Typ
|
|||
GPIO_WriteBit(cs_gpiox, cs_gpio_pin, Bit_SET);
|
||||
|
||||
/* attach the device to spi bus*/
|
||||
SpiDevice = (struct SpiHardwareDevice *)x_malloc(sizeof(struct SpiHardwareDevice));
|
||||
CHECK(SpiDevice);
|
||||
memset(SpiDevice, 0, sizeof(struct SpiHardwareDevice));
|
||||
CsPin = (struct Stm32HwSpiCs *)x_malloc(sizeof(struct Stm32HwSpiCs));
|
||||
CHECK(CsPin);
|
||||
memset(CsPin, 0, sizeof(struct Stm32HwSpiCs));
|
||||
CsPin->GPIOx = cs_gpiox;
|
||||
CsPin->GPIO_Pin = cs_gpio_pin;
|
||||
spi_device = (struct SpiHardwareDevice *)x_malloc(sizeof(struct SpiHardwareDevice));
|
||||
CHECK(spi_device);
|
||||
memset(spi_device, 0, sizeof(struct SpiHardwareDevice));
|
||||
cs_pin_param = (struct Stm32HwSpiCs *)x_malloc(sizeof(struct Stm32HwSpiCs));
|
||||
CHECK(cs_pin_param);
|
||||
memset(cs_pin_param, 0, sizeof(struct Stm32HwSpiCs));
|
||||
cs_pin_param->GPIOx = cs_gpiox;
|
||||
cs_pin_param->GPIO_Pin = cs_gpio_pin;
|
||||
|
||||
SpiDevice->spi_dev_done = &spi_dev_done;
|
||||
spi_device->spi_dev_done = &spi_dev_done;
|
||||
spi_device->private_data = (void *)cs_pin_param;
|
||||
|
||||
result = SpiDeviceRegister(SpiDevice, (void *)CsPin, device_name);
|
||||
result = SpiDeviceRegister(spi_device, (void *)&spi_dev_param, device_name);
|
||||
if (result != EOK) {
|
||||
SYS_ERR("%s device %p register faild, %d\n", device_name, SpiDevice, result);
|
||||
SYS_ERR("%s device %p register faild, %d\n", device_name, spi_device, result);
|
||||
}
|
||||
|
||||
result = SpiDeviceAttachToBus(device_name, BusName);
|
||||
result = SpiDeviceAttachToBus(device_name, bus_name);
|
||||
if (result != EOK) {
|
||||
SYS_ERR("%s attach to %s faild, %d\n", device_name, BusName, result);
|
||||
SYS_ERR("%s attach to %s faild, %d\n", device_name, bus_name, result);
|
||||
}
|
||||
|
||||
CHECK(result == EOK);
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
/**
|
||||
* This function Get DMA information
|
||||
*
|
||||
|
@ -1633,6 +1625,7 @@ static void Stm32GetDmaInfo(void)
|
|||
spi3.dma.dma_tx.dma_irq = DMA1_Stream7_IRQn; /*Enable DMA interrupt line*/
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* This function hardware spi initialization
|
||||
*
|
||||
|
|
|
@ -47,11 +47,9 @@ void TIM2_IRQHandler(int irq_num, void *arg)
|
|||
TIM_ClearITPendingBit(TIM2, TIM_IT_Update);
|
||||
KPrintf("hwtimer 2 ... come ...\n");
|
||||
|
||||
if (ptim2_cb_info)
|
||||
{
|
||||
if (ptim2_cb_info->TimeoutCb)
|
||||
{
|
||||
ptim2_cb_info->TimeoutCb(ptim2_cb_info->param);
|
||||
if (ptim2_cb_info) {
|
||||
if (ptim2_cb_info->timeout_callback) {
|
||||
ptim2_cb_info->timeout_callback(ptim2_cb_info->param);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -172,7 +170,6 @@ int Stm32HwTimerInit(void)
|
|||
static struct HwtimerDriver hwtimer_driver;
|
||||
memset(&hwtimer_driver, 0, sizeof(struct HwtimerDriver));
|
||||
|
||||
|
||||
ret = BoardHwtimerBusInit(&hwtimer_bus, &hwtimer_driver);
|
||||
if (EOK != ret) {
|
||||
KPrintf("board_hwtimer_Init error ret %u\n", ret);
|
||||
|
|
|
@ -199,7 +199,7 @@ static void DmaUartConfig(struct Stm32UsartDma *dma, USART_TypeDef *uart_device,
|
|||
|
||||
static void DMAConfiguration(struct SerialHardwareDevice *serial_dev, USART_TypeDef *uart_device)
|
||||
{
|
||||
struct Stm32Usart *serial = CONTAINER_OF(serial_dev->haldev.owner_bus, struct Stm32Usart, SerialBus);
|
||||
struct Stm32Usart *serial = CONTAINER_OF(serial_dev->haldev.owner_bus, struct Stm32Usart, serial_bus);
|
||||
struct Stm32UsartDma *dma = &serial->dma;
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_dev->private_data;
|
||||
|
||||
|
@ -276,25 +276,21 @@ static uint32 Stm32SerialInit(struct SerialDriver *serial_drv, struct BusConfigu
|
|||
|
||||
if (serial_cfg->data_cfg.serial_data_bits == DATA_BITS_8) {
|
||||
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
|
||||
}
|
||||
else if (serial_cfg->data_cfg.serial_data_bits == DATA_BITS_9) {
|
||||
} else if (serial_cfg->data_cfg.serial_data_bits == DATA_BITS_9) {
|
||||
USART_InitStructure.USART_WordLength = USART_WordLength_9b;
|
||||
}
|
||||
|
||||
if (serial_cfg->data_cfg.serial_stop_bits == STOP_BITS_1){
|
||||
USART_InitStructure.USART_StopBits = USART_StopBits_1;
|
||||
}
|
||||
else if (serial_cfg->data_cfg.serial_stop_bits == STOP_BITS_2){
|
||||
} else if (serial_cfg->data_cfg.serial_stop_bits == STOP_BITS_2) {
|
||||
USART_InitStructure.USART_StopBits = USART_StopBits_2;
|
||||
}
|
||||
|
||||
if (serial_cfg->data_cfg.serial_parity_mode == PARITY_NONE) {
|
||||
USART_InitStructure.USART_Parity = USART_Parity_No;
|
||||
}
|
||||
else if (serial_cfg->data_cfg.serial_parity_mode == PARITY_ODD){
|
||||
} else if (serial_cfg->data_cfg.serial_parity_mode == PARITY_ODD) {
|
||||
USART_InitStructure.USART_Parity = USART_Parity_Odd;
|
||||
}
|
||||
else if (serial_cfg->data_cfg.serial_parity_mode == PARITY_EVEN){
|
||||
} else if (serial_cfg->data_cfg.serial_parity_mode == PARITY_EVEN) {
|
||||
USART_InitStructure.USART_Parity = USART_Parity_Even;
|
||||
}
|
||||
|
||||
|
@ -379,8 +375,7 @@ static void DmaRxDoneIsr(struct Stm32Usart *serial, struct SerialDriver *serial_
|
|||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_drv->private_data;
|
||||
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
|
||||
|
||||
if (DMA_GetFlagStatus(dma->RxStream, dma->RxFlag) != RESET)
|
||||
{
|
||||
if (DMA_GetFlagStatus(dma->RxStream, dma->RxFlag) != RESET) {
|
||||
x_base level = CriticalAreaLock();
|
||||
|
||||
x_size_t recv_len = dma->SettingRecvLen - dma->LastRecvIndex;
|
||||
|
@ -682,7 +677,7 @@ int Stm32HwUsartInit(void)
|
|||
|
||||
NVIC_Configuration(serial_hw_cfg_1.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_1.SerialBus, &serial_driver_1, SERIAL_BUS_NAME_1, SERIAL_DRV_NAME_1);
|
||||
ret = BoardSerialBusInit(&serial_1.serial_bus, &serial_driver_1, SERIAL_BUS_NAME_1, SERIAL_DRV_NAME_1);
|
||||
if (EOK != ret) {
|
||||
KPrintf("Stm32HwUsartInit usart1 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
|
@ -723,7 +718,7 @@ int Stm32HwUsartInit(void)
|
|||
|
||||
NVIC_Configuration(serial_hw_cfg_2.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_2.SerialBus, &serial_driver_2, SERIAL_BUS_NAME_2, SERIAL_DRV_NAME_2);
|
||||
ret = BoardSerialBusInit(&serial_2.serial_bus, &serial_driver_2, SERIAL_BUS_NAME_2, SERIAL_DRV_NAME_2);
|
||||
if (EOK != ret) {
|
||||
KPrintf("Stm32HwUsartInit usart2 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
|
@ -764,7 +759,7 @@ int Stm32HwUsartInit(void)
|
|||
|
||||
NVIC_Configuration(serial_hw_cfg_3.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_3.SerialBus, &serial_driver_3, SERIAL_BUS_NAME_3, SERIAL_DRV_NAME_3);
|
||||
ret = BoardSerialBusInit(&serial_3.serial_bus, &serial_driver_3, SERIAL_BUS_NAME_3, SERIAL_DRV_NAME_3);
|
||||
if (EOK != ret) {
|
||||
KPrintf("Stm32HwUsartInit usart3 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
|
@ -805,7 +800,7 @@ int Stm32HwUsartInit(void)
|
|||
|
||||
NVIC_Configuration(serial_hw_cfg_4.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_4.SerialBus, &serial_driver_4, SERIAL_BUS_NAME_4, SERIAL_DRV_NAME_4);
|
||||
ret = BoardSerialBusInit(&serial_4.serial_bus, &serial_driver_4, SERIAL_BUS_NAME_4, SERIAL_DRV_NAME_4);
|
||||
if (EOK != ret) {
|
||||
KPrintf("Stm32HwUsartInit usart4 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
|
@ -846,7 +841,7 @@ int Stm32HwUsartInit(void)
|
|||
|
||||
NVIC_Configuration(serial_hw_cfg_5.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_5.SerialBus, &serial_driver_5, SERIAL_BUS_NAME_5, SERIAL_DRV_NAME_5);
|
||||
ret = BoardSerialBusInit(&serial_5.serial_bus, &serial_driver_5, SERIAL_BUS_NAME_5, SERIAL_DRV_NAME_5);
|
||||
if (EOK != ret) {
|
||||
KPrintf("Stm32HwUsartInit usart5 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
|
|
|
@ -50,7 +50,7 @@ struct Stm32Usart
|
|||
x_size_t LastRecvIndex;
|
||||
} dma;
|
||||
|
||||
struct SerialBus SerialBus;
|
||||
struct SerialBus serial_bus;
|
||||
};
|
||||
|
||||
int Stm32HwUsartInit(void);
|
||||
|
|
|
@ -172,8 +172,6 @@ static void NVIC_Configuration(IRQn_Type irq)
|
|||
NVIC_Init(&NVIC_InitStructure);
|
||||
}
|
||||
|
||||
|
||||
|
||||
static void SerialCfgParamCheck(struct SerialCfgParam *serial_cfg_default, struct SerialCfgParam *serial_cfg_new)
|
||||
{
|
||||
struct SerialDataCfg *data_cfg_default = &serial_cfg_default->data_cfg;
|
||||
|
@ -226,25 +224,21 @@ static uint32 Stm32SerialInit(struct SerialDriver *serial_drv, struct BusConfigu
|
|||
|
||||
if (serial_cfg->data_cfg.serial_data_bits == DATA_BITS_8) {
|
||||
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
|
||||
}
|
||||
else if (serial_cfg->data_cfg.serial_data_bits == DATA_BITS_9){
|
||||
} else if (serial_cfg->data_cfg.serial_data_bits == DATA_BITS_9) {
|
||||
USART_InitStructure.USART_WordLength = USART_WordLength_9b;
|
||||
}
|
||||
|
||||
if (serial_cfg->data_cfg.serial_stop_bits == STOP_BITS_1) {
|
||||
USART_InitStructure.USART_StopBits = USART_StopBits_1;
|
||||
}
|
||||
else if (serial_cfg->data_cfg.serial_stop_bits == STOP_BITS_2){
|
||||
} else if (serial_cfg->data_cfg.serial_stop_bits == STOP_BITS_2) {
|
||||
USART_InitStructure.USART_StopBits = USART_StopBits_2;
|
||||
}
|
||||
|
||||
if (serial_cfg->data_cfg.serial_parity_mode == PARITY_NONE) {
|
||||
USART_InitStructure.USART_Parity = USART_Parity_No;
|
||||
}
|
||||
else if (serial_cfg->data_cfg.serial_parity_mode == PARITY_ODD){
|
||||
} else if (serial_cfg->data_cfg.serial_parity_mode == PARITY_ODD) {
|
||||
USART_InitStructure.USART_Parity = USART_Parity_Odd;
|
||||
}
|
||||
else if (serial_cfg->data_cfg.serial_parity_mode == PARITY_EVEN){
|
||||
} else if (serial_cfg->data_cfg.serial_parity_mode == PARITY_EVEN) {
|
||||
USART_InitStructure.USART_Parity = USART_Parity_Even;
|
||||
}
|
||||
|
||||
|
@ -276,7 +270,6 @@ static uint32 Stm32SerialConfigure(struct SerialDriver *serial_drv, int serial_o
|
|||
UART_ENABLE_IRQ(serial_hw_cfg->irq);
|
||||
USART_ITConfig(serial_hw_cfg->uart_device, USART_IT_RXNE, ENABLE);
|
||||
break;
|
||||
|
||||
}
|
||||
|
||||
return EOK;
|
||||
|
@ -329,15 +322,12 @@ struct Stm32Usart serial_1;
|
|||
struct SerialDriver serial_driver_1;
|
||||
struct SerialHardwareDevice serial_device_1;
|
||||
|
||||
|
||||
|
||||
void USART1_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
UartIsr(&serial_1, &serial_driver_1, &serial_device_1);
|
||||
}
|
||||
DECLARE_HW_IRQ(USART1_IRQn, USART1_IRQHandler, NONE);
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_USART2
|
||||
|
@ -345,15 +335,12 @@ struct Stm32Usart serial_2;
|
|||
struct SerialDriver serial_driver_2;
|
||||
struct SerialHardwareDevice serial_device_2;
|
||||
|
||||
|
||||
|
||||
void USART2_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
UartIsr(&serial_2, &serial_driver_2, &serial_device_2);
|
||||
}
|
||||
DECLARE_HW_IRQ(USART2_IRQn, USART2_IRQHandler, NONE);
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_USART3
|
||||
|
@ -361,18 +348,14 @@ struct Stm32Usart serial_3;
|
|||
struct SerialDriver serial_driver_3;
|
||||
struct SerialHardwareDevice serial_device_3;
|
||||
|
||||
|
||||
|
||||
void USART3_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
UartIsr(&serial_3, &serial_driver_3, &serial_device_3);
|
||||
}
|
||||
DECLARE_HW_IRQ(USART3_IRQn, USART3_IRQHandler, NONE);
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
static uint32 Stm32SerialDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
|
||||
{
|
||||
NULL_PARAM_CHECK(drv);
|
||||
|
@ -505,7 +488,7 @@ int Stm32HwUsartInit(void)
|
|||
|
||||
NVIC_Configuration(serial_hw_cfg_1.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_1.SerialBus, &serial_driver_1, SERIAL_BUS_NAME_1, SERIAL_DRV_NAME_1);
|
||||
ret = BoardSerialBusInit(&serial_1.serial_bus, &serial_driver_1, SERIAL_BUS_NAME_1, SERIAL_DRV_NAME_1);
|
||||
if (EOK != ret) {
|
||||
KPrintf("Stm32HwUsartInit usart1 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
|
@ -545,7 +528,7 @@ int Stm32HwUsartInit(void)
|
|||
|
||||
NVIC_Configuration(serial_hw_cfg_2.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_2.SerialBus, &serial_driver_2, SERIAL_BUS_NAME_2, SERIAL_DRV_NAME_2);
|
||||
ret = BoardSerialBusInit(&serial_2.serial_bus, &serial_driver_2, SERIAL_BUS_NAME_2, SERIAL_DRV_NAME_2);
|
||||
if (EOK != ret) {
|
||||
KPrintf("Stm32HwUsartInit usart2 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
|
@ -585,7 +568,7 @@ int Stm32HwUsartInit(void)
|
|||
|
||||
NVIC_Configuration(serial_hw_cfg_3.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_3.SerialBus, &serial_driver_3, SERIAL_BUS_NAME_3, SERIAL_DRV_NAME_3);
|
||||
ret = BoardSerialBusInit(&serial_3.serial_bus, &serial_driver_3, SERIAL_BUS_NAME_3, SERIAL_DRV_NAME_3);
|
||||
if (EOK != ret) {
|
||||
KPrintf("Stm32HwUsartInit usart3 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
|
@ -626,7 +609,7 @@ int Stm32HwUsartInit(void)
|
|||
|
||||
NVIC_Configuration(serial_hw_cfg_4.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_4.SerialBus, &serial_driver_4, SERIAL_BUS_NAME_4, SERIAL_DRV_NAME_4);
|
||||
ret = BoardSerialBusInit(&serial_4.serial_bus, &serial_driver_4, SERIAL_BUS_NAME_4, SERIAL_DRV_NAME_4);
|
||||
if (EOK != ret) {
|
||||
KPrintf("Stm32HwUsartInit usart4 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
|
@ -667,7 +650,7 @@ int Stm32HwUsartInit(void)
|
|||
|
||||
NVIC_Configuration(serial_hw_cfg_5.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_5.SerialBus, &serial_driver_5, SERIAL_BUS_NAME_5, SERIAL_DRV_NAME_5);
|
||||
ret = BoardSerialBusInit(&serial_5.serial_bus, &serial_driver_5, SERIAL_BUS_NAME_5, SERIAL_DRV_NAME_5);
|
||||
if (EOK != ret) {
|
||||
KPrintf("Stm32HwUsartInit usart5 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
|
|
|
@ -31,8 +31,8 @@
|
|||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define MERGE_FLAG(src, flag) *(src) |= flag
|
||||
#define CLEAR_FLAG(src, flag) *(src) &= ~flag
|
||||
#define MERGE_FLAG(src, flag) (*(src) |= flag)
|
||||
#define CLEAR_FLAG(src, flag) (*(src) &= ~flag)
|
||||
|
||||
extern struct Assign Assign;
|
||||
|
||||
|
|
|
@ -30,13 +30,14 @@
|
|||
#define TASK_DELAY_INACTIVE 0
|
||||
#define TASK_DELAY_ACTIVE 1
|
||||
|
||||
struct Delay {
|
||||
struct Delay
|
||||
{
|
||||
struct TaskDescriptor *task;
|
||||
x_ticks_t ticks;
|
||||
uint8 status;
|
||||
DoubleLinklistType link;
|
||||
};
|
||||
typedef struct Delay *delay_t;
|
||||
typedef struct Delay *DelayType;
|
||||
|
||||
x_err_t KTaskSetDelay(struct TaskDescriptor *task, x_ticks_t ticks);
|
||||
x_err_t KTaskUnSetDelay(struct TaskDescriptor *task);
|
||||
|
|
|
@ -86,7 +86,7 @@ struct TaskDyncSchedMember {
|
|||
uint8 bitmap_row;
|
||||
#endif
|
||||
uint32 bitmap_column;
|
||||
delay_t delay;
|
||||
DelayType delay;
|
||||
};
|
||||
typedef struct TaskDyncSchedMember TaskDyncSchedMembeType;
|
||||
|
||||
|
|
|
@ -100,16 +100,16 @@ enum KernelService
|
|||
KS_USER_END
|
||||
|
||||
};
|
||||
#define SERVICETABLE ((struct Kernel_Service*)SERVICE_TABLE_ADDRESS)
|
||||
#define SERVICETABLE ((struct KernelService*)SERVICE_TABLE_ADDRESS)
|
||||
#endif
|
||||
|
||||
typedef uintptr_t (*kservice)(uint32_t knum,uintptr_t *param,uint8_t param_num);
|
||||
struct Kernel_Service
|
||||
struct KernelService
|
||||
{
|
||||
const kservice fun;
|
||||
const uint8_t param_num;
|
||||
};
|
||||
|
||||
extern struct Kernel_Service g_service_table[] ;
|
||||
extern struct KernelService g_service_table[] ;
|
||||
|
||||
#endif
|
|
@ -45,16 +45,16 @@ struct SpinLock
|
|||
HwSpinlock lock;
|
||||
};
|
||||
|
||||
struct Spin_Lockfileops
|
||||
{ //定义自旋锁
|
||||
struct SpinLock node_lock; //原有的自旋锁结构体
|
||||
void (*SPinLock)(struct Spin_Lockfileops *spinlock);
|
||||
void (*UnlockSpinLock)(struct Spin_Lockfileops *spinlock);
|
||||
void (*UnlockSpinLockIrqRestore)(struct Spin_Lockfileops *spinlock, x_base level);
|
||||
x_base (*SpinLockIrqSave)(struct Spin_Lockfileops *spinlock);
|
||||
struct SpinLockfileOps
|
||||
{ //define spin lock
|
||||
struct SpinLock node_lock; //last spin lock node struct
|
||||
void (*SPinLock)(struct SpinLockfileOps *spinlock);
|
||||
void (*UnlockSpinLock)(struct SpinLockfileOps *spinlock);
|
||||
void (*UnlockSpinLockIrqRestore)(struct SpinLockfileOps *spinlock, x_base level);
|
||||
x_base (*SpinLockIrqSave)(struct SpinLockfileOps *spinlock);
|
||||
};
|
||||
|
||||
extern struct Spin_Lockfileops spinlock;
|
||||
extern struct SpinLockfileOps spinlock;
|
||||
extern HwSpinlock _CriticalLock;
|
||||
|
||||
void InitHwSpinlock(HwSpinlock *lock);
|
||||
|
@ -82,11 +82,11 @@ void ExecSecondaryCpuIdleKtask(void);
|
|||
#ifdef ARCH_SMP
|
||||
struct SpinLock;
|
||||
|
||||
void InitSpinLock(struct Spin_Lockfileops * spinlock);
|
||||
void _SpinLock(struct Spin_Lockfileops * spinlock);
|
||||
void _UnlockSpinLock(struct Spin_Lockfileops * spinlock);
|
||||
x_base _SpinLockIrqSave(struct Spin_Lockfileops * spinlock);
|
||||
void _UnlockSpinLockIrqRestore(struct Spin_Lockfileops * spinlock, x_base level);
|
||||
void InitSpinLock(struct SpinLockfileOps * spinlock);
|
||||
void _SpinLock(struct SpinLockfileOps * spinlock);
|
||||
void _UnlockSpinLock(struct SpinLockfileOps * spinlock);
|
||||
x_base _SpinLockIrqSave(struct SpinLockfileOps * spinlock);
|
||||
void _UnlockSpinLockIrqRestore(struct SpinLockfileOps * spinlock, x_base level);
|
||||
|
||||
#else
|
||||
#define InitSpinLock(lock) /* nothing */
|
||||
|
|
|
@ -554,7 +554,7 @@ uintptr_t KsStatfs(uint32_t knum,uintptr_t *param, uint8_t num )
|
|||
}
|
||||
#endif
|
||||
|
||||
struct Kernel_Service g_service_table[256] __attribute__ ((section (".g_service_table"))) =
|
||||
struct KernelService g_service_table[256] __attribute__ ((section (".g_service_table"))) =
|
||||
{
|
||||
[KS_USER_PRINT_INFO] = { KsPrintInfo, 1 },
|
||||
|
||||
|
|
|
@ -59,7 +59,7 @@ void TimeoutCb(void* param){
|
|||
hwtimer_dev->hwtimer_param.repeat = 1;
|
||||
hwtimer_dev->hwtimer_param.period_millisecond = 3000;
|
||||
hwtimer_dev->hwtimer_param.cb_info.param = NULL;
|
||||
hwtimer_dev->hwtimer_param.cb_info.TimeoutCb = TimeoutCb;
|
||||
hwtimer_dev->hwtimer_param.cb_info.timeout_callback = timeout_callback;
|
||||
|
||||
BusDevOpen(dev);
|
||||
|
||||
|
|
|
@ -42,8 +42,8 @@ DoubleLinklistType xiaoshan_task_head ={&xiaoshan_task_head, &xiaoshan_task_head
|
|||
#define BITMAP_CACULATE_COLUMN_OFFSET(offset,n) (offset = n / 8)
|
||||
#endif
|
||||
|
||||
#define BITMAP_SETCOLUMN(column,offset) (column = 1 << offset)
|
||||
#define BITMAP_SETROW(row,offset) (row = 1 << offset)
|
||||
#define BITMAP_SETCOLUMN(column,offset) (column = (1 << offset))
|
||||
#define BITMAP_SETROW(row,offset) (row = (1 << offset))
|
||||
#define BITLOWMASK_3BIT (0x7)
|
||||
|
||||
|
||||
|
|
|
@ -24,7 +24,7 @@
|
|||
#include <xs_assign.h>
|
||||
|
||||
#ifdef ARCH_SMP
|
||||
struct Spin_Lockfileops spinlock;
|
||||
struct SpinLockfileOps spinlock;
|
||||
/*
|
||||
* lock scheduler
|
||||
*/
|
||||
|
@ -50,7 +50,7 @@ static void EnablePreempt(void)
|
|||
EnableLocalInterrupt(lock);
|
||||
}
|
||||
|
||||
void InitSpinLock( struct Spin_Lockfileops * spinlock)
|
||||
void InitSpinLock( struct SpinLockfileOps * spinlock)
|
||||
{
|
||||
InitHwSpinlock(&spinlock->node_lock.lock);
|
||||
spinlock->SPinLock = _SpinLock;
|
||||
|
@ -60,19 +60,19 @@ static void EnablePreempt(void)
|
|||
|
||||
}
|
||||
|
||||
void _SpinLock(struct Spin_Lockfileops * spinlock)
|
||||
void _SpinLock(struct SpinLockfileOps * spinlock)
|
||||
{
|
||||
DisablePreempt();
|
||||
HwLockSpinlock(&spinlock->node_lock.lock);
|
||||
}
|
||||
|
||||
void _UnlockSpinLock(struct Spin_Lockfileops * spinlock)
|
||||
void _UnlockSpinLock(struct SpinLockfileOps * spinlock)
|
||||
{
|
||||
HwUnlockSpinlock(&spinlock->node_lock.lock);
|
||||
EnablePreempt();
|
||||
}
|
||||
|
||||
x_base _SpinLockIrqSave(struct Spin_Lockfileops * spinlock)
|
||||
x_base _SpinLockIrqSave(struct SpinLockfileOps * spinlock)
|
||||
{
|
||||
x_base lock = 0;
|
||||
|
||||
|
@ -84,7 +84,7 @@ x_base _SpinLockIrqSave(struct Spin_Lockfileops * spinlock)
|
|||
return lock;
|
||||
}
|
||||
|
||||
void _UnlockSpinLockIrqRestore(struct Spin_Lockfileops * spinlock, x_base lock)
|
||||
void _UnlockSpinLockIrqRestore(struct SpinLockfileOps * spinlock, x_base lock)
|
||||
{
|
||||
HwUnlockSpinlock(&spinlock->node_lock.lock);
|
||||
EnableLocalInterrupt(lock);
|
||||
|
|
|
@ -25,9 +25,9 @@
|
|||
DECLARE_ID_MANAGER(k_mq_id_manager, ID_NUM_MAX);
|
||||
DoubleLinklistType k_mq_list = {&k_mq_list, &k_mq_list};
|
||||
|
||||
struct mq_message
|
||||
struct MqMessage
|
||||
{
|
||||
struct mq_message *next;
|
||||
struct MqMessage *next;
|
||||
};
|
||||
|
||||
static struct MsgQueue *GetMsgQueueById(int32 id)
|
||||
|
@ -195,7 +195,7 @@ static x_err_t _MsgQueueRecv(struct MsgQueue *mq,
|
|||
x_ubase lock = 0;
|
||||
uint32 tick_delta = 0;
|
||||
int32 timeout = 0;
|
||||
struct mq_message *msg = NONE;
|
||||
struct MqMessage *msg = NONE;
|
||||
struct TaskDescriptor *task = NONE;
|
||||
|
||||
NULL_PARAM_CHECK(mq);
|
||||
|
|
|
@ -39,7 +39,6 @@ HardwareDevType CanDeviceFind(const char *dev_name, enum DevType dev_type)
|
|||
DoubleLinklistType *node = NONE;
|
||||
DoubleLinklistType *head = &candev_linklist;
|
||||
for (node = head->node_next; node != head; node = node->node_next) {
|
||||
|
||||
device = SYS_DOUBLE_LINKLIST_ENTRY(node, struct HardwareDev, dev_link);
|
||||
if ((!strcmp(device->dev_name, dev_name)) && (dev_type == device->dev_type)) {
|
||||
return device;
|
||||
|
|
|
@ -29,7 +29,7 @@ extern "C" {
|
|||
|
||||
struct HwtimerCallBackInfo
|
||||
{
|
||||
void (*TimeoutCb) (void* param);
|
||||
void (*timeout_callback) (void* param);
|
||||
void *param;
|
||||
};
|
||||
|
||||
|
|
|
@ -222,8 +222,7 @@ static uint32 SdHwInit(SpiSdDeviceType spi_sd_dev)
|
|||
SpiDevConfigureCs(&spi_sd_dev->spi_dev->haldev, 0, 1);
|
||||
|
||||
SD_TIMEOUT(start_time, 3 * SPI_SD_TIMEOUT_NUM);
|
||||
}
|
||||
while(0x01 != g_sd_cmd_param.sd_respone_data[0]);
|
||||
}while(0x01 != g_sd_cmd_param.sd_respone_data[0]);
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
@ -268,8 +267,7 @@ static uint32 SdConfirmType(SpiSdDeviceType spi_sd_dev)
|
|||
}
|
||||
|
||||
SD_TIMEOUT(start_time, 3 * SPI_SD_TIMEOUT_NUM);
|
||||
}
|
||||
while(0xAA != g_sd_cmd_param.sd_respone_data[4]);
|
||||
}while(0xAA != g_sd_cmd_param.sd_respone_data[4]);
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue